Am 08/11/2022 um 22:19 schrieb Stefan Hajnoczi:
> From: Emanuele Giuseppe Esposito
>
> AioContext lock was introduced in b9e413dd375 and in this instance
> it is used to protect these 3 functions:
> - virtio_blk_handle_rw_error
> - virtio_blk_req_complete
> - block_acct_done
>
> Now that all th
在 2022/11/11 2:56, Michael S. Tsirkin 写道:
On Sun, Oct 30, 2022 at 09:52:38PM +0800, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
Abstract vhost acked features saving into
vhost_user_save_acked_features, export it as util function.
Signed-off-by: Hyman Huang(黄勇)
Signed-off-by: Guo
Most of the changes are trivial. The bits test timeout has now been increased
to 110 seconds in order to accommodate slower systems and fewer unnecessary
failures. Removed of the reference to non-existent README file in docs.
CC: Thomas Huth
CC: qemu-triv...@nongnu.org
Signed-off-by: Ani Sinha
-
On Nov 11 12:40, Philippe Mathieu-Daudé wrote:
> On 10/11/22 23:08, Klaus Jensen wrote:
> > From: Klaus Jensen
> >
> > Replace the local Error variable with errp and ERRP_GUARD() and change
> > the return value to bool.
> >
> > Signed-off-by: Klaus Jensen
> > ---
> > hw/nvme/ctrl.c | 23 +
Peter Xu writes:
> Hi, Alex,
>
> On Thu, Nov 10, 2022 at 05:55:51PM +, Alex Bennée wrote:
>>
>> Alex Bennée writes:
>>
>> > Hi,
>> >
>> > I've been trying to remove current_cpu hacks from our hw/ emulation and
>> > replace them with an explicit cpu_index derived from MemTxAttrs. So far
>
Am 08/11/2022 um 22:19 schrieb Stefan Hajnoczi:
> There is no need to acquire AioContext in virtio_blk_handle_vq() because
> no APIs used in the function require it and nothing else in the
> virtio-blk code requires mutual exclusion anymore.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> hw/block
Am 08/11/2022 um 22:19 schrieb Stefan Hajnoczi:
> blk_drain() needs the lock because it calls AIO_WAIT_WHILE().
>
> The s->rq loop doesn't need the lock because dataplane has been stopped
> when virtio_blk_reset() is called.
>
> Signed-off-by: Stefan Hajnoczi
>
Reviewed-by: Emanuele Giuseppe
From: Philippe Mathieu-Daudé
GCC 8 added a -Wstringop-truncation warning:
The -Wstringop-truncation warning added in GCC 8.0 via r254630 for
bug 81117 is specifically intended to highlight likely unintended
uses of the strncpy function that truncate the terminating NUL
character from the
Add 8.0 machine types for arm/i440fx/m68k/q35/s390x/spapr.
Signed-off-by: Cornelia Huck
---
hw/arm/virt.c | 9 -
hw/core/machine.c | 3 +++
hw/i386/pc.c | 3 +++
hw/i386/pc_piix.c | 14 +-
hw/i386/pc_q35.c | 13 +++
On 11/11/22 13:32, Klaus Jensen wrote:
On Nov 11 12:40, Philippe Mathieu-Daudé wrote:
On 10/11/22 23:08, Klaus Jensen wrote:
From: Klaus Jensen
Replace the local Error variable with errp and ERRP_GUARD() and change
the return value to bool.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c
On Fri, Nov 11, 2022 at 9:07 AM Jason Wang wrote:
>
> On Fri, Nov 11, 2022 at 3:56 PM Eugenio Perez Martin
> wrote:
> >
> > On Fri, Nov 11, 2022 at 8:34 AM Jason Wang wrote:
> > >
> > >
> > > 在 2022/11/10 21:09, Eugenio Perez Martin 写道:
> > > > On Thu, Nov 10, 2022 at 6:40 AM Jason Wang wrote:
On Wed, Oct 26, 2022 at 10:48 AM Or Ozeri wrote:
>
> Starting from ceph Reef, RBD has built-in support for layered encryption,
> where each ancestor image (in a cloned image setting) can be possibly
> encrypted using a unique passphrase.
>
> A new function, rbd_encryption_load2, was added to librb
On Fri, Nov 11, 2022 at 8:41 AM Jason Wang wrote:
>
>
> 在 2022/11/10 21:22, Eugenio Perez Martin 写道:
> > On Thu, Nov 10, 2022 at 6:51 AM Jason Wang wrote:
> >> On Wed, Nov 9, 2022 at 1:08 AM Eugenio Pérez wrote:
> >>> So the caller can choose which ASID is destined.
> >>>
> >>> No need to update
On Fri, Nov 11, 2022 at 8:49 AM Jason Wang wrote:
>
>
> 在 2022/11/10 21:47, Eugenio Perez Martin 写道:
> > On Thu, Nov 10, 2022 at 7:01 AM Jason Wang wrote:
> >> On Wed, Nov 9, 2022 at 1:08 AM Eugenio Pérez wrote:
> >>> The memory listener that thells the device how to convert GPA to qemu's
> >>>
On 11/11/22 13:26, Alex Bennée wrote:
if (addr > 0xfff || !index) {
switch (attrs.requester_type) {
}
MSIMessage msi = { .address = addr, .data = val };
apic_send_msi(&msi);
return MEMTX_OK;
}
which at least gets things booting pro
On Fri, 11 Nov 2022 12:40:59 +0100
Gerd Hoffmann wrote:
> On Fri, Nov 11, 2022 at 11:51:23AM +0100, Igor Mammedov wrote:
> > On Tue, 8 Nov 2022 12:21:11 +0100
> > Gerd Hoffmann wrote:
> >
> > > > >> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> > > > >> > index 566accf7e6..5bf5465a21 100644
>
On 31/10/22 14:03, Peter Maydell wrote:
On Mon, 31 Oct 2022 at 12:08, Philippe Mathieu-Daudé wrote:
On 4/10/22 16:54, Peter Maydell wrote:
On Tue, 4 Oct 2022 at 14:33, Alex Bennée wrote:
Peter Maydell writes:
The MSC is in the address map like most other stuff, and thus there is
no rest
> if (pcmc->has_reserved_memory && machine->device_memory->base) {
>
> [...]
>
> if (pcms->cxl_devices_state.is_enabled) {
>
> res_mem_end = cxl_resv_end;
>
> that s
On Fri, 11 Nov 2022 10:47:20 +
Daniel P. Berrangé wrote:
> On Wed, Nov 09, 2022 at 01:36:07PM +, Dario Faggioli wrote:
> > Hello,
> >
> > Sorry for the potentially naive question, but I'm not clear what the
> > process would be if, say, I'd like to raise the number of maximum CPUs
> > a
On 11/11/2022 13.31, Ani Sinha wrote:
Most of the changes are trivial. The bits test timeout has now been increased
to 110 seconds in order to accommodate slower systems and fewer unnecessary
failures. Removed of the reference to non-existent README file in docs.
CC: Thomas Huth
CC: qemu-triv..
Philippe Mathieu-Daudé writes:
> On 31/10/22 14:03, Peter Maydell wrote:
>> On Mon, 31 Oct 2022 at 12:08, Philippe Mathieu-Daudé
>> wrote:
>>>
>>> On 4/10/22 16:54, Peter Maydell wrote:
On Tue, 4 Oct 2022 at 14:33, Alex Bennée wrote:
>
>
> Peter Maydell writes:
>> The M
Paolo Bonzini writes:
> On 11/11/22 13:26, Alex Bennée wrote:
>> if (addr > 0xfff || !index) {
>> switch (attrs.requester_type) {
>> }
>> MSIMessage msi = { .address = addr, .data = val };
>> apic_send_msi(&msi);
>> return MEMTX_OK;
>>
The "query-command-line-options" command uses a hand-crafted list
of options that should be returned for the "machine" parameter.
This is pretty much out of sync with reality, for example settings
like "kvm_shadow_mem" or "accel" are not parameters for the machine
anymore. Also, there is no distinc
On Fri, Nov 11, 2022 at 06:01:08PM +0530, Ani Sinha wrote:
> Most of the changes are trivial. The bits test timeout has now been increased
> to 110 seconds in order to accommodate slower systems and fewer unnecessary
> failures. Removed of the reference to non-existent README file in docs.
>
> CC:
On Fri, Nov 11, 2022 at 02:36:02PM +0100, Gerd Hoffmann wrote:
> > if (pcmc->has_reserved_memory && machine->device_memory->base) {
> >
> > [...]
> >
> > if (pcms->cxl_devices_state.is_enabled) {
On Fri, Nov 11, 2022 at 9:03 AM Jason Wang wrote:
>
>
> 在 2022/11/11 00:07, Eugenio Perez Martin 写道:
> > On Thu, Nov 10, 2022 at 7:25 AM Jason Wang wrote:
> >>
> >> 在 2022/11/9 01:07, Eugenio Pérez 写道:
> >>> Isolate control virtqueue in its own group, allowing to intercept control
> >>> commands
On Fri, Nov 11, 2022 at 20:05 Michael S. Tsirkin wrote:
> On Fri, Nov 11, 2022 at 06:01:08PM +0530, Ani Sinha wrote:
> > Most of the changes are trivial. The bits test timeout has now been
> increased
> > to 110 seconds in order to accommodate slower systems and fewer
> unnecessary
> > failures.
On Fri, Nov 11, 2022 at 08:16:22PM +0530, Ani Sinha wrote:
>
>
> On Fri, Nov 11, 2022 at 20:05 Michael S. Tsirkin wrote:
>
> On Fri, Nov 11, 2022 at 06:01:08PM +0530, Ani Sinha wrote:
> > Most of the changes are trivial. The bits test timeout has now been
> increased
> > to 110
Am 11/11/2022 um 11:48 schrieb Paolo Bonzini:
> On 11/10/22 17:48, Emanuele Giuseppe Esposito wrote:
>> +/*
>> + * QEMU accel blocker class
>
> "Lock to inhibit accelerator ioctls"
>
>> + *
>> + * Copyright (c) 2014 Red Hat Inc.
>
> 2022, you can also add an Author line.
>
>> +static int acc
Thomas Huth writes:
> The "query-command-line-options" command uses a hand-crafted list
> of options that should be returned for the "machine" parameter.
> This is pretty much out of sync with reality, for example settings
> like "kvm_shadow_mem" or "accel" are not parameters for the machine
> an
Hi,
This is my pre-PR series for the pull request I'm going to send on
Monday in time for Tuesday tagging of rc1. Anything not reviewed will
get dropped from the PR (which probably includes the GICD_IIDR which
was just an annoyance I noticed while debugging Xen for another
series). The following s
We don't currently have a clear place in the documentation to describe
the roles and responsibilities of a maintainer. Lets create one so we
can. I've moved a few small bits out of other files to try and keep
everything in one place.
Signed-off-by: Alex Bennée
Reviewed-by: Stefan Hajnoczi
Review
Although we call qemu_plugin_register_vcpu_idle_cb() in the bb test we
don't really exercise the rest of the state change callbacks. Add a
new test that tests the whole API.
[AJB: I wrote this in an attempt to flush out a reproducer for #1195
although so far no joy.]
Signed-off-by: Alex Bennée
C
From: Cédric Le Goater
The Aspeed SDK images are based on OpenBMC which starts a lot of
services. The output noise on the console can break from time to time
the test waiting for the logging prompt.
Change the U-Boot bootargs variable to add "quiet" to the kernel
command line and reduce the outp
The bullet points are quite long and contain process tips. Move those
bits of the bullet to the relevant sections and link to them. Use a
table for nicer formatting of the checklist.
Signed-off-by: Alex Bennée
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Paolo Bonzini
Message-Id: <20221012121152.1
This should hopefully give is nice coverage information about what our
tests (or at least the subset we are running) have hit. Ideally we
would want a way to trigger coverage on tests likely to be affected by
the current commit.
Signed-off-by: Alex Bennée
Acked-by: Stefan Hajnoczi
---
.gitlab-c
It is important that contributors take the review process seriously
and we collaborate in a respectful way while avoiding personal
attacks. Try and make this clear in the language.
Signed-off-by: Alex Bennée
Reviewed-by: Markus Armbruster
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Paolo Bonzini
a66a24585f (hw/intc/arm_gic: Implement read of GICC_IIDR) implemented
this for the CPU interface register. The fact we don't implement it
shows up when running Xen with -d guest_error which is definitely
wrong because the guest is perfectly entitled to read it.
Lightly re-factor this region of reg
From: Stefan Weil
The docker probe uses "sudo -n" which can cause an e-mail with a security
warning
each time when configure is run. Therefore run docker probe only if either
docker
or podman are available.
That avoids the problematic "sudo -n" on build environments which have neither
docker n
We welcome all sorts of patches.
Signed-off-by: Alex Bennée
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Paolo Bonzini
Message-Id: <20221012121152.1179051-3-alex.ben...@linaro.org>
---
docs/devel/submitting-a-patch.rst | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a
From: Peter Maydell
On my machine, a debug build of QEMU takes about 260 seconds to
complete this test, so with the current timeout value of 180 seconds
it always times out. Double the timeout value to 360 so the test
definitely has enough time to complete.
Signed-off-by: Peter Maydell
Signed-
This is useful when trying to bisect a particular failing test behind
a docker run. For example:
make docker-test-clang@fedora \
TARGET_LIST=arm-softmmu \
TEST_COMMAND="meson test qtest-arm/qos-test" \
J=9 V=1
Signed-off-by: Alex Bennée
---
v1
- fix s/target /target./
- CHECK_TA
This attempts to deal with the problem of login prompts not being
guaranteed to be terminated with a newline. The solution to this is to
peek at the incoming data looking to see if we see an up-coming match
before we fall back to the old readline() logic. The reason to mostly
rely on readline is be
Adding Michael's name to the list of bios bits maintainers so that all changes
and fixes into biosbits framework can go through his tree and he is notified.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Ani Sinha
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS
From: Alberto Faria
Setting it to true can cause the device size to be queried from libblkio
in otherwise fast paths, degrading performance. Set it to false and
require users to refresh the device size explicitly instead.
Fixes: 4c8f4fda0504 ("block/blkio: Tolerate device size changes")
Suggeste
From: Hanna Reitz
Test streaming a base image into the top image underneath two throttle
nodes. This was reported to make qemu 7.1 hang
(https://gitlab.com/qemu-project/qemu/-/issues/1215), so this serves as
a regression test.
Signed-off-by: Hanna Reitz
Message-Id: <20221110160921.33158-1-hre.
From: Alberto Faria
The nvme-io_uring BlockDriver's path option must point at the character
device of an NVMe namespace, not at an image file.
Fixes: fd66dbd424f5 ("blkio: add libblkio block driver")
Suggested-by: Stefano Garzarella
Signed-off-by: Alberto Faria
Message-Id: <20221108142347.1322
The following changes since commit 2ccad61746ca7de5dd3e25146062264387e43bd4:
Merge tag 'pull-tcg-20221109' of https://gitlab.com/rth7680/qemu into staging
(2022-11-09 13:26:45 -0500)
are available in the Git repository at:
https://repo.or.cz/qemu/kevin.git tags/for-upstream
for you to fetc
From: Hanna Reitz
Before this series, a mirror job in write-blocking mode would pause
issuing background requests while active requests are in flight. Thus,
if the source is constantly in use by active requests, no actual
progress can be made.
This series should have fixed that, making the mirr
From: Hanna Reitz
Have write requests happen to the source node right when we start a
mirror job. The mirror filter node may encounter MirrorBDSOpaque.job
being NULL, but this should not cause a segfault.
Signed-off-by: Hanna Reitz
Message-Id: <20221109165452.67927-6-hre...@redhat.com>
Reviewe
From: Hanna Reitz
bdrv_parent_drained_{begin,end}_single() are supposed to operate on the
parent, not on the child, so they should not attempt to get the context
to poll from the child but the parent instead. BDRV_POLL_WHILE(c->bs)
does get the context from the child, so we should replace it wit
From: Hanna Reitz
Waiting for all active writes to settle before daring to create a
background copying operation means that we will never do background
operations while the guest does anything (in write-blocking mode), and
therefore cannot converge. Yes, we also will not diverge, but actually
co
From: Hanna Reitz
There is a small gap in mirror_start_job() before putting the mirror
filter node into the block graph (bdrv_append() call) and the actual job
being created. Before the job is created, MirrorBDSOpaque.job is NULL.
It is possible that requests come in when bdrv_drained_end() is
From: Hanna Reitz
mirror_wait_for_free_in_flight_slot() is the only remaining user of
mirror_wait_for_any_operation(), so inline the latter into the former.
Signed-off-by: Hanna Reitz
Message-Id: <20221109165452.67927-3-hre...@redhat.com>
Reviewed-by: Kevin Wolf
Signed-off-by: Kevin Wolf
---
From: Hanna Reitz
We want to use bdrv_child_get_parent_aio_context() from
bdrv_parent_drained_{begin,end}_single(), both of which are "I/O or GS"
functions.
Prior to 3ed4f708fe1, all the implementations were I/O code anyway.
3ed4f708fe1 has put block jobs' AioContext field under the job mutex, s
From: Hanna Reitz
blk_get_aio_context() asserts that blk->ctx is always equal to the root
BDS's context (if there is a root BDS). Therefore,
blk_do_set_aio_context() must update blk->ctx immediately after the root
BDS's context has changed.
Without this patch, the next patch would break iotest
From: David Hildenbrand
If we update an existing memslot (e.g., resize, split), we temporarily
remove the memslot to re-add it immediately afterwards. These updates
are not atomic, especially not for KVM VCPU threads, such that we can
get spurious faults.
Let's inhibit most KVM ioctls while perf
QEMU needs to perform memslots operations like merging and splitting,
and each operation requires more than a single ioctl.
Therefore if a vcpu is concurrently reading the same memslots,
it could end up reading something that was temporarly deleted.
For example, merging two memslots into one would
Using the new accel-blocker API, mark where ioctls are being called
in KVM. Next, we will implement the critical section that will take
care of performing memslots modifications atomically, therefore
preventing any new ioctl from running and allowing the running ones
to finish.
Signed-off-by: Davi
This API allows the accelerators to prevent vcpus from issuing
new ioctls while execting a critical section marked with the
accel_ioctl_inhibit_begin/end functions.
Note that all functions submitting ioctls must mark where the
ioctl is being called with accel_{cpu_}ioctl_begin/end().
This API req
Most of the changes are trivial. The bits test timeout has now been increased
to 110 seconds in order to accommodate slower systems and fewer unnecessary
failures. Removed of the reference to non-existent README file in docs. Some
minor corrections in the doc file.
CC: Thomas Huth
CC: Michael S.
Il ven 11 nov 2022, 15:03 Alex Bennée ha scritto:
>
> Paolo Bonzini writes:
>
> > On 11/11/22 13:26, Alex Bennée wrote:
> >> if (addr > 0xfff || !index) {
> >> switch (attrs.requester_type) {
> >> }
> >> MSIMessage msi = { .address = addr, .data = val };
> >>
> From: Philippe Mathieu-Daudé
>
> GCC 8 added a -Wstringop-truncation warning:
>
> The -Wstringop-truncation warning added in GCC 8.0 via r254630 for
> bug 81117 is specifically intended to highlight likely unintended
> uses of the strncpy function that truncate the terminating NUL
> ch
On 11/11/2022 15.53, Markus Armbruster wrote:
Thomas Huth writes:
The "query-command-line-options" command uses a hand-crafted list
of options that should be returned for the "machine" parameter.
This is pretty much out of sync with reality, for example settings
like "kvm_shadow_mem" or "accel
Am 09.11.2022 um 15:44 hat Vladimir Sementsov-Ogievskiy geschrieben:
> On 11/8/22 15:37, Kevin Wolf wrote:
> > drained_end_counter is unused now, nobody changes its value any more. It
> > can be removed.
> >
> > In cases where we had two almost identical functions that only differed
> > in whether
On 11/11/2022 15.55, Alex Bennée wrote:
From: Stefan Weil
The docker probe uses "sudo -n" which can cause an e-mail with a security
warning
each time when configure is run. Therefore run docker probe only if either
docker
or podman are available.
That avoids the problematic "sudo -n" on buil
Reviewed-by: Stefan Hajnoczi
Am 09.11.2022 um 17:00 hat Vladimir Sementsov-Ogievskiy geschrieben:
> In subject: individual
>
> On 11/8/22 15:37, Kevin Wolf wrote:
> > bdrv_reopen() and friends use subtree drains as a lazy way of covering
> > all the nodes they touch. Turns out that this lazy way is a lot more
> > complicated
On 11/11/22 15:55, Alex Bennée wrote:
This is useful when trying to bisect a particular failing test behind
a docker run. For example:
make docker-test-clang@fedora \
TARGET_LIST=arm-softmmu \
TEST_COMMAND="meson test qtest-arm/qos-test" \
J=9 V=1
Signed-off-by: Alex Bennée
This removes the hacks to deal with empty current_cpu.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
---
v2
- update for new fields
- bool asserts
v3
- properly fail memory transactions from non-CPU sources
---
hw/timer/arm_mptimer.c | 49 +
As most HVF devices are done purely in software we need to make sure
we properly encode the source CPU in MemTxAttrs. This will allow the
device emulations to use those attributes rather than relying on
current_cpu (although current_cpu will still be correct in this case).
Signed-off-by: Alex Benn
Hi,
This series attempts to improve the modelling of non-CPU writes to
peripherals by expanding the MemTxAttrs to carry more details about
the requester. There are only 3 requester types, the CPU, the PCI bus
and the MACHINE. The last is intended for machine specific buses and
leaves the details o
Although most KVM users will use the in-kernel GIC emulation it is
perfectly possible not to. In this case we need to ensure the
MemTxAttrs are correctly populated so the GIC can divine the source
CPU of the operation.
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
---
v3
- new for
We currently have hacks across the hw/ to reference current_cpu to
work out what the current accessing CPU is. This breaks in some cases
including using gdbstub to access HW state. As we have MemTxAttrs to
describe details about the access lets extend it so CPU accesses can
be explicitly marked.
T
There are a number of helpers for M-profile that deal with CPU
initiated access to the vector and stack areas. While it is unlikely
these coincided with memory mapped IO devices it is not inconceivable.
Embedded targets tend to attract all sorts of interesting code and for
completeness we should ta
This allows us to drop the current_cpu hack and properly model an
invalid access to the vapic.
Signed-off-by: Alex Bennée
---
hw/i386/kvmvapic.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 43f8a8f679..a76e
Both arm_cpu_tlb_fill (for normal IO) and
arm_cpu_get_phys_page_attrs_debug (for debug access) come through
get_phys_addr which is setting the other memory attributes for the
transaction. As these are all by definition CPU accesses we can also
set the requested_type/index as appropriate.
We also h
We will need this shortly for machine specific transactions for the PC
IOAPIC.
Signed-off-by: Alex Bennée
---
include/exec/memattrs.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index 8359fc448b..b92f11aaa4 100644
--- a/include/ex
Both of these functions deal with CPU based access (as is evidenced by
the secure check straight after). Use the new MEMTXATTRS_CPU
constructor to ensure the correct CPU id is filled in should it ever
be needed by any devices later.
Signed-off-by: Alex Bennée
---
target/microblaze/helper.c | 4 +
get_physical_address works in the CPU context. Use the new
MEMTXATTRS_CPU constructor to ensure the correct CPU id is filled in
should it ever be needed by any devices later.
Currently the tlb_fill function isn't using the set with attributes
function so IO accesses from the softmmu slow-path will
Now that MxTxAttrs encodes a CPU we should use that to figure it out.
This solves edge cases like accessing via gdbstub or qtest. As we
should only be processing accesses from CPU cores we can push the CPU
extraction logic out to the main access functions. If the access does
not come from a CPU we
Fix typos (discovered with the 'codespell' utility).
Signed-off-by: Thomas Huth
---
hw/s390x/ipl.h | 2 +-
pc-bios/s390-ccw/cio.h | 2 +-
pc-bios/s390-ccw/iplb.h | 2 +-
target/s390x/cpu_models.h | 4 ++--
hw/s390x/s390-pci-vfio.c
The point of qtest is to simulate how running code might interact with
the system. However because it's not a real system we have places in
the code which especially handle check qtest_enabled() before
referencing current_cpu. Now we can encode these details in the
MemTxAttrs lets do that so we can
Some of the callbacks need a CPUState so extend the interface so we
can pass that down rather than relying on current_cpu hacks.
Signed-off-by: Alex Bennée
---
include/hw/isa/apm.h | 2 +-
hw/acpi/ich9.c | 1 -
hw/acpi/piix4.c | 2 +-
hw/isa/apm.c | 21 +
We can derive the correct CPU from CPUARMState so lets not rely on
current_cpu.
Signed-off-by: Alex Bennée
---
hw/arm/pxa2xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 93dda83d7a..065392a8bc 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/
This allows us to correctly model invalid accesses to the interrupt
controller as well as avoiding the use of current_cpu hacks to find
the APIC structure. We have to ensure we check for MSI signals first
which shouldn't arrive from the CPU but are either triggered by PCI or
internal IOAPIC writes.
This is simulating a bus master writing data back into system memory.
Mark it as such.
Signed-off-by: Alex Bennée
---
hw/audio/intel-hda.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index f38117057b..95c28b315c 100644
--- a/hw/
Both of the TLB fill functions and the cpu_sparc_get_phys_page deal
with CPU based access. Use the new MEMTXATTRS_CPU constructor to
ensure the correct CPU id is filled in should it ever be needed by any
devices later.
Signed-off-by: Alex Bennée
---
target/sparc/mmu_helper.c | 6 +++---
1 file c
On the real HW the IOAPIC is wired directly to the APIC and doesn't
really generate memory accesses on the main bus of the system. To
model this we can use the MTRT_MACHINE requester type and set the id
as a magic number to represent the IOAPIC as the source.
Signed-off-by: Alex Bennée
Cc: Paolo
Document the intended use of current_cpu and discourage its use in new
HW emulation code. Once we have fully converted the tree we should
probably move this extern to another header.
Signed-off-by: Alex Bennée
---
include/hw/core/cpu.h | 14 ++
1 file changed, 14 insertions(+)
diff
Where appropriate initialise with MEMTXATTRS_CPU otherwise use
MEMTXATTRS_UNSPECIFIED instead of the null initialiser.
Signed-off-by: Alex Bennée
---
target/i386/cpu.h | 4 +++-
target/i386/hax/hax-all.c | 2 +-
target/i386/nvmm/nvmm-all.c | 2 +-
target/i386/sev.c | 2 +-
Am 11.11.22 um 19:28 schrieb Thomas Huth:
Fix typos (discovered with the 'codespell' utility).
Signed-off-by: Thomas Huth
---
hw/s390x/ipl.h | 2 +-
pc-bios/s390-ccw/cio.h | 2 +-
pc-bios/s390-ccw/iplb.h | 2 +-
target/s390x/cpu_models.h
在 2022/11/11 3:00, Michael S. Tsirkin 写道:
On Sun, Oct 30, 2022 at 09:52:39PM +0800, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
Save the acked_features once it be configured by guest
virtio driver so it can't miss any features.
Note that this patch also change the features saving
The previous reply email has an text format error, please ignore and
在 2022/11/11 3:00, Michael S. Tsirkin 写道:
On Sun, Oct 30, 2022 at 09:52:39PM +0800, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
Save the acked_features once it be configured by guest
virtio driver so it can't miss
On Fri, 11 Nov 2022 at 10:29, Kevin Wolf wrote:
>
> The following changes since commit 2ccad61746ca7de5dd3e25146062264387e43bd4:
>
> Merge tag 'pull-tcg-20221109' of https://gitlab.com/rth7680/qemu into
> staging (2022-11-09 13:26:45 -0500)
>
> are available in the Git repository at:
>
> http
On 11/11/22 15:55, Alex Bennée wrote:
This should hopefully give is nice coverage information about what our
tests (or at least the subset we are running) have hit. Ideally we
would want a way to trigger coverage on tests likely to be affected by
the current commit.
IIUC per [*] this will not a
On Fri, Nov 11, 2022 at 06:25:25PM +, Alex Bennée wrote:
> Both of these functions deal with CPU based access (as is evidenced by
> the secure check straight after). Use the new MEMTXATTRS_CPU
> constructor to ensure the correct CPU id is filled in should it ever
> be needed by any devices late
The imsic DT binding has changed and no longer require an ipi-id.
The latest IMSIC driver dynamically allocates ipi id if slow-ipi
is not defined.
Get rid of the unused dt property which may lead to confusion.
Signed-off-by: Atish Patra
---
hw/riscv/virt.c | 2 --
include/hw/riscv/virt.
On 11/11/22 6:54 PM, Igor Mammedov wrote:
On Fri, 11 Nov 2022 17:34:04 +0800
Gavin Shan wrote:
On 11/11/22 5:13 PM, Igor Mammedov wrote:
On Fri, 11 Nov 2022 07:47:16 +0100
Markus Armbruster wrote:
Gavin Shan writes:
On 11/11/22 11:05 AM, Zhenyu Zhang wrote:
Commit ffac16fab3 "hostmem: int
On Thu, Nov 10, 2022 at 12:18:44AM +0100, Philippe Mathieu-Daudé wrote:
> Hi Conor,
>
> On 9/11/22 20:08, Conor Dooley wrote:
> > From: Conor Dooley
> >
> > @@ -168,6 +170,10 @@ static void mchp_pfsoc_ioscb_realize(DeviceState *dev,
> > Error **errp)
> > "mchp.pfsoc.
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