[PATCH v3 1/2] hw/intc: Fix LoongArch extioi function

2022-09-30 Thread Xiaojuan Yang
1.When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_type and id to get the cpu index. 2.Remove the unused extioi system memory region and we only support the extioi iocsr memory reg

[PATCH v3 2/2] hw/intc: Fix LoongArch ipi device emulation

2022-09-30 Thread Xiaojuan Yang
In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called i

[PATCH v3 0/2] Add memmap and fix bugs for LoongArch

2022-09-30 Thread Xiaojuan Yang
This series add memmap table and fix extioi, ipi device emulation for LoongArch virt machine. Changes for v3: 1. Remove the memmap table patch in this series, it will apply until we have more than one machinestate. 2. Using MemTxAttrs' requester_type and requester_id to get current cpu inde

Re: [PATCH 4/5] configure, meson: move C++ compiler detection to meson.build

2022-09-30 Thread Paolo Bonzini
On Wed, Sep 28, 2022 at 11:08 PM Richard Henderson wrote: > > On 9/28/22 12:21, Paolo Bonzini wrote: > > Heh, I wanted to get it in for exactly that reason, so that a future revert > > would not > > introduce the test in configure. But I guess having the patch out there on > > the archives > > m

[PATCH] pci-ids: sync docs + header

2022-09-30 Thread Gerd Hoffmann
docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, fix that. Try improve the comment which points to pci-ids.txt. Also drop the list of modern virtio devices and explain how they are calculated instead. Signed-off-by: Gerd Hoffmann --- docs/specs/pci-ids.txt | 19 ++--

[PATCH] meson: -display dbus and CFI are incompatible

2022-09-30 Thread Paolo Bonzini
The generated skeletons for DBus call the finalize method of the parent type using code like G_OBJECT_CLASS (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object); However, the finalize method is defined in a shared library that is not compiled with CFI. Do not enable anythin

Re: [PATCH] tests/migration: remove the unused local variable

2022-09-30 Thread Ján Tomko
On a Wednesday in 2022, dinglimin wrote: From: "dingli...@cmss.chinamobile.com" Remove the unused local variable "records". Signed-off-by: dinglimin --- tests/migration/guestperf/engine.py | 1 - 1 file changed, 1 deletion(-) Unused since its introduction in 409437e16df273fc5f78f6cd1cb53023e

Re: [PATCH] meson: -display dbus and CFI are incompatible

2022-09-30 Thread Marc-André Lureau
Hi On Fri, Sep 30, 2022 at 11:53 AM Paolo Bonzini wrote: > The generated skeletons for DBus call the finalize method of the parent > type using code like > > G_OBJECT_CLASS > (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object); > > However, the finalize method is defined in

Re: [PATCH] meson: -display dbus and CFI are incompatible

2022-09-30 Thread Paolo Bonzini
On Fri, Sep 30, 2022 at 9:59 AM Marc-André Lureau wrote: > > Hi > > On Fri, Sep 30, 2022 at 11:53 AM Paolo Bonzini wrote: >> >> The generated skeletons for DBus call the finalize method of the parent >> type using code like >> >> G_OBJECT_CLASS >> (qemu_dbus_display1_chardev_skeleton_parent_

Re: [PATCH] meson: -display dbus and CFI are incompatible

2022-09-30 Thread Daniel P . Berrangé
On Fri, Sep 30, 2022 at 11:59:34AM +0400, Marc-André Lureau wrote: > Hi > > On Fri, Sep 30, 2022 at 11:53 AM Paolo Bonzini wrote: > > > The generated skeletons for DBus call the finalize method of the parent > > type using code like > > > > G_OBJECT_CLASS > > (qemu_dbus_display1_chardev_skel

Re: [PATCH] win32: set threads name

2022-09-30 Thread Marc-André Lureau
Hi On Thu, Sep 29, 2022 at 9:53 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 9/29/22 06:41, marcandre.lur...@redhat.com wrote: > > void qemu_thread_naming(bool enable) > > { > > /* But note we don't actually name them on Windows yet */ > > name_threads = enable

Re: [PATCH] pci-ids: sync docs + header

2022-09-30 Thread Eric Auger
Hi Gerd, On 9/30/22 09:35, Gerd Hoffmann wrote: > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > fix that. Try improve the comment which points to pci-ids.txt. > > Also drop the list of modern virtio devices and explain how they > are calculated instead. > > Signed-off-by: G

Re: [Virtio-fs] virtiofsd: Any reason why there's not an "openat2" sandbox mode?

2022-09-30 Thread German Maglione
On Thu, Sep 29, 2022 at 7:03 PM Vivek Goyal wrote: > > On Thu, Sep 29, 2022 at 11:47:32AM -0400, Colin Walters wrote: > > > > > > On Thu, Sep 29, 2022, at 10:10 AM, Vivek Goyal wrote: > > > > > What's your use case. How do you plan to use virtiofs. > > > > At the current time, the Kubernetes that

Re: [PATCH 5/7] qga: Add support for user password setting in FreeBSD

2022-09-30 Thread Marc-André Lureau
Hi On Thu, Sep 29, 2022 at 6:29 PM Alexander Ivanov < alexander.iva...@virtuozzo.com> wrote: > > On 29.09.2022 13:22, Marc-André Lureau wrote: > > > > > > Caution: This is an external email and has a suspicious subject or > > content. Please take care when clicking links or opening attachments. >

Re: [PATCH v3] virtio-scsi: Send "REPORTED LUNS CHANGED" sense data upon disk hotplug events.

2022-09-30 Thread Paolo Bonzini
On Fri, Sep 30, 2022 at 12:31 AM Venu Busireddy wrote: > > >*/ > > > !(buf[0] == REQUEST_SENSE && d->sense_is_ua))) { > > > ops = &reqops_unit_attention; > > > +d->clear_reported_luns_changed = true; > > > > Any reason to have this flag, and not just clear >

Re: [PATCH 1/6] device-tree: add re-randomization helper function

2022-09-30 Thread Bin Meng
On Fri, Sep 30, 2022 at 7:24 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Several > architectures require this functionality, so export a function for > injecting a new seed into the given F

Re: [PATCH v8 6/8] KVM: Update lpage info when private/shared memory are mixed

2022-09-30 Thread Chao Peng
On Thu, Sep 29, 2022 at 09:52:06AM -0700, Isaku Yamahata wrote: > On Thu, Sep 15, 2022 at 10:29:11PM +0800, > Chao Peng wrote: > > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > > index 08abad4f3e6f..a0f198cede3d 100644 > > --- a/arch/x86/kvm/mmu/mmu.c > > +++ b/arch/x86/kvm/mmu

[PULL v2 00/15] x86 + misc changes for 2022-09-29

2022-09-30 Thread Paolo Bonzini
The following changes since commit 99d6b11b5b44d7dd64f4cb1973184e40a4a174f8: Merge tag 'pull-target-arm-20220922' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-09-26 13:38:26 -0400) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/for

[PULL v2 09/15] meson: -display dbus and CFI are incompatible

2022-09-30 Thread Paolo Bonzini
The generated skeletons for DBus call the finalize method of the parent type using code like G_OBJECT_CLASS (qemu_dbus_display1_chardev_skeleton_parent_class)->finalize (object); However, the finalize method is defined in a shared library that is not compiled with CFI. Do not enable anythin

Re: [PATCH 4/6] openrisc: re-randomize rng-seed on reboot

2022-09-30 Thread Bin Meng
On Fri, Sep 30, 2022 at 7:26 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we h

Re: [PATCH 2/6] arm: re-randomize rng-seed on reboot

2022-09-30 Thread Bin Meng
On Fri, Sep 30, 2022 at 7:26 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we h

Re: [PATCH 3/6] riscv: re-randomize rng-seed on reboot

2022-09-30 Thread Bin Meng
On Fri, Sep 30, 2022 at 7:24 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we h

Re: [PATCH 5/6] rx: re-randomize rng-seed on reboot

2022-09-30 Thread Bin Meng
On Fri, Sep 30, 2022 at 7:24 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we h

Re: [PATCH 6/6] mips: re-randomize rng-seed on reboot

2022-09-30 Thread Bin Meng
On Fri, Sep 30, 2022 at 7:28 AM Jason A. Donenfeld wrote: > > When the system reboots, the rng-seed that the FDT has should be > re-randomized, so that the new boot gets a new seed. Since the FDT is in > the ROM region at this point, we add a hook right after the ROM has been > added, so that we h

Re: [PATCH v1 4/7] util: Add write-only "node-affinity" property for ThreadContext

2022-09-30 Thread David Hildenbrand
On 29.09.22 13:13, Markus Armbruster wrote: David Hildenbrand writes: Let's make it easier to pin threads created via a ThreadContext to all current CPUs belonging to given NUMA nodes. As "node-affinity" is simply a shortcut for setting "cpu-affinity", that property cannot be read and if the

Re: [PATCH v2] scsi-disk: support setting CD-ROM block size via device options

2022-09-30 Thread Paolo Bonzini
Queued, thanks. Sorry for the delay. Paolo

[PATCH] docs: add firmware feature flags

2022-09-30 Thread Gerd Hoffmann
Add new firmware feature flags for the recently added confidential computing operating modes by amd and intel. Signed-off-by: Gerd Hoffmann --- docs/interop/firmware.json | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/docs/interop/firmware.json b/docs/inte

Re: [PATCH] pci-ids: sync docs + header

2022-09-30 Thread Michael S. Tsirkin
On Fri, Sep 30, 2022 at 09:35:53AM +0200, Gerd Hoffmann wrote: > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > fix that. Try improve the comment which points to pci-ids.txt. > > Also drop the list of modern virtio devices and explain how they > are calculated instead. > > Si

Re: [PATCH] pci-ids: sync docs + header

2022-09-30 Thread Peter Maydell
On Fri, 30 Sept 2022 at 08:35, Gerd Hoffmann wrote: > > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > fix that. Try improve the comment which points to pci-ids.txt. > > Also drop the list of modern virtio devices and explain how they > are calculated instead. > > Signed-off-b

Re: [PATCH] docs: add firmware feature flags

2022-09-30 Thread Kashyap Chamarthy
On Fri, Sep 30, 2022 at 11:18:33AM +0200, Gerd Hoffmann wrote: > Add new firmware feature flags for the recently added confidential > computing operating modes by amd and intel. > > Signed-off-by: Gerd Hoffmann > --- > docs/interop/firmware.json | 17 ++--- > 1 file changed, 14 inser

[PATCH v4 0/2] Add memmap and fix bugs for LoongArch

2022-09-30 Thread Xiaojuan Yang
This series add memmap table and fix extioi, ipi device emulation for LoongArch virt machine. Changes for v4: Add 'reviewed-by' tag in fixing ipi patch, and other changes are the same as v3. 1. Remove the memmap table patch in this series, it will apply until we have more than one machinestate.

[PATCH v4 1/2] hw/intc: Fix LoongArch extioi function

2022-09-30 Thread Xiaojuan Yang
1.When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_type and id to get the cpu index. 2.Remove the unused extioi system memory region and we only support the extioi iocsr memory reg

Re: [PATCH] pci-ids: sync docs + header

2022-09-30 Thread Gerd Hoffmann
On Fri, Sep 30, 2022 at 05:22:33AM -0400, Michael S. Tsirkin wrote: > On Fri, Sep 30, 2022 at 09:35:53AM +0200, Gerd Hoffmann wrote: > > docs/specs/pci-ids.txt and include/hw/pci/pci.h are out of sync, > > fix that. Try improve the comment which points to pci-ids.txt. > > > > Also drop the list o

[PATCH v4 2/2] hw/intc: Fix LoongArch ipi device emulation

2022-09-30 Thread Xiaojuan Yang
In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called i

Re: [PATCH 1/2] vvfat: allow some writes to bootsector

2022-09-30 Thread Kevin Wolf
Am 29.09.2022 um 21:53 hat Hervé Poussineau geschrieben: > Le 29/09/2022 à 16:10, Kevin Wolf a écrit : > > Am 03.09.2022 um 18:23 hat Hervé Poussineau geschrieben: > > > 'reserved1' field in bootsector is used to mark volume dirty, or need to > > > verify. > > > Allow writes to bootsector which on

Re: [PATCH 1/2] linux-aio: use LinuxAioState from the running thread

2022-09-30 Thread Emanuele Giuseppe Esposito
Am 29/09/2022 um 16:52 schrieb Kevin Wolf: > Am 09.06.2022 um 15:44 hat Emanuele Giuseppe Esposito geschrieben: >> From: Paolo Bonzini >> >> Remove usage of aio_context_acquire by always submitting asynchronous >> AIO to the current thread's LinuxAioState. >> >> Signed-off-by: Paolo Bonzini >>

Re: [PATCH v5 2/2] block: Refactor get_tmp_filename()

2022-09-30 Thread Kevin Wolf
Am 28.09.2022 um 16:41 hat Bin Meng geschrieben: > From: Bin Meng > > At present there are two callers of get_tmp_filename() and they are > inconsistent. > > One does: > > /* TODO: extra byte is a hack to ensure MAX_PATH space on Windows. */ > char *tmp_filename = g_malloc0(PATH_MAX + 1

Re: [PATCHv3 0/2] qemu direct io alignment fix

2022-09-30 Thread Kevin Wolf
Am 29.09.2022 um 22:05 hat Keith Busch geschrieben: > From: Keith Busch > > Changes from v2: > > Split the patch so that the function move is separate from the > functional change. This makes it immediately obvious what criteria is > changing. (Kevin Wolf) > > Added received Tested-by t

[PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

2022-09-30 Thread Peter Maydell
Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though there is no pending signal to be taken. In commit 94ccff13382055 we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the generic KVM code. Adopt the same approach for the use of the ioctl in the Arm-specific KVM code (where

Re: [PATCH v7 3/5] module: add Error arguments to module_load and module_load_qom

2022-09-30 Thread Markus Armbruster
Claudio Fontana writes: > On 9/28/22 13:31, Markus Armbruster wrote: >> Claudio Fontana writes: >> >>> improve error handling during module load, by changing: >>> >>> bool module_load(const char *prefix, const char *lib_name); >>> void module_load_qom(const char *type); >>> >>> to: >>> >>> int

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

2022-09-30 Thread Peter Maydell
On Sun, 25 Sept 2022 at 12:15, Richard Henderson wrote: > > Prepare for targets to be able to produce TBs that can > run in more than one virtual context. > -/* Similarly, but for logs. */ > +/* > + * Similarly, but for logs. In this case, when the virtual pc > + * is not available, use the physi

Re: [PATCH 2/2] thread-pool: use ThreadPool from the running thread

2022-09-30 Thread Emanuele Giuseppe Esposito
Am 29/09/2022 um 17:30 schrieb Kevin Wolf: > Am 09.06.2022 um 15:44 hat Emanuele Giuseppe Esposito geschrieben: >> Remove usage of aio_context_acquire by always submitting work items >> to the current thread's ThreadPool. >> >> Signed-off-by: Paolo Bonzini >> Signed-off-by: Emanuele Giuseppe Es

Re: [PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

2022-09-30 Thread Vitaly Chikunov
On Fri, Sep 30, 2022 at 12:38:24PM +0100, Peter Maydell wrote: > Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though > there is no pending signal to be taken. In commit 94ccff13382055 > we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the > generic KVM code. Adopt the same

Re: [PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

2022-09-30 Thread Marc Zyngier
On Fri, 30 Sep 2022 12:38:24 +0100, Peter Maydell wrote: > > Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though > there is no pending signal to be taken. In commit 94ccff13382055 > we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the > generic KVM code. Adopt the same a

[PATCH v2 1/2] hw/intc: sifive_plic: fix hard-coded max priority level

2022-09-30 Thread Jim Shu
The maximum priority level is hard-coded when writing to interrupt priority register. However, when writing to priority threshold register, the maximum priority level is from num_priorities Property which is configured by platform. Also change interrupt priority register to use num_priorities Prop

Re: [PATCH] MAINTAINERS: step back from PPC

2022-09-30 Thread David Gibson
On Thu, Sep 29, 2022 at 08:13:40PM +0200, Greg Kurz wrote: > On Thu, 29 Sep 2022 20:09:46 +0200 > Cédric Le Goater wrote: > > > I am not active anymore on the PPC maintainership, degrade my self as > > standard Reviewer. Also degrade PowerNV and XIVE status since I am not > > funded for this work

[PATCH v2 0/2] Enhance maximum priority support of PLIC

2022-09-30 Thread Jim Shu
This patchset fixes hard-coded maximum priority of interrupt priority register and also changes this register to WARL field to align the PLIC spec. Changelog: v2: * change interrupt priority register to WARL field. Jim Shu (2): hw/intc: sifive_plic: fix hard-coded max priority level hw/int

[PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field

2022-09-30 Thread Jim Shu
PLIC spec [1] requires interrupt source priority registers are WARL field and the number of supported priority is power-of-2 to simplify SW discovery. Existing QEMU RISC-V machine (e.g. shakti_c) don't strictly follow PLIC spec, whose number of supported priority is not power-of-2. Just change eac

Re: [PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field

2022-09-30 Thread Clément Chigot
Hi Jim, On Fri, Sep 30, 2022 at 2:32 PM Jim Shu wrote: > > PLIC spec [1] requires interrupt source priority registers are WARL > field and the number of supported priority is power-of-2 to simplify SW > discovery. > > Existing QEMU RISC-V machine (e.g. shakti_c) don't strictly follow PLIC > spec,

Re: [PATCH v3] target/arm/kvm: Retry KVM_CREATE_VM call if it fails EINTR

2022-09-30 Thread Eric Auger
Hi Peter, On 9/30/22 13:38, Peter Maydell wrote: > Occasionally the KVM_CREATE_VM ioctl can return EINTR, even though > there is no pending signal to be taken. In commit 94ccff13382055 > we added a retry-on-EINTR loop to the KVM_CREATE_VM call in the > generic KVM code. Adopt the same approach for

Re: [PATCH v2 2/2] hw/intc: sifive_plic: change interrupt priority register to WARL field

2022-09-30 Thread Jim Shu
hi Clément, Thank you very much. I'll fix it in the next version patch. Thanks, Jim Shu On Fri, Sep 30, 2022 at 8:58 PM Clément Chigot wrote: > > Hi Jim, > > On Fri, Sep 30, 2022 at 2:32 PM Jim Shu wrote: > > > > PLIC spec [1] requires interrupt source priority registers are WARL > > field a

Re: Commit 'iomap: add support for dma aligned direct-io' causes qemu/KVM boot failures

2022-09-30 Thread Thorsten Leemhuis
TWIMC: this mail is primarily send for documentation purposes and for regzbot, my Linux kernel regression tracking bot. These mails usually contain '#forregzbot' in the subject, to make them easy to spot and filter. [TLDR: I'm adding this regression report to the list of tracked regressions; all t

Re: [PATCH 5/7] qga: Add support for user password setting in FreeBSD

2022-09-30 Thread Alexander Ivanov
Hi On 30.09.2022 10:19, Marc-André Lureau wrote: Caution: This is an external email and has a suspicious subject or content. Please take care when clicking links or opening attachments. When in doubt, contact your IT Department Hi On Thu, Sep 29, 2022 at 6:29 PM Alexander Ivanov

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

2022-09-30 Thread Alex Bennée
Peter Maydell writes: > On Sun, 25 Sept 2022 at 12:15, Richard Henderson > wrote: >> >> Prepare for targets to be able to produce TBs that can >> run in more than one virtual context. > >> -/* Similarly, but for logs. */ >> +/* >> + * Similarly, but for logs. In this case, when the virtual pc

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

2022-09-30 Thread Peter Maydell
On Fri, 30 Sept 2022 at 14:23, Alex Bennée wrote: > > > Peter Maydell writes: > > This is going to break previously working setups involving > > the "filter logging to a particular address range" and also > > anybody post-processing logfiles and expecting to see > > the virtual address in -d exec

[PATCH v2] docs: add firmware feature flags

2022-09-30 Thread Gerd Hoffmann
Add new firmware feature flags for the recently added confidential computing operating modes by amd and intel. While being at it also fix the path to the amd sev documentation. Signed-off-by: Gerd Hoffmann Reviewed-by: Kashyap Chamarthy --- docs/interop/firmware.json | 21 -

[PULL 06/10] hw/arm/virt: Fix devicetree warning about the root node

2022-09-30 Thread Peter Maydell
From: Jean-Philippe Brucker The devicetree specification requires a 'model' property in the root node. Fix the corresponding dt-validate warning: /: 'model' is a required property From schema: dtschema/schemas/root-node.yaml Use the same name for model as for compatible. The specification r

Re: [PATCH] win32: set threads name

2022-09-30 Thread Richard Henderson
On 9/30/22 01:08, Marc-André Lureau wrote: Hi On Thu, Sep 29, 2022 at 9:53 PM Richard Henderson > wrote: On 9/29/22 06:41, marcandre.lur...@redhat.com wrote: >   void qemu_thread_naming(bool enable) >   {

[PULL 07/10] hw/arm/virt: Fix devicetree warning about the GIC node

2022-09-30 Thread Peter Maydell
From: Jean-Philippe Brucker The GICv3 bindings requires a #msi-cells property for the ITS node. Fix the corresponding dt-validate warning: interrupt-controller@800: msi-controller@808: '#msi-cells' is a required property From schema: linux/Documentation/devicetree/bindings/interrup

[PULL 00/10] target-arm queue

2022-09-30 Thread Peter Maydell
'pull-request-2022-09-28' of https://gitlab.com/thuth/qemu into staging (2022-09-28 17:04:11 -0400) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220930 for you to fetch changes up to beeec926d24aac28f95cc7694ef383

[PULL 05/10] hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers

2022-09-30 Thread Peter Maydell
From: Francisco Iglesias Connect ZynqMP's USB controllers. Signed-off-by: Francisco Iglesias Acked-by: Alistair Francis Message-id: 20220920081517.25401-1-frasse.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-zynqmp.h | 3 +++ hw/arm/xlnx

[PULL 04/10] target/arm: Rearrange cpu64.c so all the CPU initfns are together

2022-09-30 Thread Peter Maydell
cpu64.c has ended up in a slightly odd order -- it starts with the initfns for most of the models-real-hardware CPUs; after that comes a bunch of support code for SVE, SME, pauth and LPA2 properties. Then come the initfns for the 'host' and 'max' CPU types, and then after that one more models-real

[PULL 03/10] target/arm: Update SDCR_VALID_MASK to include SCCD

2022-09-30 Thread Peter Maydell
Our SDCR_VALID_MASK doesn't include all of the bits which are defined by the current architecture. In particular in commit 0b42f4fab9d3 we forgot to add SCCD, which meant that an AArch32 guest couldn't actually use the SCCD bit to disable counting in Secure state. Add all the currently defined bi

[PULL 01/10] target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO

2022-09-30 Thread Peter Maydell
In commit 01765386a888 we made some system register write functions call pmu_op_start()/pmu_op_finish(). This means that they now touch timers, so for icount to work these registers must have the ARM_CP_IO flag set. This fixes a bug where when icount is enabled a guest that touches MDCR_EL3, MDCR_

[PULL 09/10] hw/arm/virt: Fix devicetree warning about the SMMU node

2022-09-30 Thread Peter Maydell
From: Jean-Philippe Brucker The SMMUv3 node isn't expected to have clock properties (unlike the SMMUv2). Fix the corresponding dt-validate warning: smmuv3@905: 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: linux/Documentation/devicetree/bindings/

[PULL 08/10] hw/arm/virt: Use "msi-map" devicetree property for PCI

2022-09-30 Thread Peter Maydell
From: Jean-Philippe Brucker The "msi-parent" property can be used on the PCI node when MSIs do not contain sideband data (device IDs) [1]. In QEMU, MSI transactions contain the requester ID, so the PCI node should use the "msi-map" property instead of "msi-parent". In our case the property descri

Re: [PATCH] win32: set threads name

2022-09-30 Thread Marc-André Lureau
Hi On Fri, Sep 30, 2022 at 5:35 PM Richard Henderson < richard.hender...@linaro.org> wrote: > On 9/30/22 01:08, Marc-André Lureau wrote: > > Hi > > > > On Thu, Sep 29, 2022 at 9:53 PM Richard Henderson < > richard.hender...@linaro.org > > > wrote: > > > >

[PULL 10/10] target/arm: mark SP_EL1 with ARM_CP_EL3_NO_EL2_KEEP

2022-09-30 Thread Peter Maydell
From: Jerome Forissier SP_EL1 must be kept when EL3 is present but EL2 is not. Therefore mark it with ARM_CP_EL3_NO_EL2_KEEP. Cc: qemu-sta...@nongnu.org Fixes: 696ba3771894 ("target/arm: Handle cpreg registration for missing EL") Signed-off-by: Jerome Forissier Reviewed-by: Richard Henderson M

[PULL 02/10] target/arm: Make writes to MDCR_EL3 use PMU start/finish calls

2022-09-30 Thread Peter Maydell
In commit 01765386a88868 we fixed a bug where we weren't correctly bracketing changes to some registers with pmu_op_start() and pmu_op_finish() calls for changes which affect whether the PMU counters might be enabled. However, we missed the case of writes to the AArch64 MDCR_EL3 register, because

Re: [PATCH v2 for-7.2 0/2] pci *_by_mask() coverity fix

2022-09-30 Thread Paolo Bonzini
On Fri, Sep 30, 2022 at 3:36 PM wrote: > Ping! This series has been reviewed. > > I can take it via target-arm.next if you'd prefer. Yeah, I would say just take it through your tree. Reviewed-by: Paolo Bonzini Paolo

[PATCH v2 3/5] pci-ids: drop PCI_DEVICE_ID_VIRTIO_PMEM

2022-09-30 Thread Gerd Hoffmann
Not needed for a virtio 1.0 device. Signed-off-by: Gerd Hoffmann --- include/hw/pci/pci.h| 1 - hw/virtio/virtio-pmem-pci.c | 2 -- 2 files changed, 3 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b6aefb33fb17..42c83cb5ed00 100644 --- a/include/hw/pci/pci.h

Re: [PATCH] win32: set threads name

2022-09-30 Thread Richard Henderson
On 9/30/22 06:45, Marc-André Lureau wrote: So you suggest simply setting "name_threads" to false when loading the function failed? Yes. r~

[PATCH v2 4/5] pci-ids: drop PCI_DEVICE_ID_VIRTIO_VSOCK

2022-09-30 Thread Gerd Hoffmann
Not needed for a virtio 1.0 device. Signed-off-by: Gerd Hoffmann --- include/hw/pci/pci.h | 1 - hw/virtio/vhost-user-vsock-pci.c | 2 -- hw/virtio/vhost-vsock-pci.c | 2 -- 3 files changed, 5 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 42c83cb5e

[PATCH v2 2/5] pci-ids: drop PCI_DEVICE_ID_VIRTIO_MEM

2022-09-30 Thread Gerd Hoffmann
Not needed for a virtio 1.0 device. Signed-off-by: Gerd Hoffmann --- include/hw/pci/pci.h | 1 - hw/virtio/virtio-mem-pci.c | 2 -- 2 files changed, 3 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 89eaca429389..b6aefb33fb17 100644 --- a/include/hw/pci/pci.h +

[PATCH v2] win32: set threads name

2022-09-30 Thread marcandre . lureau
From: Marc-André Lureau As described in: https://learn.microsoft.com/en-us/visualstudio/debugger/how-to-set-a-thread-name-in-native-code?view=vs-2022 SetThreadDescription() is available since Windows 10, version 1607 and in some versions only by "Run Time Dynamic Linking". Its declaration is not

Re: [PATCH v2] win32: set threads name

2022-09-30 Thread Richard Henderson
On 9/30/22 06:57, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau As described in: https://learn.microsoft.com/en-us/visualstudio/debugger/how-to-set-a-thread-name-in-native-code?view=vs-2022 SetThreadDescription() is available since Windows 10, version 1607 and in some versions onl

[PATCH v2 1/5] pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMU

2022-09-30 Thread Gerd Hoffmann
Not needed for a virtio 1.0 device. Signed-off-by: Gerd Hoffmann --- include/hw/pci/pci.h | 1 - hw/virtio/virtio-iommu-pci.c | 4 +--- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b54b6ef88fc3..89eaca429389 100644 --- a/

[PATCH v2 0/5] pci-ids: virtio cleanup

2022-09-30 Thread Gerd Hoffmann
Drop legacy ids for virtio 1.0 devices, they are not needed and will be overridden anyway by generic virtio pci code. Improve modern virtio id documentation. Gerd Hoffmann (5): pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMU pci-ids: drop PCI_DEVICE_ID_VIRTIO_MEM pci-ids: drop PCI_DEVICE_ID_VIRTIO

Re: [PATCH v3 1/3] target/loongarch: bstrins.w src register need EXT_NONE

2022-09-30 Thread Richard Henderson
On 9/29/22 19:45, Song Gao wrote: use gen_bstrins/gen_bstrpic to replace gen_rr_ms_ls. Suggested-by: Richard Henderson Signed-off-by: Song Gao --- target/loongarch/insn_trans/trans_bit.c.inc | 36 + 1 file changed, 22 insertions(+), 14 deletions(-) Reviewed-by: Richard H

[PATCH qemu] mips/malta: pass RNG seed to to kernel via env var

2022-09-30 Thread Jason A. Donenfeld
With the kernel patch linked below, Linux ingests a RNG seed passed from the hypervisor. So, pass this for the Malta platform, and reinitialize it on reboot too, so that it's always fresh. Link: https://lore.kernel.org/linux-mips/20220930140138.575751-1-ja...@zx2c4.com/ Signed-off-by: Jason A. Do

Re: [PATCH v3 3/3] softfloat: logB(0) should raise divideByZero exception

2022-09-30 Thread Richard Henderson
On 9/29/22 19:45, Song Gao wrote: logB(0) should raise divideByZero exception from IEEE 754-2008 spec 7.3 Suggested-by: Richard Henderson Signed-off-by: Song Gao --- fpu/softfloat-parts.c.inc | 1 + 1 file changed, 1 insertion(+) Reviewed-by: Richard Henderson r~

[PATCH v3] win32: set threads name

2022-09-30 Thread marcandre . lureau
From: Marc-André Lureau As described in: https://learn.microsoft.com/en-us/visualstudio/debugger/how-to-set-a-thread-name-in-native-code?view=vs-2022 SetThreadDescription() is available since Windows 10, version 1607 and in some versions only by "Run Time Dynamic Linking". Its declaration is not

[PATCH v2 5/5] pci-ids: drop list of modern virtio devices

2022-09-30 Thread Gerd Hoffmann
Drop the list of modern virtio devices and explain how they are calculated instead. Signed-off-by: Gerd Hoffmann --- docs/specs/pci-ids.txt | 15 ++- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/docs/specs/pci-ids.txt b/docs/specs/pci-ids.txt index dd6859d039d0..a289

Re: [PATCH v4 1/2] hw/intc: Fix LoongArch extioi function

2022-09-30 Thread Richard Henderson
On 9/30/22 02:51, Xiaojuan Yang wrote: 1.When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_type and id to get the cpu index. 2.Remove the unused extioi system memory region and we

Re: [PATCH v3] win32: set threads name

2022-09-30 Thread Richard Henderson
On 9/30/22 07:03, marcandre.lur...@redhat.com wrote: +static bool +set_thread_description(HANDLE h, const char *name) +{ + HRESULT hr; + g_autofree wchar_t *namew = NULL; + + if (!load_set_thread_description()) { + return false; + } I don't understand why you're retaining this. What is

Re: [PATCH v2 0/5] pci-ids: virtio cleanup

2022-09-30 Thread David Hildenbrand
On 30.09.22 15:58, Gerd Hoffmann wrote: Drop legacy ids for virtio 1.0 devices, they are not needed and will be overridden anyway by generic virtio pci code. Improve modern virtio id documentation. Gerd Hoffmann (5): pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMU pci-ids: drop PCI_DEVICE_ID_VIR

Re: [RFC PATCH v2 02/29] target/ppc: always use ppc_set_irq to set env->pending_interrupts

2022-09-30 Thread Fabiano Rosas
Matheus Ferst writes: > Use ppc_set_irq to raise/clear interrupts to ensure CPU_INTERRUPT_HARD > will be set/reset accordingly. > > Signed-off-by: Matheus Ferst Reviewed-by: Fabiano Rosas

Re: [PATCH v2 1/5] pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMU

2022-09-30 Thread Peter Maydell
On Fri, 30 Sept 2022 at 14:58, Gerd Hoffmann wrote: > > Not needed for a virtio 1.0 device. > > Signed-off-by: Gerd Hoffmann > --- > include/hw/pci/pci.h | 1 - > hw/virtio/virtio-iommu-pci.c | 4 +--- > 2 files changed, 1 insertion(+), 4 deletions(-) > > diff --git a/include/hw/pci/pci.

Re: [PATCH v2 5/5] pci-ids: drop list of modern virtio devices

2022-09-30 Thread Eric Auger
On 9/30/22 15:58, Gerd Hoffmann wrote: > Drop the list of modern virtio devices and explain how they > are calculated instead. > > Signed-off-by: Gerd Hoffmann Reviewed-by: Eric Auger Eric > --- > docs/specs/pci-ids.txt | 15 ++- > 1 file changed, 6 insertions(+), 9 deletions(-)

Re: [PATCH v3] virtio-scsi: Send "REPORTED LUNS CHANGED" sense data upon disk hotplug events.

2022-09-30 Thread Venu Busireddy
On 2022-09-30 10:41:03 +0200, Paolo Bonzini wrote: > On Fri, Sep 30, 2022 at 12:31 AM Venu Busireddy > wrote: > > > >*/ > > > > !(buf[0] == REQUEST_SENSE && d->sense_is_ua))) { > > > > ops = &reqops_unit_attention; > > > > +d->clear_reported_luns_changed = tr

Re: [PATCH v2 1/5] pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMU

2022-09-30 Thread Eric Auger
Hi Gerd, On 9/30/22 15:58, Gerd Hoffmann wrote: > Not needed for a virtio 1.0 device. > > Signed-off-by: Gerd Hoffmann Reviewed-by: Eric Auger Tested-by: Eric Auger Eric > --- > include/hw/pci/pci.h | 1 - > hw/virtio/virtio-iommu-pci.c | 4 +--- > 2 files changed, 1 insertion(+), 4 d

Re: [PATCH 2/2] thread-pool: use ThreadPool from the running thread

2022-09-30 Thread Emanuele Giuseppe Esposito
Am 30/09/2022 um 14:17 schrieb Emanuele Giuseppe Esposito: > > > Am 29/09/2022 um 17:30 schrieb Kevin Wolf: >> Am 09.06.2022 um 15:44 hat Emanuele Giuseppe Esposito geschrieben: >>> Remove usage of aio_context_acquire by always submitting work items >>> to the current thread's ThreadPool. >>>

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

2022-09-30 Thread Alex Bennée
Peter Maydell writes: > On Fri, 30 Sept 2022 at 14:23, Alex Bennée wrote: >> >> >> Peter Maydell writes: >> > This is going to break previously working setups involving >> > the "filter logging to a particular address range" and also >> > anybody post-processing logfiles and expecting to see

Re: [PATCH 1/2] target/arm: Disable VFPv4-D32 when NEON is not available

2022-09-30 Thread Cédric Le Goater
On 9/29/22 13:44, Peter Maydell wrote: On Wed, 28 Sept 2022 at 17:47, Cédric Le Goater wrote: As the Cortex A7 MPCore Technical reference says : "When FPU option is selected without NEON, the FPU is VFPv4-D16 and uses 16 double-precision registers. When the FPU is implemented with NE

Re: [PATCH qemu] mips/malta: pass RNG seed to to kernel via env var

2022-09-30 Thread Daniel P . Berrangé
On Fri, Sep 30, 2022 at 04:05:20PM +0200, Jason A. Donenfeld wrote: > With the kernel patch linked below, Linux ingests a RNG seed > passed from the hypervisor. So, pass this for the Malta platform, and > reinitialize it on reboot too, so that it's always fresh. > > Link: > https://lore.kernel.or

Re: [PATCH qemu] mips/malta: pass RNG seed to to kernel via env var

2022-09-30 Thread Jason A. Donenfeld
On Fri, Sep 30, 2022 at 5:05 PM Daniel P. Berrangé wrote: > The +1 suggests you're intending to NUL terminate, but nothing > in this patch ever initializes this last byte. Incorrect. sprintf("%02x") writes 3 bytes, the last of which is 0.

Re: [PATCH v5 16/17] accel/tcg: Introduce TARGET_TB_PCREL

2022-09-30 Thread Peter Maydell
On Fri, 30 Sept 2022 at 15:59, Alex Bennée wrote: > > > Peter Maydell writes: > > It can be very useful for "give me a list of all the > > PC values where we executed an instruction", for shorter > > test cases. You can then (given several of these) look at > > where two runs diverge, and similar

Re: [PATCH 1/2] target/arm: Disable VFPv4-D32 when NEON is not available

2022-09-30 Thread Peter Maydell
On Fri, 30 Sept 2022 at 15:59, Cédric Le Goater wrote: > > On 9/29/22 13:44, Peter Maydell wrote: > > If you want to be able to turn off D32 and restrict to 16 > > registers, I think you need to add a separate property to > > control that. > > Something like "vfp-d16" ? That ends up being a sort

[PATCH 1/4] qapi, i386/sev: Change the reduced-phys-bits value from 5 to 1

2022-09-30 Thread Tom Lendacky
A guest only ever experiences, at most, 1 bit of reduced physical addressing. Change the query-sev-capabilities json comment to use 1. Fixes: 31dd67f684 ("sev/i386: qmp: add query-sev-capabilities command") Signed-off-by: Tom Lendacky --- qapi/misc-target.json | 2 +- 1 file changed, 1 insertion

[PATCH 2/4] qemu-options.hx: Update the reduced-phys-bits documentation

2022-09-30 Thread Tom Lendacky
A guest only ever experiences, at most, 1 bit of reduced physical addressing. Update the documentation to reflect this as well as change the example value on the reduced-phys-bits option. Fixes: a9b4942f48 ("target/i386: add Secure Encrypted Virtualization (SEV) object") Signed-off-by: Tom Lendac

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