Re: [PATCH v8 3/3] target/riscv: Add vstimecmp support

在 2022/8/9 上午1:20, Atish Kumar Patra 写道: On Sun, Aug 7, 2022 at 6:50 PM Weiwei Li > wrote: 在 2022/8/4 上午9:42, Atish Patra 写道: > vstimecmp CSR allows the guest OS or to program the next guest timer > interrupt directly. Thus, hypervisor no longer need

Re: [PATCH v7 08/12] vdpa: Move command buffers map to start of net device

On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > As this series will reuse them to restore the device state at the end of > a migration (or a device start), let's allocate only once at the device > start so we don't duplicate their map and unmap. > > Signed-off-by: Eugenio Pérez > --- > n

Re: [PATCH v7 09/12] vdpa: Extract vhost_vdpa_net_cvq_add from vhost_vdpa_net_handle_ctrl_avail

On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > So we can reuse it to inject state messages. > > Signed-off-by: Eugenio Pérez Acked-by: Jason Wang > -- > v7: > * Remove double free error > > v6: > * Do not assume in buffer sent to the device is sizeof(virtio_net_ctrl_ack) > > v5: > * D

Re: [PATCH v7 11/12] vdpa: Add virtio-net mac address via CVQ at start

On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > This is needed so the destination vdpa device see the same state a the > guest set in the source. > > Signed-off-by: Eugenio Pérez > --- > v6: > * Map and unmap command buffers at the start and end of device usage. > > v5: > * Rename s/start

Re: [PATCH v7 12/12] vdpa: Delete CVQ migration blocker

On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > We can restore the device state in the destination via CVQ now. Remove > the migration blocker. > > Signed-off-by: Eugenio Pérez Acked-by: Jason Wang > --- > include/hw/virtio/vhost-vdpa.h | 1 - > hw/virtio/vhost-vdpa.c | 14 --

Re: [PATCH v4 4/6] vdpa: Add asid parameter to vhost_vdpa_dma_map/unmap

On Sat, Aug 6, 2022 at 12:39 AM Eugenio Pérez wrote: > > So the caller can choose which ASID is destined. > > No need to update the batch functions as they will always be called from > memory listener updates at the moment. Memory listener updates will > always update ASID 0, as it's the passthrou

Re: [PATCH for-7.1] hw/mips/malta: turn off x86 specific features of PIIX4_PM

On Mon, 08 Aug 2022 19:57:23 +0200 BB wrote: > Am 8. August 2022 14:15:40 MESZ schrieb Igor Mammedov : > >On Wed, 3 Aug 2022 19:26:30 +0200 > >Bernhard Beschow wrote: > > > >> On Tue, Aug 2, 2022 at 8:37 AM Philippe Mathieu-Daudé via < > >> qemu-devel@nongnu.org> wrote: > >> > >> > On 28/7/

Re: [PATCH v2] virtio-scsi: fix race in virtio_scsi_dataplane_start()

Am 08/08/2022 um 18:21 schrieb Stefan Hajnoczi: > As soon as virtio_scsi_data_plane_start() attaches host notifiers the > IOThread may start virtqueue processing. There is a race between > IOThread virtqueue processing and virtio_scsi_data_plane_start() because > it only assigns s->dataplane_sta

Re: [PATCH v7 05/12] vhost_net: Add NetClientInfo prepare callback

On Tue, Aug 9, 2022 at 8:54 AM Jason Wang wrote: > > On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > > > This is used by the backend to perform actions before the device is > > started. > > > > In particular, vdpa net use it to map CVQ buffers to the device, so it > > can send control com

Re: [PATCH v7 11/12] vdpa: Add virtio-net mac address via CVQ at start

On Tue, Aug 9, 2022 at 9:16 AM Jason Wang wrote: > > On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > > > This is needed so the destination vdpa device see the same state a the > > guest set in the source. > > > > Signed-off-by: Eugenio Pérez > > --- > > v6: > > * Map and unmap command bu

Re: [PATCH v7 08/12] vdpa: Move command buffers map to start of net device

On Tue, Aug 9, 2022 at 9:04 AM Jason Wang wrote: > > On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > > > As this series will reuse them to restore the device state at the end of > > a migration (or a device start), let's allocate only once at the device > > start so we don't duplicate the

Re: [PATCH v4 6/6] vdpa: Always start CVQ in SVQ mode

On Sat, Aug 6, 2022 at 12:39 AM Eugenio Pérez wrote: > > Isolate control virtqueue in its own group, allowing to intercept control > commands but letting dataplane run totally passthrough to the guest. > > Signed-off-by: Eugenio Pérez > --- > v4: > * Squash vhost_vdpa_cvq_group_is_independent. >

about the CPU frequency and power mode of QEMU-KVM guest

Hi All, currently we encountered two issues with the CPU frequency of the QEMU-KVM guest. We pin the VCPUs of a guest to a few of the host cores and set the "cpupower governor" of these cores to "performance" mode to use the max CPU frequency. However, - the guest displays constant CPU freuquenc

Re: [PATCH v7 08/12] vdpa: Move command buffers map to start of net device

On Tue, Aug 9, 2022 at 3:34 PM Eugenio Perez Martin wrote: > > On Tue, Aug 9, 2022 at 9:04 AM Jason Wang wrote: > > > > On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > > > > > As this series will reuse them to restore the device state at the end of > > > a migration (or a device start),

Re: [PATCH v7 11/12] vdpa: Add virtio-net mac address via CVQ at start

On Tue, Aug 9, 2022 at 3:36 PM Eugenio Perez Martin wrote: > > On Tue, Aug 9, 2022 at 9:16 AM Jason Wang wrote: > > > > On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > > > > > This is needed so the destination vdpa device see the same state a the > > > guest set in the source. > > > > >

RE: [PATCH v3 1/2] Update AVX512 support for xbzrle_encode_buffer function

Hi, Juan, Thanks for your advice. We have revised our code including: 1) change "IS_CPU_SUPPORT_AVX512BW" to "is_cpu_support_avx512bw" to indicate that variable isn't global variable; 2) use a function pointer to simplify code in ram.c; 3) change function name "xbzrle_encode_buffer_512" t

Re: [PATCH v4 6/6] vdpa: Always start CVQ in SVQ mode

On Tue, Aug 9, 2022 at 9:36 AM Jason Wang wrote: > > On Sat, Aug 6, 2022 at 12:39 AM Eugenio Pérez wrote: > > > > Isolate control virtqueue in its own group, allowing to intercept control > > commands but letting dataplane run totally passthrough to the guest. > > > > Signed-off-by: Eugenio Pérez

Re: [PATCH v7 08/12] vdpa: Move command buffers map to start of net device

On Tue, Aug 9, 2022 at 9:49 AM Jason Wang wrote: > > On Tue, Aug 9, 2022 at 3:34 PM Eugenio Perez Martin > wrote: > > > > On Tue, Aug 9, 2022 at 9:04 AM Jason Wang wrote: > > > > > > On Fri, Aug 5, 2022 at 2:29 AM Eugenio Pérez wrote: > > > > > > > > As this series will reuse them to restore t

Re: [PATCH V3] net/colo.c: Fix the pointer issue reported by Coverity.

On Tue, Aug 9, 2022 at 11:05 AM Zhang Chen wrote: > > When enable the virtio-net-pci, guest network packet will > load the vnet_hdr. In COLO status, the primary VM's network > packet maybe redirect to another VM, it need filter-redirect > enable the vnet_hdr flag at the same time, COLO-proxy will

Re: [PATCH v7 08/12] vdpa: Move command buffers map to start of net device

On Tue, Aug 9, 2022 at 4:04 PM Eugenio Perez Martin wrote: > > On Tue, Aug 9, 2022 at 9:49 AM Jason Wang wrote: > > > > On Tue, Aug 9, 2022 at 3:34 PM Eugenio Perez Martin > > wrote: > > > > > > On Tue, Aug 9, 2022 at 9:04 AM Jason Wang wrote: > > > > > > > > On Fri, Aug 5, 2022 at 2:29 AM Eug

Re: [PATCH] tests/avocado: fix replay-linux test

Pavel Dovgalyuk writes: > Last line of the test is missing by accident. > This patch fixes the script. > > Signed-off-by: Pavel Dovgalyuk > --- > tests/avocado/replay_linux.py |1 + > 1 file changed, 1 insertion(+) > > diff --git a/tests/avocado/replay_linux.py b/tests/avocado/replay_linu

[PATCH] linux-user: fix readlinkat handling with magic exe symlink

Exactly the same as f17f4989fa193fa8279474c5462289a3cfe69aea before was for readlink. I suppose this was simply missed at the time. Signed-off-by: Jameson Nash --- linux-user/syscall.c | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/lin

[PATCH] virtio-pci: fix vector_irqfd leak in virtio_pci_set_guest_notifiers

From: Lei Xiang proxy->vector_irqfd did not free when set guest notifier failed. Signed-off-by: Lei Xiang Tested-by: Zeng Chi Suggested-by: Xie Ming --- hw/virtio/virtio-pci.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 45327f

Re: [PATCH] tests/avocado: fix replay-linux test

ignore that - I see Thomas has already merged it. On Tue, 9 Aug 2022 at 09:23, Alex Bennée wrote: > > Pavel Dovgalyuk writes: > > > Last line of the test is missing by accident. > > This patch fixes the script. > > > > Signed-off-by: Pavel Dovgalyuk > > --- > > tests/avocado/replay_linux.py |

RE: [PATCH V3] net/colo.c: Fix the pointer issue reported by Coverity.

> -Original Message- > From: Jason Wang > Sent: Tuesday, August 9, 2022 4:12 PM > To: Zhang, Chen > Cc: Peter Maydell ; Li Zhijian > ; qemu-dev > Subject: Re: [PATCH V3] net/colo.c: Fix the pointer issue reported by > Coverity. > > On Tue, Aug 9, 2022 at 11:05 AM Zhang Chen wrote: >

[PATCH v4 1/2] Update AVX512 support for xbzrle_encode_buffer function

This commit update code of avx512 support for xbzrle_encode_buffer function to accelerate xbzrle encoding speed. Compared with C version of xbzrle_encode_buffer function, avx512 version can achieve almost 60%-70% performance improvement on unit test provided by Qemu. In addition, we provide one mor

[PATCH v4 0/2] This patch updates AVX512 support for xbzrle

This patch updates code of AVX512 support for xbzrle_encode_buffer fucntion to accelerate xbzrle encoding speed. The runtime check code is kept in meson.build and meson_options.txt without modifying. The updated AVX512 algorithm is provided in ram.c, xbzrle.c and xbzrle.h. The test code is upd

[PATCH v4 2/2] Update test code of AVX512 support for xbzrle_encode

Signed-off-by: ling xu Co-authored-by: Zhou Zhao Co-authored-by: Jun Jin --- tests/unit/test-xbzrle.c | 458 ++- 1 file changed, 457 insertions(+), 1 deletion(-) diff --git a/tests/unit/test-xbzrle.c b/tests/unit/test-xbzrle.c index ef951b6e54..2676123ce3 10

Re: [PATCH V3] net/colo.c: Fix the pointer issue reported by Coverity.

On Tue, Aug 9, 2022 at 4:29 PM Zhang, Chen wrote: > > > > > -Original Message- > > From: Jason Wang > > Sent: Tuesday, August 9, 2022 4:12 PM > > To: Zhang, Chen > > Cc: Peter Maydell ; Li Zhijian > > ; qemu-dev > > Subject: Re: [PATCH V3] net/colo.c: Fix the pointer issue reported by

Re: how long do we need to retain gitlab CI job stdout logs?

On Mon, Aug 08, 2022 at 08:42:28PM +0200, Thomas Huth wrote: > On 08/08/2022 19.47, Peter Maydell wrote: > > Hi; I just reduced QEMU's storage usage on gitlab by 130GB (no typo!) > > using https://gitlab.com/eskultety/gitlab_cleaner, which Dan helpfully > > pointed me at. This script removes old pi

RE: [PATCH V3] net/colo.c: Fix the pointer issue reported by Coverity.

> -Original Message- > From: Jason Wang > Sent: Tuesday, August 9, 2022 4:43 PM > To: Zhang, Chen > Cc: Peter Maydell ; Li Zhijian > ; qemu-dev > Subject: Re: [PATCH V3] net/colo.c: Fix the pointer issue reported by > Coverity. > > On Tue, Aug 9, 2022 at 4:29 PM Zhang, Chen wrote: >

[PATCH V4] net/colo.c: Fix the pointer issue reported by Coverity.

When enabled the virtio-net-pci, guest network packet will load the vnet_hdr. In COLO status, the primary VM's network packet maybe redirect to another VM, it need filter-redirect enable the vnet_hdr flag at the same time, COLO-proxy will correctly parse the original network packet. If have any mis

[PATCH V4 RESEND] net/colo.c: Fix the pointer issue reported by Coverity.

When enabled the virtio-net-pci, guest network packet will load the vnet_hdr. In COLO status, the primary VM's network packet maybe redirect to another VM, it need filter-redirect enable the vnet_hdr flag at the same time, COLO-proxy will correctly parse the original network packet. If have any mis

RE: [PATCH V4] net/colo.c: Fix the pointer issue reported by Coverity.

Please review the V4 RESEND version. Thanks Chen > -Original Message- > From: Zhang, Chen > Sent: Tuesday, August 9, 2022 4:45 PM > To: Jason Wang ; Peter Maydell > ; Li Zhijian ; qemu-dev > > Cc: Zhang, Chen > Subject: [PATCH V4] net/colo.c: Fix the pointer issue reported by Coverity.

[PULL] hw/net/rocker: Avoid undefined shifts with more than 31 ports

From: Peter Maydell In rocker_port_phys_link_status() and rocker_port_phys_enable_read() we construct a 64-bit value with one bit per front-panel port. However we accidentally do the shift as 32-bit arithmetic, which means that if there are more than 31 front-panel ports this is undefined behavio

[PULL] Net patches

The following changes since commit ca5f3d4df1b47d7f66a109cdb504e83dfd7ec433: Merge tag 'pull-la-20220808' of https://gitlab.com/rth7680/qemu into staging (2022-08-08 19:51:12 -0700) are available in the git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request for you t

Re: [PATCH v3] hw/i386: place setup_data at fixed place in memory

On Fri, Aug 05, 2022 at 07:29:29PM +0200, Paolo Bonzini wrote: > On 8/5/22 13:08, Ard Biesheuvel wrote: > > > > > > Does it work to place setup_data at the end of the cmdline file instead > > > of having it at the end of the kernel file? This way the first item > > > will be at 0x2 + cmdline_

[PATCH] tests/qtest: misc tweaks to readconfig

The property name parameter is ignored when visiting a top level type, but the obvious typo should be fixed to avoid confusion. A few indentation issues were tidied up. We can break out of the loop when finding the RNG device. Finally, close the temp FD immediately when no longer needed. Signed-of

Re: how long do we need to retain gitlab CI job stdout logs?

Daniel P. Berrangé writes: > On Mon, Aug 08, 2022 at 08:42:28PM +0200, Thomas Huth wrote: >> On 08/08/2022 19.47, Peter Maydell wrote: >> > Hi; I just reduced QEMU's storage usage on gitlab by 130GB (no typo!) >> > using https://gitlab.com/eskultety/gitlab_cleaner, which Dan helpfully >> > pointe

Re: [PATCH] linux-user: Don't assume 0 is not a valid host timer_t value

Laurent, ping ? thanks -- PMM On Mon, 1 Aug 2022 at 12:43, Peter Maydell wrote: > > On Mon, 25 Jul 2022 at 12:13, Daniel P. Berrangé wrote: > > > > On Mon, Jul 25, 2022 at 12:00:35PM +0100, Peter Maydell wrote: > > > For handling guest POSIX timers, we currently use an array > > > g_posix_timer

Re: [PATCH v3 07/22] ppc/ppc405: QOM'ify CPU

On 8/8/22 19:25, BALATON Zoltan wrote: On Mon, 8 Aug 2022, Peter Maydell wrote: On Mon, 8 Aug 2022 at 18:05, BALATON Zoltan wrote: But the handler we register here just calls cpu_reset which seems to just call the reset method of the CPU object. If we have nothing else to do here do we need to

Re: [PATCH] tests/qtest: misc tweaks to readconfig

On Tue, Aug 9, 2022 at 1:39 PM Daniel P. Berrangé wrote: > The property name parameter is ignored when visiting a top > level type, but the obvious typo should be fixed to avoid > confusion. A few indentation issues were tidied up. We > can break out of the loop when finding the RNG device. > Fin

Re: how long do we need to retain gitlab CI job stdout logs?

On Tue, Aug 09, 2022 at 11:44:52AM +0200, Markus Armbruster wrote: > Daniel P. Berrangé writes: > > > On Mon, Aug 08, 2022 at 08:42:28PM +0200, Thomas Huth wrote: > >> On 08/08/2022 19.47, Peter Maydell wrote: > >> > Hi; I just reduced QEMU's storage usage on gitlab by 130GB (no typo!) > >> > usi

Re: [PATCH RFC 0/7] hostmem: NUMA-aware memory preallocation using ThreadContext

On 7/21/22 13:07, David Hildenbrand wrote: > This is a follow-up on "util: NUMA aware memory preallocation" [1] by > Michal. > > Setting the CPU affinity of threads from inside QEMU usually isn't > easily possible, because we don't want QEMU -- once started and running > guest code -- to be able t

Re: [PATCH for-7.1] tests: acpi: silence applesmc warning about invalid key

On Thu, 28 Jul 2022 09:37:13 -0400 Igor Mammedov wrote: > OSK value is irrelevant for ACPI test case. > Supply fake OSK explicitly to prevent QEMU complaining about > invalid key when it fallbacks to default_osk. > > Suggested-by: Daniel P. Berrangé > Signed-off-by: Igor Mammedov Michael, ca

Re: [PATCH for-7.1] tests: acpi: silence applesmc warning about invalid key

On Tue, Aug 09, 2022 at 01:40:24PM +0200, Igor Mammedov wrote: > On Thu, 28 Jul 2022 09:37:13 -0400 > Igor Mammedov wrote: > > > OSK value is irrelevant for ACPI test case. > > Supply fake OSK explicitly to prevent QEMU complaining about > > invalid key when it fallbacks to default_osk. > > > >

[PULL 0/1] target-arm queue

org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220809 for you to fetch changes up to c7f26ded6d5065e4116f630f6a490b55f6c5f58e: icount: Take iothread lock when running QEMU timers (2022-08-09 10:55:14 +0100) target

[PULL 1/1] icount: Take iothread lock when running QEMU timers

The function icount_prepare_for_run() is called with the iothread unlocked, but it can call icount_notify_aio_contexts() which will run qemu timer handlers. Those are supposed to be run only with the iothread lock held, so take the lock while we do that. Since icount mode runs everything on a sing

Re: [PATCH v3] hw/i386: place setup_data at fixed place in memory

Hey Paolo, On Fri, Aug 05, 2022 at 02:47:27PM +0200, Jason A. Donenfeld wrote: > Hi Paolo, > > On Fri, Aug 05, 2022 at 10:10:02AM +0200, Paolo Bonzini wrote: > > On 8/5/22 01:04, Jason A. Donenfeld wrote: > > > +/* Nothing else uses this part of the hardware mapped region */ > > > +setup_

Re: KVM call for 2022-08-09

Juan Quintela wrote: > Hi > > Please, send any topic that you are interested in covering. > > At the end of Monday I will send an email with the agenda or the > cancellation of the call, so hurry up. > > After discussions on the QEMU Summit, we are going to have always open a > KVM call where you

Re: [BUG] cxl can not create region

Hi Jonathan Thanks for your reply! On Mon, Aug 8, 2022 at 8:37 PM Jonathan Cameron wrote: > > Probably not related to your problem, but there is a disconnect in QEMU / > kernel assumptionsaround the presence of an HDM decoder when a HB only > has a single root port. Spec allows it to be provided

Re: [BUG] cxl can not create region

Hi Dan, Thanks for your reply! On Mon, Aug 8, 2022 at 11:58 PM Dan Williams wrote: > > What is the output of: > > cxl list -MDTu -d decoder0.0 > > ...? It might be the case that mem1 cannot be mapped by decoder0.0, or > at least not in the specified order, or that validation check is broken.

Re: [PATCH 1/2] util/main-loop: Fix maximum number of wait objects for win32

Hi On Fri, Aug 5, 2022 at 6:57 PM Bin Meng wrote: > From: Bin Meng > > The maximum number of wait objects for win32 should be > MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1. > > Signed-off-by: Bin Meng > Nack, if wait_objects.num reaches MAXIMUM_WAIT_OBJECTS, then qemu_del_wait_object

Re: [PATCH v3] hw/i386: place setup_data at fixed place in memory

On Tue, Aug 09, 2022 at 02:17:23PM +0200, Jason A. Donenfeld wrote: > Hey Paolo, > > On Fri, Aug 05, 2022 at 02:47:27PM +0200, Jason A. Donenfeld wrote: > > Hi Paolo, > > > > On Fri, Aug 05, 2022 at 10:10:02AM +0200, Paolo Bonzini wrote: > > > On 8/5/22 01:04, Jason A. Donenfeld wrote: > > > > +

Re: [PATCH v3] hw/i386: place setup_data at fixed place in memory

On Tue, Aug 09, 2022 at 10:07:44AM -0400, Michael S. Tsirkin wrote: > On Tue, Aug 09, 2022 at 02:17:23PM +0200, Jason A. Donenfeld wrote: > > Hey Paolo, > > > > On Fri, Aug 05, 2022 at 02:47:27PM +0200, Jason A. Donenfeld wrote: > > > Hi Paolo, > > > > > > On Fri, Aug 05, 2022 at 10:10:02AM +0200

Re: [PATCH v3] hw/i386: place setup_data at fixed place in memory

On 8/9/22 11:17, Michael S. Tsirkin wrote: 1) if we believe "build setup_data in QEMU" is a feasible design that only needs more yak shaving, we can keep the code in, but disabled by default, and sort it out in 7.2. 2) if we go for an alternative design, it needs to be reverted. For example the

[PATCH v7 1/2] target/s390x: support SHA-512 extensions

In order to fully support MSA_EXT_5, we have to support the SHA-512 special instructions. So implement those. The implementation began as something TweetNacl-like, and then was adjusted to be useful here. It's not very beautiful, but it is quite short and compact, which is what we're going for. C

[PATCH v7 2/2] target/s390x: support PRNO_TRNG instruction

In order for hosts running inside of TCG to initialize the kernel's random number generator, we should support the PRNO_TRNG instruction, backed in the usual way with the qemu_guest_getrandom helper. This is confirmed working on Linux 5.19. Cc: Thomas Huth Cc: David Hildenbrand Cc: Christian Bor

Re: [BUG] cxl can not create region

Bobo WL wrote: > Hi Dan, > > Thanks for your reply! > > On Mon, Aug 8, 2022 at 11:58 PM Dan Williams wrote: > > > > What is the output of: > > > > cxl list -MDTu -d decoder0.0 > > > > ...? It might be the case that mem1 cannot be mapped by decoder0.0, or > > at least not in the specified ord

Re: Re: [RFC] hw/nvme: Use irqfd to send interrupts

> In this version I left irqfd initialization to the first assertion of an > irq. But I think it is better to initialize irqfd at cq creation time so we > won’t bother checking it at each irq assertion. However if I put these code > in nvme_init_cq(), irqfd does not work properly. After adding some

[PATCH v4 05/24] ppc/ppc405: Introduce a PPC405 SoC

It is an initial model to start QOMification of the PPC405 board. QOM'ified devices will be reintroduced one by one. Start with the memory regions, which name prefix is changed to "ppc405". Also, initialize only one RAM bank. The second bank is a dummy one (zero size) which is here to match the ha

[PATCH v4 04/24] ppc/ppc405: Move SRAM under the ref405ep machine

It doesn't belong to the generic machine nor the SoC. Fix a typo in the name while we are at it. Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_boards.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index f4794

[PATCH v4 09/24] ppc/ppc405: QOM'ify CPC

The CPC controller is currently modeled as a DCR device. Now that all clock settings are handled at the CPC level, change the SoC "sys-clk" property to be an alias on the same property in the CPC model. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h

[PATCH v4 01/24] ppc/ppc405: Remove taihu machine

It has been deprecated since 7.0. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- docs/about/deprecated.rst | 9 -- docs/about/removed-features.rst | 6 + docs/system/ppc/embedded.rst| 1 - hw/ppc/ppc405_boards.c | 232 --

[PATCH v4 00/24] ppc: QOM'ify 405 board

Hello, Here is large series QOM'ifying the PPC405 board. It introduces a new generic machine and SoC models, converts the current device models to QOM and populates the SoC. The process is quite mechanical without too much issues to handle. The noisy part is the initial patch introducing the SoC r

[PATCH v4 03/24] ppc/ppc405: Move devices under the ref405ep machine

Reviewed-by: Daniel Henrique Barboza Reviewed-by: BALATON Zoltan Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_boards.c | 31 +++ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 96700be74d08..f

[PATCH v4 20/24] ppc/ppc405: Use an embedded PPCUIC model in SoC state

Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 3 ++- hw/ppc/ppc405_uc.c | 26 +- 2 files changed, 15 insertions(+), 14 deletions(-) diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h index 31c94e474209..8e67ad0b72c3 100644 ---

[PATCH v4 02/24] ppc/ppc405: Introduce a PPC405 generic machine

We will use this machine as a base to define the ref405ep and possibly the PPC405 hotfoot board as found in the Linux kernel. Reviewed-by: BALATON Zoltan Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_boards.c | 31 --- 1 file changed, 28 insertions(+), 3 deletion

[PATCH v4 06/24] ppc/ppc405: Start QOMification of the SoC

This moves all the code previously done in the ppc405ep_init() routine under ppc405_soc_realize(). We can also adjust the number of banks now that we have control on ppc4xx_sdram_init(). Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 12 ++-- hw/ppc/ppc405_boards.c | 12 ++-- hw/

[PATCH v4 07/24] ppc/ppc405: QOM'ify CPU

Drop the use of ppc4xx_init() and duplicate a bit of code related to clocks in the SoC realize routine. We will clean that up in the following patches. ppc_dcr_init() simply allocates default DCR handlers for the CPU. Maybe this could be done in model initializer of the CPU families needing it. R

[PATCH v4 10/24] ppc/ppc405: QOM'ify GPT

The GPT controller is currently modeled as a SysBus device with a unique memory region, a couple of IRQs and a timer. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h | 22 +++ hw/ppc/ppc405_uc.c | 91 +++--

[PATCH v4 08/24] ppc/ppc4xx: Introduce a DCR device model

The Device Control Registers (DCR) of on-SoC devices are accessed by software through the use of the mtdcr and mfdcr instructions. These are converted in transactions on a side band bus, the DCR bus, which connects the on-SoC devices to the CPU. Ideally, we should model these accesses with a DCR n

[PATCH v4 15/24] ppc/ppc405: QOM'ify OPBA

The OPB arbitrer is currently modeled as a simple SysBus device with a unique memory region. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h | 12 hw/ppc/ppc405_uc.c | 48 +++-- hw/ppc/trace-event

[PATCH v4 12/24] ppc/ppc405: QOM'ify GPIO

The GPIO controller is currently modeled as a simple SysBus device with a unique memory region. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h | 21 +++ hw/ppc/ppc405_uc.c | 51 + hw/ppc/t

[PATCH v4 11/24] ppc/ppc405: QOM'ify OCM

The OCM controller is currently modeled as a simple DCR device with a couple of memory regions. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 16 ++ hw/ppc/ppc405_uc.c | 73 +++--- 2 files changed, 5

[PATCH v4 16/24] ppc/ppc405: QOM'ify POB

POB is currently modeled as a simple DCR device. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 12 +++ hw/ppc/ppc405_uc.c | 51 ++ 2 files changed, 41 insertions(+), 22 deletions(-) diff --git a

[PATCH v4 13/24] ppc/ppc405: QOM'ify DMA

The DMA controller is currently modeled as a DCR device with a couple of IRQs. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 19 ++ hw/ppc/ppc405_uc.c | 142 - 2 files changed, 82 insertions(+), 79

[PATCH v4 19/24] ppc/ppc405: QOM'ify FPGA

Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_boards.c | 55 +- 1 file changed, 38 insertions(+), 17 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 3677793adc75..4ff6715f3533 100644

[PATCH v4 17/24] ppc/ppc405: QOM'ify PLB

PLB is currently modeled as a simple DCR device. Also drop the ppc4xx_plb_init() helper and adapt the sam460ex machine. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 14 +-- hw/ppc/ppc405_uc.c | 59 ++---

[PATCH v4 18/24] ppc/ppc405: QOM'ify MAL

The Memory Access Layer (MAL) controller is currently modeled as a DCR device with 4 IRQs. Also drop the ppc4xx_mal_init() helper and adapt the sam460ex machine. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h | 1 + include/hw/ppc/ppc4xx.h |

[PATCH v4 14/24] ppc/ppc405: QOM'ify EBC

EBC is currently modeled as a DCR device. Also drop the ppc405_ebc_init() helper and adapt the sam460ex machine. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 17 +- hw/ppc/ppc405_uc.c | 57 +++--

[PATCH v4 22/24] ppc/ppc4xx: Fix sdram trace events

Signed-off-by: Cédric Le Goater --- hw/ppc/ppc4xx_devs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index 8a8a87b03b28..c06c20b195cd 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -143,7 +143,7 @@ static void sd

[PATCH v4 23/24] ppc/ppc405: QOM'ify SDRAM

This is an initial change of the SDRAM controller preserving the compatibility with the current modeling. Further cleanup will be possible after conversion of the ppc4xx_sdram_banks() and ppc4xx_sdram_init() routines of the sam460ex and bamboo machines. The size and base address of the RAM banks a

[PATCH v4 21/24] ppc/ppc405: Use an explicit I2C object

Having an explicit I2C model object will help if one day we want to add I2C devices on the bus from the machine init routine. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405.h| 2 ++ hw/ppc/ppc405_uc.c | 10 -- 2 files changed, 10 insertions(+

[PATCH v4 24/24] ppc/ppc405: Add check on minimum RAM size

The check on invalid RAM size is now performed in the SDRAM controller but not all values will boot a machine. A minimum of 2*16 is required. Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_boards.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/ppc/ppc405_boards

Re: [BUG] cxl can not create region

On Tue, 9 Aug 2022 21:07:06 +0800 Bobo WL wrote: > Hi Jonathan > > Thanks for your reply! > > On Mon, Aug 8, 2022 at 8:37 PM Jonathan Cameron > wrote: > > > > Probably not related to your problem, but there is a disconnect in QEMU / > > kernel assumptionsaround the presence of an HDM decoder w

Re: [RFC] hw/nvme: Use irqfd to send interrupts

On Mon, Aug 08, 2022 at 10:23:03AM +0800, Jinhao Fan wrote: > at 12:35 PM, Jinhao Fan wrote: > > > static void nvme_irq_assert(NvmeCtrl *n, NvmeCQueue *cq) > > { > > if (cq->irq_enabled) { > > if (msix_enabled(&(n->parent_obj))) { > > +/* Initialize CQ irqfd */ > > +

Re: [PATCH 2/2] util/aio-win32: Correct the event array size in aio_poll()

On Fri, Aug 5, 2022 at 11:09 PM Stefan Weil wrote: > > Am 05.08.22 um 16:56 schrieb Bin Meng: > > > From: Bin Meng > > > > WaitForMultipleObjects() can only wait for MAXIMUM_WAIT_OBJECTS > > object handles. Correct the event array size in aio_poll() and > > add a assert() to ensure it does not ca

Re: Re: [RFC] hw/nvme: Use irqfd to send interrupts

> The driver will create the cq with an allocated vector, but it's not activated > until after the driver wires it up to a handler. I think that's what you're > observing with the incomplete MSIx table entry on creation. Agreed. I digged through pci_request_irq()'s call chain and found pci_write

Re: [PATCH 1/2] util/main-loop: Fix maximum number of wait objects for win32

On Tue, Aug 9, 2022 at 9:15 PM Marc-André Lureau wrote: > > Hi > > On Fri, Aug 5, 2022 at 6:57 PM Bin Meng wrote: >> >> From: Bin Meng >> >> The maximum number of wait objects for win32 should be >> MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1. >> >> Signed-off-by: Bin Meng > > > Nack, >

[PATCH v2 1/2] util/main-loop: Fix maximum number of wait objects for win32

From: Bin Meng The maximum number of wait objects for win32 should be MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1. Fix the logic in qemu_add_wait_object() to avoid adding the same HANDLE twice. Signed-off-by: Bin Meng --- Changes in v2: - fix the logic in qemu_add_wait_object() to avoi

Re: [PULL] Net patches

On 8/9/22 02:08, Jason Wang wrote: The following changes since commit ca5f3d4df1b47d7f66a109cdb504e83dfd7ec433: Merge tag 'pull-la-20220808' of https://gitlab.com/rth7680/qemu into staging (2022-08-08 19:51:12 -0700) are available in the git repository at: https://github.com/jasowang/qe

[PATCH v2 2/2] util/aio-win32: Correct the event array size in aio_poll()

From: Bin Meng WaitForMultipleObjects() can only wait for MAXIMUM_WAIT_OBJECTS object handles. Correct the event array size in aio_poll() and add a assert() to ensure it does not cause out of bound access. Signed-off-by: Bin Meng Reviewed-by: Stefan Weil --- Changes in v2: - change 'count' to

Re: Re: [RFC] hw/nvme: Use irqfd to send interrupts

> The driver will create the cq with an allocated vector, but it's not activated > until after the driver wires it up to a handler. I think that's what you're > observing with the incomplete MSIx table entry on creation. Also, I'm wondering if this is inconsistent with the NVMe spec. In Section 7

Re: [PATCH v4 04/24] ppc/ppc405: Move SRAM under the ref405ep machine

On Tue, 9 Aug 2022, Cédric Le Goater wrote: It doesn't belong to the generic machine nor the SoC. Fix a typo in the name while we are at it. Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_boards.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/ppc/ppc405_b

[PULL 0/2] Trivial branch for 7.1 patches

branch-for-7.1-pull-request for you to fetch changes up to 9390da5ef29a5e0f98e5b482dceeeb287c452f17: xlnx_dp: drop unsupported AUXCommand in xlnx_dp_aux_set_command (2022-08-08 11:40:06 +0200) Pull request trivial branc

[PULL 2/2] xlnx_dp: drop unsupported AUXCommand in xlnx_dp_aux_set_command

From: Qiang Liu In xlnx_dp_aux_set_command, when the command leads to the default branch, xlxn-dp will abort and then crash. This patch removes this abort and drops this operation. Fixes: 58ac482 ("introduce xlnx-dp") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/411 Reported-by: Qian

[PULL 1/2] contrib/vhost-user-blk: Clean up deallocation of VuVirtqElement

From: Markus Armbruster We allocate VuVirtqElement with g_malloc() in virtqueue_alloc_element(), but free it with free() in vhost-user-blk.c. Harmless, but use g_free() anyway. One of the calls is guarded by a "not null" condition. Useless, because it cannot be null (it's dereferenced right be

Re: [PATCH v4 05/24] ppc/ppc405: Introduce a PPC405 SoC

On Tue, 9 Aug 2022, Cédric Le Goater wrote: It is an initial model to start QOMification of the PPC405 board. QOM'ified devices will be reintroduced one by one. Start with the memory regions, which name prefix is changed to "ppc405". Also, initialize only one RAM bank. The second bank is a dummy

Re: [PATCH v2 1/2] util/main-loop: Fix maximum number of wait objects for win32

Hi On Tue, Aug 9, 2022 at 8:43 PM Bin Meng wrote: > From: Bin Meng > > The maximum number of wait objects for win32 should be > MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1. > > Fix the logic in qemu_add_wait_object() to avoid adding > the same HANDLE twice. > > Please make that a separat

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