[PATCH v3 14/19] vdpa: Export vhost_vdpa_dma_map and unmap calls

Shadow CVQ will copy buffers on qemu VA, so we avoid TOCTOU attacks from the guest that could set a different state in qemu device model and vdpa device. To do so, it needs to be able to map these new buffers to the device. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang --- include/hw/virti

[PATCH v3 19/19] vdpa: Add x-svq to NetdevVhostVDPAOptions

Finally offering the possibility to enable SVQ from the command line. Signed-off-by: Eugenio Pérez Acked-by: Markus Armbruster --- qapi/net.json| 9 +- net/vhost-vdpa.c | 72 ++-- 2 files changed, 77 insertions(+), 4 deletions(-) diff --git

Re: [RFC] aspeed/i2c: multi-master between SoC's

On Fri, Jul 15, 2022 at 09:49:58AM +0200, Klaus Jensen wrote: > On Jul 14 20:06, Peter Delevoryas wrote: > > Hey Cedric, Klaus, and Corey, > > > > Hi Peter, > > Regardless of the issues you are facing its awesome to see this being > put to work like this! Haha yeah, well, _all_ the designs at M

Re: [PATCH v8 00/12] s390x: CPU Topology

On 7/15/22 15:47, Pierre Morel wrote: > > > On 7/15/22 11:31, Janis Schoetterl-Glausch wrote: >> On 7/14/22 22:05, Pierre Morel wrote: >>> >>> >>> On 7/14/22 20:43, Janis Schoetterl-Glausch wrote: On 6/20/22 16:03, Pierre Morel wrote: > Hi, > > This new spin is essentially for co

Re: [PULL 0/6] hw/nvme updates

On Fri, 15 Jul 2022 at 09:43, Klaus Jensen wrote: > > From: Klaus Jensen > > Hi, > > The following changes since commit 8482ab545e52f50facacfe1118b22b97462724ab: > > Merge tag 'qga-win32-pull-2022-07-13' of github.com:kostyanf14/qemu into > staging (2022-07-14 14:52:16 +0100) > > are available

[PATCH v4 1/3] target/ppc: Add HASHKEYR and HASHPKEYR SPRs

Add the Special Purpose Registers HASHKEYR and HASHPKEYR, which were introduced by the Power ISA 3.1B. They are used by the new instructions hashchk(p) and hashst(p). The ISA states that the Operating System should generate the value for these registers when creating a process, so it's its respons

[PATCH v4 3/3] target/ppc: Implement hashstp and hashchkp

Implementation for instructions hashstp and hashchkp, the privileged versions of hashst and hashchk, which were added in Power ISA 3.1B. Signed-off-by: Víctor Colombo --- target/ppc/excp_helper.c | 2 ++ target/ppc/helper.h| 2 ++ target/ppc/insn32.decod

[PATCH v4 2/3] target/ppc: Implement hashst and hashchk

Implementation for instructions hashst and hashchk, which were added in Power ISA 3.1B. It was decided to implement the hash algorithm from ground up in this patch exactly as described in Power ISA. Signed-off-by: Víctor Colombo --- target/ppc/excp_helper.c | 82 ++

[PATCH v4 0/3] Implement Power ISA 3.1B hash insns

This patch series implements the 4 instructions added in Power ISA 3.1B: - hashchk - hashst - hashchkp - hashstp It's built on top of ppc-next. Working branch for ease of use can be found here: https://github.com/PPC64/qemu/tree/vccolombo-hash-to-send-v4 What do you think about the choice to imp

Re: [PULL 20/45] target/arm: Implement SME LD1, ST1

On Fri, 15 July 2022, 21:38 Peter Maydell, wrote: > > +DO_LD(q, _be, MO_128) > > +DO_LD(q, _le, MO_128) > > Coverity complains that these uses of MO_128 result in an > array overrun for the pred_esz_masks[] array, because e.g. > sme_ld1() calls sve_cont_ldst_elements() calls which uses esz > as a

Re: [PATCH v2 07/11] acpi/tests/bits: add python test that exercizes QEMU bios tables using biosbits

On Fri, Jul 15, 2022 at 11:20 Michael S. Tsirkin wrote: > On Fri, Jul 15, 2022 at 09:47:27AM +0530, Ani Sinha wrote: > > > Instead of all this mess, can't we just spawn e.g. "git clone --depth > 1"? > > > And if the directory exists I would fetch and checkout. > > > > There are two reasons I can

<    1   2