On Thu, Jul 14, 2022 at 2:54 PM Eugenio Perez Martin
wrote:
>
> > > > +static void vhost_vdpa_net_handle_ctrl_used(VhostShadowVirtqueue *svq,
> > > > +void *vq_elem_opaque,
> > > > +uint32_t dev_written)
> > >
On 7/14/22 07:36, Zhenzhong Duan wrote:
On ICX-2S2 host, when run L2 guest with both L1/L2 using Icelake-Server-v3
or above, we got below warning:
"warning: host doesn't support requested feature: MSR(10AH).taa-no [bit 8]"
This is because L1 KVM doesn't expose taa-no to L2 if RTM is disabled,
t
On Tue, 12 Jul 2022 at 21:56, Philippe Mathieu-Daudé via
wrote:
>
> The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
>
> Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
> (2022-07-12 14:12:15 +0100)
>
> are available in the Git repository at:
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Block drivers may optimize I/O requests accessing buffers previously
registered with bdrv_register_buf(). Checking whether all elements of a
request's QEMUIOVector are within previously registered buffers is
expensive, so we need a hint from the user to a
From: Mauro Matteo Cascella
Set current_req to NULL, not current_req->req, to prevent reusing a free'd
buffer in case of repeated SCSI cancel requests. Also apply the fix to
CLEAR QUEUE and BUS DEVICE RESET messages as well, since they also cancel
the request.
Thanks to Alexander Bulekov for pr
From: Akihiko Odaki
Signed-off-by: Akihiko Odaki
Message-Id: <20220624154042.51512-1-akihiko.od...@gmail.com>
[Rewrite shell function without using Bash extensions. - Paolo]
Signed-off-by: Paolo Bonzini
---
configure | 15 +++
meson.build | 11
From: Akihiko Odaki
softmmu/datadir.c had its own implementation to find files in the
build tree, but now bundle mechanism provides the unified
implementation which works for datadir and the other files.
Signed-off-by: Akihiko Odaki
Message-Id: <20220624145039.49929-4-akihiko.od...@gmail.com>
S
From: Akihiko Odaki
Developers often run QEMU without installing. The bundle mechanism
allows to look up files which should be present in installation even in
such a situation.
It is a general mechanism and can find any files in the installation
tree. The build tree will have a new directory, qe
From: Mark Cave-Ayland
By default quirk_mode_page_apple_vendor should be enabled for all scsi-cd
devices
connected to the q800 machine to enable MacOS to detect and use them.
Signed-off-by: Mark Cave-Ayland
Message-Id: <20220622105314.802852-4-mark.cave-ayl...@ilande.co.uk>
Signed-off-by: Paol
The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-07-12 14:12:15 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch c
From: Mark Cave-Ayland
Both MacOS and A/UX make use of vendor-specific MODE SELECT commands with PF=0
to identify SCSI devices:
- MacOS sends a MODE SELECT command with PF=0 for the MODE_PAGE_VENDOR_SPECIFIC
(0x0) mode page containing 2 bytes before initialising a disk
- A/UX (installed on di
From: Mark Cave-Ayland
One of the mechanisms MacOS uses to identify CDROM drives compatible with MacOS
is to send a custom MODE SELECT command for page 0x30 to the drive. The
response to this is a hard-coded manufacturer string which must match in order
for the CDROM to be usable within MacOS.
A
From: Akihiko Odaki
Before this change, the directory of the executable was being added to
resolve modules in the build tree. However, get_relocated_path() can now
resolve them with the new bundle mechanism.
Signed-off-by: Akihiko Odaki
Message-Id: <20220624145039.49929-5-akihiko.od...@gmail.co
From: Mark Cave-Ayland
By default quirk_mode_sense_rom_use_dbd should be enabled for all scsi-cd
devices
connected to the q800 machine to correctly report the CDROM block descriptor
back
to A/UX.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
Message-Id: <20220622105314.802852-6
From: Mark Cave-Ayland
During SCSI bus enumeration A/UX sends a MODE SENSE command to the CDROM with
the DBD bit unset and expects the response to include a block descriptor. As per
the latest SCSI documentation, QEMU currently force-disables the block
descriptor for CDROM devices but the A/UX dr
From: Mark Cave-Ayland
When initialising a drive ready to install MacOS, Apple HD SC Setup first
attempts
to format the drive. Add a simple FORMAT UNIT command which simply returns
success
to allow the format to succeed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Mes
From: Mark Cave-Ayland
A/UX sends a MODE_PAGE_R_W_ERROR command with the AWRE bit set to 0 when
enumerating
CDROM drives. Since the bit is currently hardcoded to 1 then indicate that the
AWRE
bit can be changed (even though we don't care about the value) so that
the MODE_PAGE_R_W_ERROR page can
From: Mark Cave-Ayland
The MacOS CDROM driver uses a SCSI INQUIRY command to check that any SCSI CDROMs
detected match a whitelist of vendors and products before adding them to the
list of available devices.
Add known-good default vendor and product information using the existing
compat_prop mec
From: Mark Cave-Ayland
By default quirk_mode_page_vendor_specific_apple should be enabled for both
scsi-hd
and scsi-cd devices to allow MacOS to format SCSI disk devices, and A/UX to
enumerate SCSI CDROM devices succesfully without getting stuck in a loop.
Signed-off-by: Mark Cave-Ayland
Messa
From: Mark Cave-Ayland
Since the MacOS SCSI implementation is quite old (and Apple added some firmware
customisations to their drives for m68k Macs) there is need to add a mechanism
to correctly handle Apple-specific quirks.
Add a new quirks bitmap to SCSIDiskState that can be used to enable the
On Fri, 10 Jun 2022 at 08:57, Michael S. Tsirkin wrote:
>
> virtio,pc,pci: fixes,cleanups,features
>
> more CXL patches
> VIOT
> Igor's huge AML rework
> fixes, cleanups all over the place
Hi. On my macos machine (an x86 one), 'make
From: Mark Cave-Ayland
The MODE SELECT command can contain an optional block descriptor that can be
used
to set the device block size. If the block descriptor is present then update the
block size on the SCSI device accordingly.
This allows CDROMs to be used with A/UX which requires a CDROM dri
From: Mark Cave-Ayland
When A/UX configures the CDROM device it sends a truncated MODE SELECT request
for page 1 (MODE_PAGE_R_W_ERROR) which is only 6 bytes in length rather than
10. This seems to be due to bug in Apple's code which calculates the CDB message
length incorrectly.
The work at [1]
The option generates a lot of warnings for integers casted to pointers,
for example:
/home/pbonzini/work/upstream/qemu/pc-bios/s390-ccw/dasd-ipl.c:174:19: warning:
array subscript 0 is outside array bounds of ‘CcwSeekData[0]’ [-Warray-bounds]
174 | seekData->cyl = 0x00;
|
From: Mark Cave-Ayland
By default quirk_mode_page_truncated should be enabled for all scsi-cd devices
connected to the q800 machine to allow A/UX to enumerate SCSI CDROM devices
without hanging.
Signed-off-by: Mark Cave-Ayland
Message-Id: <20220622105314.802852-11-mark.cave-ayl...@ilande.co.uk>
From: Mark Cave-Ayland
The Apple HD SC Setup program uses a SCSI INQUIRY command to check that any SCSI
hard disks detected match a whitelist of vendors and products before allowing
the "Initialise" button to prepare an empty disk.
Add known-good default vendor and product information using the
On Tue, 12 Jul 2022 11:01:18 +0100
Joao Martins wrote:
> On 7/12/22 10:06, Igor Mammedov wrote:
> > On Mon, 11 Jul 2022 21:03:28 +0100
> > Joao Martins wrote:
> >
> >> On 7/11/22 16:31, Joao Martins wrote:
> >>> On 7/11/22 15:52, Joao Martins wrote:
> On 7/11/22 13:56, Igor Mammedo
On Tue, 12 Jul 2022 12:35:49 +0100
Joao Martins wrote:
> On 7/12/22 11:01, Joao Martins wrote:
> > On 7/12/22 10:06, Igor Mammedov wrote:
> >> On Mon, 11 Jul 2022 21:03:28 +0100
> >> Joao Martins wrote:
> >>> On 7/11/22 16:31, Joao Martins wrote:
> On 7/11/22 15:52, Joao Martins wrote
In v3:
- changed naming of orgate & removed hard-coded constants
Signed-off-by: Andrey Makarov
---
hw/arm/bcm2835_peripherals.c | 25 ++-
include/hw/arm/bcm2835_peripherals.h | 2 +
tests/qtest/bcm2835-dma-test.c | 106 +++
tests/qtest/meson.build
On 7/13/22 17:35, Marc-André Lureau wrote:
Hi
On Wed, Jul 13, 2022 at 7:30 PM Janosch Frank wrote:
On 7/13/22 17:09, Marc-André Lureau wrote:
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
The iteration over the memblocks is hard to understand so it's about
time to clean it up.
* Juan Quintela (quint...@redhat.com) wrote:
> Reorder the structures so we can know if the fields are:
> - Read only
> - Their own locking (i.e. sems)
> - Protected by 'mutex'
> - Only for the multifd channel
>
> Signed-off-by: Juan Quintela
> ---
> migration/multifd.h | 90
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Emulated devices and other BlockBackend users wishing to take advantage
of blk_register_buf() all have the same repetitive job: register
RAMBlocks with the BlockBackend using RAMBlockNotifier.
Add a BlockRAMRegistrar API to do this. A later commit will u
On 08.07.22 06:17, Stefan Hajnoczi wrote:
The blkio block driver will need to look up the file descriptor for a
given pointer. This is possible in softmmu builds where the memory API
is available for querying guest RAM.
Add stubs so tools like qemu-img that link the block layer still build
succe
Am Dienstag, 21. Juni 2022, 01:15:58 CEST schrieb Atish Patra:
> The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions,
> and 'cofpmf' for Count OverFlow and Privilege Mode Filtering)
> extension allows the perf to handle overflow interrupts and filtering
> support. This patch prov
On 7/14/22 10:28, Igor Mammedov wrote:
> On Tue, 12 Jul 2022 12:35:49 +0100
> Joao Martins wrote:
>
>> On 7/12/22 11:01, Joao Martins wrote:
>>> On 7/12/22 10:06, Igor Mammedov wrote:
On Mon, 11 Jul 2022 21:03:28 +0100
Joao Martins wrote:
> On 7/11/22 16:31, Joao Martins wrote:
Am Dienstag, 21. Juni 2022, 01:16:00 CEST schrieb Atish Patra:
> From: Atish Patra
>
> Qemu can monitor the following cache related PMU events through
> tlb_fill functions.
>
> 1. DTLB load/store miss
> 3. ITLB prefetch miss
>
> Increment the PMU counter in tlb_fill function.
>
> Reviewed-by:
>-Original Message-
>From: Paolo Bonzini On Behalf Of Paolo Bonzini
>Sent: Thursday, July 14, 2022 3:59 PM
>To: Duan, Zhenzhong ; qemu-
>de...@nongnu.org
>Cc: ehabk...@redhat.com; Ma, XiangfeiX ; Li,
>Xiaoyao ; Christopherson,, Sean
>Subject: Re: [PATCH v2] target/i386: Restore TSX feat
Currently we only enforce power-of-two mappings (required by the QEMU
notifier) for UNMAP requests. A MAP request not aligned on a
power-of-two may be successfully handled by VFIO, and then the
corresponding UNMAP notify will fail because it will attempt to split
that mapping. Ensure MAP and UNMAP
Am Dienstag, 21. Juni 2022, 01:15:59 CEST schrieb Atish Patra:
> All the hpmcounters and the fixed counters (CY, IR, TM) can be represented
> as a unified counter. Thus, the predicate function doesn't need handle each
> case separately.
>
> Simplify the predicate function so that we just handle th
* Juan Quintela (quint...@redhat.com) wrote:
> We were calling qemu_target_page_size() left and right.
Yeh, I still suspect the right answer is to make qemu_target_page_size()
trivially fast, but for now;
Reviewed-by: Dr. David Alan Gilbert
> Signed-off-by: Juan Quintela
> ---
> migration/mu
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Avoid bounce buffers when QEMUIOVector elements are within previously
registered bdrv_register_buf() buffers.
The idea is that emulated storage controllers will register guest RAM
using bdrv_register_buf() and set the BDRV_REQ_REGISTERED_BUF on I/O
reque
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Register guest RAM using BlockRAMRegistrar and set the
BDRV_REQ_REGISTERED_BUF flag so block drivers can optimize memory
accesses in I/O requests.
This is for vdpa-blk, vhost-user-blk, and other I/O interfaces that rely
on DMA mapping/unmapping.
Signed-
* Juan Quintela (quint...@redhat.com) wrote:
> We were recalculating it left and right. We plan to change that
> values on next patches.
>
> Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/multifd.h | 4
> migration/multifd.c | 7 ---
> 2 files cha
Hi Atish,
Am Dienstag, 21. Juni 2022, 01:16:01 CEST schrieb Atish Patra:
> Qemu virt machine can support few cache events and cycle/instret counters.
> It also supports counter overflow for these events.
>
> Add a DT node so that OpenSBI/Linux kernel is aware of the virt machine
> capabilities. T
Am Dienstag, 21. Juni 2022, 01:16:02 CEST schrieb Atish Patra:
> The sscofpmf extension was ratified as a part of priv spec v1.12.
> Mark the csr_ops accordingly.
>
> Reviewed-by: Alistair Francis
> Signed-off-by: Atish Patra
Reviewed-by: Heiko Stuebner
Tested-by: Heiko Stuebner
> ---
> tar
On 7/13/22 16:59, Pierre Morel wrote:
>
>
> On 7/12/22 17:40, Janis Schoetterl-Glausch wrote:
>> On 6/20/22 16:03, Pierre Morel wrote:
>>> We use new objects to have a dynamic administration of the CPU topology.
>>> The highest level object in this implementation is the s390 book and
>>> in this
Hi Phil,
Agreed, for v3 I selected naming with "orgated" instead of "shared" because
there is already IRQ line #15 that is called shared which seems like a
completely different thing and it's "not used" according to DTS
(arch/arm/boot/dts/bcm2835-common.dtsi):
interru
On 7/14/22 10:54, Joao Martins wrote:
> On 7/14/22 10:28, Igor Mammedov wrote:
>> On Tue, 12 Jul 2022 12:35:49 +0100
>> Joao Martins wrote:
>>> On 7/12/22 11:01, Joao Martins wrote:
On 7/12/22 10:06, Igor Mammedov wrote:
> On Mon, 11 Jul 2022 21:03:28 +0100
> Joao Martins wrote:
On 7/14/22 12:38, Janis Schoetterl-Glausch wrote:
On 7/13/22 16:59, Pierre Morel wrote:
On 7/12/22 17:40, Janis Schoetterl-Glausch wrote:
On 6/20/22 16:03, Pierre Morel wrote:
[...]
+}
+
+/*
+ * s390_topology_new_cpu:
+ * @core_id: the core ID is machine wide
+ *
+ * We have a single
On Thu, 14 Jul 2022 10:16:34 +0100
Peter Maydell wrote:
> On Fri, 10 Jun 2022 at 08:57, Michael S. Tsirkin wrote:
> >
> > virtio,pc,pci: fixes,cleanups,features
> >
> > more CXL patches
> > VIOT
> > Igor's huge AML rework
> > fixes
On 7/13/22 17:31, Marc-André Lureau wrote:
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
By splitting the writing of the section headers and (future) section
data we prepare for the addition of a string table section and
architecture sections.
Signed-off-by: Janosch Frank
---
[.
On Thu, 14 Jul 2022 11:47:19 +0100
Joao Martins wrote:
> On 7/14/22 10:54, Joao Martins wrote:
> > On 7/14/22 10:28, Igor Mammedov wrote:
> >> On Tue, 12 Jul 2022 12:35:49 +0100
> >> Joao Martins wrote:
> >>> On 7/12/22 11:01, Joao Martins wrote:
> On 7/12/22 10:06, Igor Mammedov wrot
On 7/13/22 17:58, Marc-André Lureau wrote:
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
Time to add a bit more descriptiveness to the dumps.
Please add some more description & motivation to the patch (supposedly
necessary for next patches), and explain that it currently doesn't
c
Hi
On Thu, Jul 14, 2022 at 3:54 PM Janosch Frank wrote:
> On 7/13/22 17:58, Marc-André Lureau wrote:
> > Hi
> >
> > On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank
> wrote:
> >>
> >> Time to add a bit more descriptiveness to the dumps.
> >
> > Please add some more description & motivation to the
Hi Jason,
Thanks for pointing out that corner case with "52:54:00:12:34:XX".
In the NIC model I'm developing qemu_macaddr_default_if_unset is called every
time MAC is updated in the NIC registers.
This way a just assigned "52:54:00:12:34:XX" MAC is at least marked as used in
the mac_table.
How
* Juan Quintela (quint...@redhat.com) wrote:
> Current code asumes that all pages are whole. That is not true for
> example for compression already. Fix it for creating a new field
> ->sent_bytes that includes it.
>
> All ram_counters are used only from the migration thread, so we have
> two opt
It doesn't seem like the commit subject and the content match.
Is it ram_transferred_ram() or ram_transferred_add() ?
C
On 5/31/22 12:43, Juan Quintela wrote:
> Signed-off-by: Juan Quintela
> ---
> migration/ram.h | 2 ++
> migration/ram.c | 2 +-
> 2 files changed, 3 insertions(+), 1 deletion
On 7/14/22 13:25, Pierre Morel wrote:
[...]
>
> That is sure.
> I thought about put a fatal error report during the initialization in the
> s390_topology_setup()
>
>> And you can set thread > 1 today, so we'd need to handle that. (increase the
>> number of cpus instead and print a warning?)
>
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 6/27/22 11:10, Matheus Ferst wrote:
The first patch of this series is the RFC of [1] (hence the r-b in v1).
Patches 2~4 follow the other problems that Laurent pointed out, and
patches 5-6 fix similar problems that I found.
[1
Hello,
I'm sending a series to add Object properties for MAX31785 device. These
properties are for the fan status, tach target, tach input, and tach margin
(+ve or -ve) percent. To support the signed tach margin input, added
infrastructure routines for 8 bit signed integer.
Please review.
Th
On 7/12/22 18:08, Murilo Opsfelder Araujo wrote:
Some systems have /proc/device-tree/cpus/../clock-frequency. However,
this is not the expected path for a CPU device tree directory.
Signed-off-by: Murilo Opsfelder Araujo
Signed-off-by: Fabiano Rosas
---
Reviewed-by: Daniel Henrique Barboz
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 7/12/22 10:51, Jason A. Donenfeld wrote:
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This is confirmed to successf
Current implementation lacks the support to add signed 8 bit integer
property to an Object. This fix adds the necessary infrastructure
routines.
Signed-off-by: Maheswara Kurapati
---
include/qom/object.h | 21
qom/object.c | 60 ++
Update the tach input based on the percentage of tach target. The tach margin
could be a +ve or -ve margin of the target tach rpm.
Signed-off-by: Maheswara Kurapati
---
hw/sensor/max31785.c | 24
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/hw/sensor/m
This fix adds object properties for the FAN_COMMAND_1 (3Bh), STATUS_FANS_1_2
(81h),
READ_FAN_SPEED_1 (90h) registers for the MAX31785 instrumentation. An additional
property tach_margin_percent updates the tachs for a configured percent of
FAN_COMMAND_1 value.
Registerproperty
---
On Thu, 14 Jul 2022 at 14:04, Maheswara Kurapati
wrote:
>
> This fix adds object properties for the FAN_COMMAND_1 (3Bh), STATUS_FANS_1_2
> (81h),
> READ_FAN_SPEED_1 (90h) registers for the MAX31785 instrumentation. An
> additional
> property tach_margin_percent updates the tachs for a configured
In https://gitlab.com/qemu-project/qemu/-/issues/1103 Idan pointed
out that our regime_tcr() function doesn't handle the fact that some
of the config bits for the Secure stage 2 translation regime are
shared with NS EL2 and stored in VTCR_EL2 rather than VSTCR_EL2.
Currently the only visible effec
In get_level1_table_address(), instead of using precalculated values
of mask and base_mask from the TCR struct, calculate them directly
(in the same way we currently do in vmsa_ttbcr_raw_write() to
populate the TCR struct fields).
Signed-off-by: Peter Maydell
---
target/arm/ptw.c | 14 +-
The regime_tcr() function returns a pointer to a struct TCR
corresponding to the TCR controlling a translation regime. The
struct TCR has the raw value of the register, plus two fields mask
and base_mask which are used as a small optimization in the case of
32-bit short-descriptor lookups. Almost
We have a bug in our handling of accesses to the AArch32 VTCR
register on big-endian hosts: we were not adjusting the part of the
uint64_t field within TCR that the generated code would access. That
can be done with offsetoflow32(), by using an ARM_CP_STATE_BOTH cpreg
struct, or by defining a full
The only caller of regime_tcr() is now regime_tcr_value(); fold the
two together, and use the shorter and more natural 'regime_tcr'
name for the new function.
Signed-off-by: Peter Maydell
---
target/arm/internals.h | 16 +---
target/arm/helper.c | 6 +++---
target/arm/ptw.c
Change the representation of the TCR_EL* registers in the CPU state
struct from struct TCR to uint64_t. This allows us to drop the
custom vmsa_ttbcr_raw_write() function, moving the "enforce RES0"
checks to their more usual location in the writefn
vmsa_ttbcr_write(). We also don't need the resetf
Change the representation of the VSTCR_EL2 and VTCR_EL2 registers in
the CPU state struct from struct TCR to uint64_t.
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 4 ++--
target/arm/internals.h | 4 ++--
target/arm/helper.c| 4 +---
target/arm/ptw.c | 14 +++---
Hi,
While reviewing Stefanâs libblkio driver series, Iâve noticed that
block/parallels.c contains a call to bdrv_co_pwritev() that doesnât pass
a QEMUIOVector object but a plain buffer instead. That seems wrong and
also pretty dangerous, so change it to a bdrv_co_pwrite() call (as I
assume
On Mon, 11 Jul 2022 at 10:34, Michael S. Tsirkin wrote:
>
> On Sun, Jul 10, 2022 at 10:30:03PM +0530, Ani Sinha wrote:
> > Changelog:
> > v2:
> > - a new class of python based tests introduced that is separate from
> > avocado
> >tests or qtests. Can be run by using "make check-pytest".
> >
In regime_tcr() we return the appropriate TCR register for the
translation regime. For Secure EL2, we return the VSTCR_EL2 value,
but in this translation regime some fields that control behaviour are
in VTCR_EL2. When this code was originally written (as the comment
notes), QEMU didn't care about
On 7/13/22 15:38, Matheus Ferst wrote:
When using "-machine none", env->tb_env is not allocated, causing the
segmentation fault reported in issue #85 (launchpad bug #811683). To
avoid this problem, check if the pointer != NULL before calling the
methods to print TBU/TBL/DECR.
Resolves: https:
On Tue, 12 Jul 2022 at 23:45, Philippe Mathieu-Daudé via
wrote:
>
> The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
>
> Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
> (2022-07-12 14:12:15 +0100)
>
> are available in the Git repository at:
Test an allocating write to a parallels image that has a backing node.
Before HEAD^, doing so used to give me a failed assertion (when the
backing node contains only `42` bytes; the results varies with the value
chosen, for `0` bytes, for example, all I get is EIO).
Signed-off-by: Hanna Reitz
---
Commit a4072543ccdddbd241d5962d9237b8b41fd006bf has changed the I/O here
from working on a local one-element I/O vector to just using the buffer
directly (using the bdrv_co_pread()/bdrv_co_pwrite() helper functions
introduced shortly before).
However, it only changed the bdrv_co_preadv() call to b
On Wed, 13 Jul 2022 at 08:53, Cédric Le Goater wrote:
>
> The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
>
> Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
> (2022-07-12 14:12:15 +0100)
>
> are available in the Git repository at:
>
> htt
On Sun, Jul 10, 2022 at 10:30:05PM +0530, Ani Sinha wrote:
> Added the SPDX license identifiers based on the following output from the
> licensee tool for bios bits:
>
> $ licensee detect bits/
> License:NOASSERTION
> Matched files: COPYING
> COPYING:
> Content hash: 7a1fdfa894728ea695
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
Also here ->aio_context is read by I/O threads and written
under BQL.
Signed-off-by: Emanuele Giuseppe Esposito
---
block.c | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Hanna Reitz
On Sun, Jul 10, 2022 at 10:30:10PM +0530, Ani Sinha wrote:
> This change adds python based test environment that can be used to run pytest
> from within a virtual environment. A bash script sets up a virtual environment
> and then runs the python based tests from within that environment.
> All depe
On Thu, 14 Jul 2022, Daniel P. Berrangé wrote:
> On Sun, Jul 10, 2022 at 10:30:05PM +0530, Ani Sinha wrote:
> > Added the SPDX license identifiers based on the following output from the
> > licensee tool for bios bits:
> >
> > $ licensee detect bits/
> > License:NOASSERTION
> > Matched f
On Thu, 14 Jul 2022, Daniel P. Berrangé wrote:
> On Sun, Jul 10, 2022 at 10:30:10PM +0530, Ani Sinha wrote:
> > This change adds python based test environment that can be used to run
> > pytest
> > from within a virtual environment. A bash script sets up a virtual
> > environment
> > and then
On 7/14/22 15:51, Peter Maydell wrote:
On Wed, 13 Jul 2022 at 08:53, Cédric Le Goater wrote:
The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-07-12 14:12:15 +0100)
are available in
at 12:18 PM, Klaus Jensen wrote:
> On Jul 12 14:26, Klaus Jensen wrote:
>> On Jul 9 12:35, Jinhao Fan wrote:
>>> Use irqfd to directly notify KVM to inject interrupts. This is done by
>>> registering a virtual IRQ(virq) in KVM and associate the virq with an
>>> irqfd, so that KVM can directly in
at 1:34 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> While testing Jinhaos ioeventfd patch I found it useful with a couple of
> additional trace events since we no longer see the mmio events.
>
> Signed-off-by: Klaus Jensen
> ---
> hw/nvme/ctrl.c | 8
> hw/nvme/trace-events
On Wed, 13 Jul 2022 at 05:59, Richard Henderson
wrote:
>
> Ho hum. Let a feature loose on users and they find bugs. Mark noticed
> that the wrong value was being picked up for VL when SVE is disabled.
> I had run the same test but failed to notice the vector length wasn't
> as expected, though t
On Mon, 11 Jul 2022 at 04:14, Richard Henderson
wrote:
>
> The documentation for PROT_MTE says that it cannot be cleared
> by mprotect. Further, the implementation of the VM_ARCH_CLEAR bit,
> contains PROT_BTI confiming that bit should be cleared.
>
> Introduce PAGE_TARGET_STICKY to allow target/
On 6/20/22 16:03, Pierre Morel wrote:
> S390x CPU Topology allows a non uniform repartition of the CPU
> inside the topology containers, sockets, books and drawers.
>
> We use numa to place the CPU inside the right topology container
> and report the non uniform topology to the guest.
>
> Note th
From: Tobias Röhmel
This flag is necessary to add features for the Cortex-R52.
Signed-off-by: Tobias Röhmel
---
target/arm/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index df677b2d5d..86e06116a9 100644
--- a/target/arm/cpu.h
+++ b/target/arm/c
On Wed, 13 Jul 2022 at 09:36, Bernhard Beschow wrote:
>
> The next patches will need to take advantage of it.
>
> Signed-off-by: Bernhard Beschow
Reviewed-by: Peter Maydell
thanks
-- PMM
On Wed, 13 Jul 2022 at 09:49, Bernhard Beschow wrote:
>
> The USB controller is an integral part of PIIX3 (function 2). So create
> it as part of the southbridge.
>
> Note that the USB function is optional in QEMU. This is why it gets
> unparented if it is disabled, otherwiese QEMU will abort with
From: Tobias Röhmel
Add ARMCacheAttrs to the signature of pmsav8_mpu_lookup to prepare for the
Cortex-R52 MPU which uses and combines cache attributes of different
translation levels.
Signed-off-by: Tobias Röhmel
---
target/arm/internals.h | 13 +++--
target/arm/m_helper.c | 3 ++-
On Wed, 13 Jul 2022 at 09:37, Bernhard Beschow wrote:
>
> Now that the RTC is created as part of the southbridges it doesn't need
> to be an out-parameter any longer.
>
> Signed-off-by: Bernhard Beschow
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
From: Tobias Röhmel
The ARM Cortex-R52 is not AARCH64 but uses RVBAR.
Signed-off-by: Tobias Röhmel
---
target/arm/cpu.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1b5d535788..2c26a5387d 100644
--- a/target/arm/cpu.c
+++ b
When querying '-cpu help' there is no presentation of fact that a
CPU may be deprecated. The user just has to try it and see if they
get a depecation message at runtime. The QMP command for querying
CPUs report a deprecation bool flag, but not the explanatory
reason.
The Icelake-Client CPU (remov
On Wed, 13 Jul 2022 at 09:52, Bernhard Beschow wrote:
>
> Fixes the "extra-semi" clang-tidy check.
>
> Signed-off-by: Bernhard Beschow
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
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