On 07:37 Tue 21 Jun , Richard Henderson wrote:
> On 6/21/22 05:59, Luc Michel wrote:
> > v2:
> >- fix linux-user compilation. Declare semihosting_exit_request "static
> > inline G_NORETURN" on CONFIG_USER_ONLY side. Use
> > g_assert_not_reached() to enforce the G_NORETURN since th
On 13:45 Tue 07 Jun , Richard Henderson wrote:
> Signed-off-by: Richard Henderson
Reviewed-by: Luc Michel
> ---
> accel/stubs/tcg-stub.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
> index ea4a0dd2fb..6ce8a34228 100644
>
On 6/18/22 01:09, Iris Chen wrote:
Signed-off-by: Iris Chen
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
tests/qtest/aspeed_smc-test.c | 74 +--
1 file changed, 63 insertions(+), 11 deletions(-)
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/a
On 13:45 Tue 07 Jun , Richard Henderson wrote:
> Provide the callback with consistent state -- always use
> host error numbers. The individual callback can then
> decide if the errno requires conversion for the guest.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Luc Michel
> ---
> g
Laurent Vivier writes:
> As qemu_opts_parse_noisily() flattens the QAPI structures ("type" field
> of Netdev structure can collides with "type" field of SocketAddress),
> we introduce a way to bypass qemu_opts_parse_noisily() and use directly
> visit_type_Netdev() to parse the backend parameters.
Hi,
> AFAIU 'true' is the behavior you are proposing with your EFI changes?
> Saying that what's the difference between 'false' & 'default' wrt EFI
> firmware? Just wondering do we need default?
true/false will force the one or the other no matter what.
'default' allows the firmware to choose
On 13:45 Tue 07 Jun , Richard Henderson wrote:
> We've already loaded cs->env_ptr into a local variable; use it.
> Since env is unconditionally used, we don't need a dummy use.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Luc Michel
> ---
> semihosting/arm-compat-semi.c | 7 +++
>
Hi Gerd,
Hi,
AFAIU 'true' is the behavior you are proposing with your EFI changes?
Saying that what's the difference between 'false' & 'default' wrt EFI
firmware? Just wondering do we need default?
true/false will force the one or the other no matter what.
'default' allows the firmware t
On 6/6/22 22:36, Matthew Rosato wrote:
If the ZPCI_OP ioctl reports that is is available and usable, then the
underlying KVM host will enable load/store intepretation for any guest
device without a SHM bit in the guest function handle. For a device that
will be using interpretation support, e
On 6/21/22 20:30, Richard Henderson wrote:
On 6/21/22 09:58, Paolo Bonzini wrote:
On 6/20/22 18:41, Matheus Kowalczuk Ferst wrote:
On 17/06/2022 07:12, Paolo Bonzini wrote:
Hi Matheus,
could you please test the tests-tcg-next branch at
https://gitlab.com/bonzini/qemu?
At be6090bcac10, it wor
On 6/6/22 22:36, Matthew Rosato wrote:
The zpcii-disable machine property can be used to force-disable the use
of zPCI interpretation facilities for a VM. By default, this setting
will be off for machine 7.1 and newer.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-pci-kvm.c|
1. support decoding of 'bit string','octet string',
'object id', and 'context specific tag' for DER decoder.
2. support encoding of int and sequence for DER decoder.
3. add test suites for the above changes.
Signed-off-by: lei he
Reviewed-by: Daniel P. Berrangé
---
crypto/der.c
On Wed, 22 Jun 2022 at 06:07, Alex Bennée wrote:
> Richard Henderson writes:
> > The symptom is an early-ish crash booting the linux kernel -- without
> > earlycon there is no output at all. Reproducing it requires both
> > -bios QEMU_EFI.fd and -kernel Image.gz. Using only one of the two
> > op
Move 'include "qemu/osdep.h"' from rsakey.h to rsakey.c.
Signed-off-by: lei he
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
---
crypto/rsakey.c | 1 +
crypto/rsakey.h | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/crypto/rsakey.c b/crypto/rsakey.c
in
1. add test suite for ecdsa algorithm.
2. use qcrypto_akcihper_max_xxx_len to help create buffers in
Signed-off-by: lei he
Reviewed-by: Daniel P. Berrangé
---
tests/unit/test-crypto-akcipher.c | 338 --
1 file changed, 323 insertions(+), 15 deletions(-)
diff
Implement ECDSA algorithm by gcrypt
Signed-off-by: lei he
Reviewed-by: Daniel P. Berrangé
---
crypto/akcipher-gcrypt.c.inc | 409 +++
1 file changed, 409 insertions(+)
diff --git a/crypto/akcipher-gcrypt.c.inc b/crypto/akcipher-gcrypt.c.inc
index abb1fb2
Introduce ECDSA related structures to qapi-crypto.
Signed-off-by: lei he
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
---
qapi/crypto.json | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/qapi/crypto.json b/qapi/crypto.jso
This patch introduced ECDSA algorithm for crypto.
V1 -> V2:
- The reserved function prefix '_' is no longer used.
- When parsing ECDSA key: 1) set errp as early as possible,
2) use g_autoptr to avoid manually freeing memory, 3) simplified the
code parsing public key for gcrypt.
- When parsing the
Add ECDSA key parser and ECDSA signature parser.
Signed-off-by: lei he
---
crypto/ecdsakey-builtin.c.inc | 248 ++
crypto/ecdsakey.c | 118
crypto/ecdsakey.h | 66 +++
crypto/meson.build|
Implement ECDSA algorithm by hogweed and nettle.
Signed-off-by: lei he
Reviewed-by: Daniel P. Berrangé
---
crypto/akcipher-nettle.c.inc | 282 +++
1 file changed, 282 insertions(+)
diff --git a/crypto/akcipher-nettle.c.inc b/crypto/akcipher-nettle.c.inc
> -Original Message-
> From: Daniel P. Berrangé
> Sent: Monday, June 20, 2022 6:37 PM
> To: Zhang, Chen
> Cc: Thomas Huth ; Jason Wang
> ; qemu-dev ; Paolo
> Bonzini ; Eduardo Habkost ;
> Eric Blake ; Markus Armbruster
> ; Peter Maydell ; Laurent
> Vivier ; Yuri Benditovich
> ; Andrew M
On 6/21/22 16:55, Richard Henderson wrote:
On 6/21/22 00:51, Paolo Bonzini wrote:
diff --git a/pc-bios/optionrom/Makefile b/pc-bios/optionrom/Makefile
index ea89ce9d59..e90ca2e1c6 100644
--- a/pc-bios/optionrom/Makefile
+++ b/pc-bios/optionrom/Makefile
@@ -11,7 +11,7 @@ CFLAGS = -O2 -g
quiet-c
On 13:45 Tue 07 Jun , Richard Henderson wrote:
> Split out the non-ARM specific portions of SYS_OPEN to a
> reusable function. This handles gdb and host file i/o.
>
> Add helpers to validate the length of the filename string.
> Prepare for usage by other semihosting by allowing the
> filename
On [2022 Jun 21] Tue 13:24:27, Iris Chen wrote:
> From: Iris Chen
>
> Signed-off-by: Iris Chen
Reviewed-by: Francisco Iglesias
> ---
> Fixed .needed for subsection and suggestions from Francisco
>
> hw/block/m25p80.c | 82 ++-
> 1 file changed, 6
The following changes since commit f200ff158d5abcb974a6b597a962b6b2fbea2b06:
Merge tag 'pull-tcg-20220621' of https://gitlab.com/rth7680/qemu into staging
(2022-06-21 13:47:20 -0700)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-aspeed-202
Buildroot images are smaller than the OpenBMC images and faster to
run. Built from source using :
http://patchwork.ozlabs.org/project/buildroot/list/?series=303465
Signed-off-by: Cédric Le Goater
---
tests/avocado/machine_aspeed.py | 52 +
1 file changed, 52 in
The board has no such device. It might have been useful for some tests
in the past, it's not anymore and the same can be achieved on the
command line.
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
inde
Create a named I2C temperature sensor device on the command line,
instantiate device from Linux since it is not part of the device tree,
and check the temperature is correctly reported under sysfs.
Signed-off-by: Cédric Le Goater
---
tests/avocado/machine_aspeed.py | 13 +
1 file cha
Create a named I2C temperature sensor device on the command line,
instantiate device from Linux since it is not part of the device tree,
and check the temperature is correctly reported under sysfs.
Signed-off-by: Cédric Le Goater
---
tests/avocado/machine_aspeed.py | 13 +
1 file cha
It's easier to run. Keep test_arm_ast2600_debian() under the
boot_linux_console.py file because it requires the extract_from_deb()
helper. We could remove it when we have tests for the AST2600.
Signed-off-by: Cédric Le Goater
---
tests/avocado/boot_linux_console.py | 43 -
From: Joe Komlodi
Occasionally a peripheral will have different operating modes, where the
MMIO layout changes, but some of the register fields have the same offsets
and behaviors.
To help support this, we add SHARED_FIELD_XX macros that create SHIFT,
LENGTH, and MASK macros for the fields that
Add an RTC device and check that the output of the hwclock command
matches the current year.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
tests/avocado/machine_aspeed.py | 8
1 file changed, 8 insertions(+)
diff --git a/tests/avocado/m
From: Joe Komlodi
On AST2600, I2C has a secondary mode, called "new mode", which changes
the layout of registers, adds some minor behavior changes, and
introduces a new way to transfer data called "packet mode".
Most of the bit positions of the fields are the same between old and new
mode, so we
From: Joe Komlodi
Signed-off-by: Joe Komlodi
Change-Id: I566eb09f4b9016e24570572f367627f6594039f5
Message-Id: <20220331043248.2237838-7-koml...@google.com>
Signed-off-by: Cédric Le Goater
---
hw/i2c/aspeed_i2c.c | 3 +++
hw/i2c/trace-events | 2 +-
2 files changed, 4 insertions(+), 1 deletion(
From: Joel Stanley
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
hw/misc/aspeed_hace.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 4b5997e18fad..731234b78c4c 100644
From: Joe Komlodi
This cleans up some of the field accessing, setting, and clearing
bitwise operations, and wraps them in macros instead.
Signed-off-by: Joe Komlodi
Change-Id: I33018d6325fa04376e7c29dc4a49ab389a8e333a
Message-Id: <20220331043248.2237838-4-koml...@google.com>
Signed-off-by: Cédr
Based on :
https://lore.kernel.org/qemu-devel/20220324100439.478317-2-troy_...@aspeedtech.com/
Cc: Troy Lee
Cc: Jamin Lin
Cc: Steven Lee
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
include/hw/i2c/aspeed_i2c.h | 1 +
hw/i2c/aspeed_i2c.c | 24
From: Joe Komlodi
Using a register array will allow us to represent old-mode and new-mode
I2C registers by using the same underlying register array, instead of
adding an entire new set of variables to represent new mode.
As part of this, we also do additional cleanup to use ARRAY_FIELD_
macros i
From: Klaus Jensen
Build a single string instead of having several parameters on the trace
event.
Suggested-by: Cédric Le Goater
Signed-off-by: Klaus Jensen
[ clg: simplified trace buffer creation ]
Message-Id: <20220601210831.67259-2-...@irrelevant.dk>
Signed-off-by: Cédric Le Goater
---
hw
From: Joe Komlodi
Moves register definitions and short commonly used inlined functiosn to
the header file to help tidy up the implementation file.
Signed-off-by: Joe Komlodi
Change-Id: I34dff7485b6bbe3c9482715ccd94dbd65dc5f324
Message-Id: <20220331043248.2237838-8-koml...@google.com>
Signed-off
There is no 'slave match interrupt' enable bit in the Interrupt
Control Register. Consider it is always enabled and extend the mask
value 'bus->regs[intr_ctrl_reg]' with the SLAVE_ADDR_RX_MATCH bit when
the interrupt is raised.
Signed-off-by: Cédric Le Goater
---
hw/i2c/aspeed_i2c.c | 13 +++
From: Troy Lee
Instantiate the I2C buses in AST1030 model and create two slave device
for ast1030-evb.
Signed-off-by: Troy Lee
Signed-off-by: Jamin Lin
Signed-off-by: Steven Lee
Reviewed-by: Joel Stanley
[ clg : - adapted to current AST1030 upstream models
- changed AST2600 to AST103
Hi,
On 6/17/22 08:20, Zhenzhong Duan wrote:
> The structure of probe request doesn't include the tail, this leads
> to a few field missed to be copied. Currently this isn't an issue as
> those missed field belong to reserved field, just in case reserved
> field will be used in the future.
>
> Fixe
From: Klaus Jensen
Add support for writing and reading the device address register in old
register mode.
On the AST2400 (only 1 slave address)
* no upper bits
On the AST2500 (2 possible slave addresses),
* bit[31] : Slave Address match indicator
* bit[30] : Slave Address Receiving pendi
From: Iris Chen
Signed-off-by: Iris Chen
Reviewed-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
tests/qtest/aspeed_smc-test.c | 74 +--
1 file changed, 63 insertions(+), 11 deletions(-)
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed
The end address of memory region section isn't correctly calculated
which leads to overflowed mtree dump:
Dispatch
Physical sections
..
#70 @2000..00011fff io [ROOT]
#71 @5000..5fff (noname)
#72 @5000..00
On 21/06/2022 19:34, Daniel Henrique Barboza wrote:
It is not advisable to execute an object_dynamic_cast() to poke into
bus->qbus.parent and follow it up with a C cast into the PnvPHB type we
think we got.
In fact this is not needed. There is nothing sophisticated being done
with the PHB obj
> > +/*
> > + * This is very inefficient, but good enough for now!
> > + * Also thed payload will always fit, so no need to handle the MORE flag
> > and
> > + * make this stateful.
> > + */
> > +static ret_code cmd_media_get_poison_list(struct cxl_cmd *cmd,
> > +
There are two situations to start system by kernel file. If exists bios
option, system will boot from loaded bios file, else system will boot
from hardcoded auxcode, and jump to kernel elf entry.
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/loongson3.c | 109 +---
Add fw_cfg table for loongarch virt machine, including memmap table.
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/fw_cfg.c | 33 ++
hw/loongarch/fw_cfg.h | 15
hw/loongarch/loongson3.c| 47 -
hw/loongarch/m
1.In general loongarch ipi device, 32bit registers is emulated, however for
anysend/mailsend device only 64bit register access is supported. So separate
the ipi memory region into two regions, including 32 bits and 64 bits.
2.By the document of ipi mailsend device, byte is written only when the ma
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node,
pcie node into it, and create fdt rom memory region. Now fdt info is not
full since only uefi bios uses fdt, linux kernel does not use fdt.
Loongarch Linux kernel uses acpi table which is full in qemu virt
machine.
Signe
Add smbios support for loongarch virt machine, and put them into fw_cfg
table so that bios can parse them quickly. The weblink of smbios spec:
https://www.dmtf.org/dsp/DSP0134, the version is 3.6.0.
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/Kconfig| 1 +
hw/loongarch/loongson3.c
Add uefi bios loading support, now only uefi bios is porting to
loongarch virt machine.
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/loongson3.c| 34 ++
include/hw/loongarch/virt.h | 4
2 files changed, 38 insertions(+)
diff --git a/hw/loongarch/loongs
Loongarch virt machine uses general hardware reduces acpi method, rather
than LS7A acpi device. Now only power management function is used in
acpi ged device, memory hotplug will be added later. Also acpi tables
such as RSDP/RSDT/FADT etc.
The acpi table has submited to acpi spec, and will release
From: zhaotianrui
This series add some functions for LoongArch virt machine,
such as support fw_cfg table, loading uefi bios and linux kernel, etc.
Also fix some bugs of ipi device, ECFG reg, etc.
Xiaojuan Yang (10):
hw/loongarch: rename macro prefix LS_PCI to LS7A_PCI
hw/loongarch: Add fw_c
Since the MacOS SCSI implementation is quite old (and Apple added some firmware
customisations to their drives for m68k Macs) there is need to add a mechanism
to correctly handle Apple-specific quirks.
Add a new quirks bitmap to SCSIDiskState that can be used to enable these
features as required.
Here are the next set of patches from my ongoing work to allow the q800
machine to boot MacOS related to SCSI devices.
Patch 1 adds a new quirks bitmap to SCSIDiskState to allow buggy and/or
legacy features to enabled on an individual device basis. Once the quirks
bitmap has been added, patch 2 us
Both MacOS and A/UX make use of vendor-specific MODE SELECT commands with PF=0
to identify SCSI devices:
- MacOS sends a MODE SELECT command with PF=0 for the MODE_PAGE_VENDOR_SPECIFIC
(0x0) mode page containing 2 bytes before initialising a disk
- A/UX (installed on disk) sends a MODE SELECT c
There is such error info when running linux kernel:
tcg_handle_interrupt: assertion failed: (qemu_mutex_iothread_locked()).
calling stack:
#0 in raise () at /lib64/libc.so.6
#1 in abort () at /lib64/libc.so.6
#2 in g_assertion_message_expr.cold () at /lib64/libglib-2.0.so.0
By the manual of LoongArch CSR, the VS field(18:16 bits) of
ECFG reg means that the number of instructions between each
exception entry is 2^VS.
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/loongarch/cpu.c b/target/loongar
By default quirk_mode_page_apple_vendor should be enabled for all scsi-cd
devices
connected to the q800 machine to enable MacOS to detect and use them.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
in
By default quirk_mode_sense_rom_use_dbd should be enabled for all scsi-cd
devices
connected to the q800 machine to correctly report the CDROM block descriptor
back
to A/UX.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
hw/m68k/q800.c | 1 +
1 file changed, 1 insertion(+)
di
When A/UX configures the CDROM device it sends a truncated MODE SELECT request
for page 1 (MODE_PAGE_R_W_ERROR) which is only 6 bytes in length rather than
10. This seems to be due to bug in Apple's code which calculates the CDB message
length incorrectly.
The work at [1] suggests that this trunca
Rename macro LS_PCIECFG_xxx to LS7A_PCI_CFG_xxx to keep consistency
with other macros.
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/loongson3.c | 4 ++--
include/hw/pci-host/ls7a.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch
During SCSI bus enumeration A/UX sends a MODE SENSE command to the CDROM with
the DBD bit unset and expects the response to include a block descriptor. As per
the latest SCSI documentation, QEMU currently force-disables the block
descriptor for CDROM devices but the A/UX driver expects the requeste
By default quirk_mode_page_vendor_specific_apple should be enabled for both
scsi-hd
and scsi-cd devices to allow MacOS to format SCSI disk devices, and A/UX to
enumerate SCSI CDROM devices succesfully without getting stuck in a loop.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 2 ++
1
By default quirk_mode_page_truncated should be enabled for all scsi-cd devices
connected to the q800 machine to allow A/UX to enumerate SCSI CDROM devices
without hanging.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/m68k/q800.c b/hw/m
When initialising a drive ready to install MacOS, Apple HD SC Setup first
attempts
to format the drive. Add a simple FORMAT UNIT command which simply returns
success
to allow the format to succeed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
---
hw/scsi/scsi-disk.c |
The Apple HD SC Setup program uses a SCSI INQUIRY command to check that any SCSI
hard disks detected match a whitelist of vendors and products before allowing
the "Initialise" button to prepare an empty disk.
Add known-good default vendor and product information using the existing
compat_prop mech
One of the mechanisms MacOS uses to identify CDROM drives compatible with MacOS
is to send a custom MODE SELECT command for page 0x30 to the drive. The
response to this is a hard-coded manufacturer string which must match in order
for the CDROM to be usable within MacOS.
Add an implementation of t
A/UX sends a MODE_PAGE_R_W_ERROR command with the AWRE bit set to 0 when
enumerating
CDROM drives. Since the bit is currently hardcoded to 1 then indicate that the
AWRE
bit can be changed (even though we don't care about the value) so that
the MODE_PAGE_R_W_ERROR page can be set successfully.
Si
The MODE SELECT command can contain an optional block descriptor that can be
used
to set the device block size. If the block descriptor is present then update the
block size on the SCSI device accordingly.
This allows CDROMs to be used with A/UX which requires a CDROM drive which is
capable of sw
The MacOS CDROM driver uses a SCSI INQUIRY command to check that any SCSI CDROMs
detected match a whitelist of vendors and products before adding them to the
list of available devices.
Add known-good default vendor and product information using the existing
compat_prop mechanism so the user doesn'
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This is confirmed to successfully initialize the
RNG on Linux 5.19-rc2.
Cc: Stafford Horne
Signed-off-by: Jason A. Donenfeld
---
Changes v1-
Laurent Vivier writes:
> On 21/06/2022 10:49, Markus Armbruster wrote:
>> Laurent Vivier writes:
>>
>>> On 20/06/2022 17:21, Markus Armbruster wrote:
Laurent Vivier writes:
> Copied from socket netdev file and modified to use SocketAddress
> to be able to introduce new featur
Hi,
On Wed, Jun 22, 2022 at 12:20:45PM +0200, Eric Auger wrote:
> Hi,
>
> On 6/17/22 08:20, Zhenzhong Duan wrote:
> > The structure of probe request doesn't include the tail, this leads
> > to a few field missed to be copied. Currently this isn't an issue as
> > those missed field belong to reser
On 6/22/22 13:55, Jean-Philippe Brucker wrote:
> Hi,
>
> On Wed, Jun 22, 2022 at 12:20:45PM +0200, Eric Auger wrote:
>> Hi,
>>
>> On 6/17/22 08:20, Zhenzhong Duan wrote:
>>> The structure of probe request doesn't include the tail, this leads
>>> to a few field missed to be copied. Currently this
There have been requests from other projects such LKFT to have
"official" docker images with pre-built QEMU binaries. These could
then be consumed by downstream CI systems by pulling directly from the
qemu-project container registry. The final image could then be run by
doing:
docker run --rm -i
Hi Daniel,
Thank your for your information. I decided to try to get this working on my
linux esxi guest because qemu AIX comes up in 5 minutes vs 10-12 on my Windows
machine and I am rebooting often. I used your -device spapr-vlan and -netdev
tap options. My complete qemu startup is
/usr/loca
Add error message for fake open calls when failing to create a temporary
file. I spent some time debugging an issue where for some reason I thought
/proc was misbehaving in the linux-user chroot environment, but it was
rather QEMU silently failing (and passing through an error) to the guest
applica
Is there support for host cpu passthrough for M1 SoCs?
Configure is trying to fall back on cross compilers for targets that
can have bi-arch or bi-endian toolchains, but there are many corner
cases where just checking the name can go wrong. For example, the RHEL
ppc64le compiler is bi-arch and bi-endian, but multilibs are disabled.
Therefore it cannot
Configure is trying to fall back on cross compilers for targets that
can have bi-arch or bi-endian toolchains, but there are many corner
cases where just checking the name can go wrong. For example, the RHEL
ppc64le compiler is bi-arch and bi-endian, but multilibs are disabled.
Therefore it cannot
System emulation tests do not run in a hosted environment, since they
do not link with libc. They should only use freestanding headers
(float.h, limits.h, stdarg.h, stddef.h, stdbool.h, stdint.h,
stdalign.h, stdnoreturn.h) and should be compiled with -ffreestanding
in order to use the compiler imp
On Wed, Jun 22, 2022 at 02:22:18PM +0200, Eric Auger wrote:
> >> the spec is pretty confusing here though (virtio-v1.2-csd01.pdf) as it
> >> presents the struct as follows:
> >>
> >> struct virtio_iommu_req_probe {
> >> struct virtio_iommu_req_head head;
> >> /* Device-readable */
> >> le32 endpoin
There is no need to waste cycles here if we only compile the system
binaries or tools. Additionally, this change is even a hard requirement
for building the tools on systems that do not have an entry in the
common-user/host/ folder (since common-user/meson.build is trying
to add such a path via the
On Wed, 22 Jun 2022 at 13:33, Alex Bennée wrote:
>
> There have been requests from other projects such LKFT to have
> "official" docker images with pre-built QEMU binaries. These could
> then be consumed by downstream CI systems by pulling directly from the
> qemu-project container registry. The f
Am 21/06/2022 um 19:26 schrieb Vladimir Sementsov-Ogievskiy:
> On 6/16/22 16:18, Emanuele Giuseppe Esposito wrote:
>> With the*nop* job_lock/unlock placed, rename the static
>> functions that are always under job_mutex, adding "_locked" suffix.
>>
>> List of functions that get this suffix:
>> j
Am 21/06/2022 um 17:03 schrieb Vladimir Sementsov-Ogievskiy:
> On 6/16/22 16:18, Emanuele Giuseppe Esposito wrote:
>> In preparation to the job_lock/unlock usage, create _locked
>> duplicates of some functions, since they will be sometimes called with
>> job_mutex held (mostly within job.c),
>>
Peter Maydell writes:
> On Wed, 22 Jun 2022 at 13:33, Alex Bennée wrote:
>>
>> There have been requests from other projects such LKFT to have
>> "official" docker images with pre-built QEMU binaries. These could
>> then be consumed by downstream CI systems by pulling directly from the
>> qemu-
How to control the booting of QEMU is often a source of confusion for
users. Bring the options that control this together in the manual
pages and add some verbiage to describe when each option is
appropriate.
Signed-off-by: Alex Bennée
Cc: Cédric Le Goater
---
qemu-options.hx | 80 +
On 6/22/22 06:47, Paolo Bonzini wrote:
System emulation tests do not run in a hosted environment, since they
do not link with libc. They should only use freestanding headers
(float.h, limits.h, stdarg.h, stddef.h, stdbool.h, stdint.h,
stdalign.h, stdnoreturn.h) and should be compiled with -ffree
On 6/22/22 03:42, Xiaojuan Yang wrote:
Rename macro LS_PCIECFG_xxx to LS7A_PCI_CFG_xxx to keep consistency
with other macros.
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/loongson3.c | 4 ++--
include/hw/pci-host/ls7a.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
Reviewed
On 6/22/22 02:35, Luc Michel wrote:
On 13:45 Tue 07 Jun , Richard Henderson wrote:
Split out the non-ARM specific portions of SYS_OPEN to a
reusable function. This handles gdb and host file i/o.
Add helpers to validate the length of the filename string.
Prepare for usage by other semihosti
On Wed, Jun 22, 2022 at 03:43:54PM +0100, Alex Bennée wrote:
>
> Peter Maydell writes:
>
> > On Wed, 22 Jun 2022 at 13:33, Alex Bennée wrote:
> >>
> >> There have been requests from other projects such LKFT to have
> >> "official" docker images with pre-built QEMU binaries. These could
> >> the
* Richard Henderson (richard.hender...@linaro.org) wrote:
> On 6/21/22 17:25, Juan Quintela wrote:
> > The following changes since commit c8b2d413761af732a0798d8df45ce968732083fe:
> >
> >Merge tag 'bsd-user-syscall-2022q2-pull-request' of
> > ssh://github.com/qemu-bsd-user/qemu-bsd-user into
On 6/22/22 4:35 AM, Pierre Morel wrote:
On 6/6/22 22:36, Matthew Rosato wrote:
If the ZPCI_OP ioctl reports that is is available and usable, then the
underlying KVM host will enable load/store intepretation for any guest
device without a SHM bit in the guest function handle. For a device that
On 6/22/22 4:50 AM, Pierre Morel wrote:
On 6/6/22 22:36, Matthew Rosato wrote:
The zpcii-disable machine property can be used to force-disable the use
of zPCI interpretation facilities for a VM. By default, this setting
will be off for machine 7.1 and newer.
Signed-off-by: Matthew Rosato
--
From: Marc-André Lureau
Commit c9c847481 broken dbus audio module compilation with bad
'CONFIG_GIO' usage. Furthermore, it implied extra dependency on audio
module which aren't necessary.
The problem was that 'dbus_display' is not correctly automatically set
on MacOS, because opengl dependency w
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