On Mon, May 16, 2022 at 08:26:53PM +0200, Ilya Dryomov wrote:
On Mon, May 16, 2022 at 12:03 PM Stefano Garzarella wrote:
If the namespace does not exist, rbd_create() fails with -ENOENT and
QEMU reports a generic "error rbd create: No such file or directory":
$ qemu-img create rbd:rbd/nam
If the namespace does not exist, rbd_create() fails with -ENOENT and
QEMU reports a generic "error rbd create: No such file or directory":
$ qemu-img create rbd:rbd/namespace/image 1M
Formatting 'rbd:rbd/namespace/image', fmt=raw size=1048576
qemu-img: rbd:rbd/namespace/image: error rb
On 09/05/2022 15.42, Philippe Mathieu-Daudé wrote:
On 9/5/22 15:18, Thomas Huth wrote:
[...]
By the way, what about MIPS? Could MIPS be switched to Capstone, too, so
that we could finally remove disas/mips.c ? (We're not using capstone
there yet, and MIPS has so many flavours, big and little e
- setting ext_g will implicitly set ext_i
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 6d01569cad..1c76debb2b 100644
--
On Mon, 16 May 2022 at 22:05, Eric Blake wrote:
>
> CID 1488362 points out that the second 'rc >= 0' check is now dead
> code.
>
> Reported-by: Peter Maydell
> Fixes: 172f5f1a40(nbd: remove peppering of nbd_client_connected)
> Signed-off-by: Eric Blake
> ---
> block/nbd.c | 8 ++--
Reviewed-
On Tue, 17 May 2022 at 04:39, Karthik Poduval wrote:
> Ok digging deeper, there was a compiler warning about a missing
> prototype of get_system_memory but I never thought it would lead to
> this sort of an issue.
If you're building QEMU from git it should default to
"warnings are errors". If you
Gerd Hoffmann writes:
> On Mon, May 09, 2022 at 02:31:05PM -0700, Dongwon Kim wrote:
>> Daniel,
>>
>> I found a way to make the monitor arguments in array type (['uint32']).
>> And I know how to retrieve monitor values from it but I could not find
>> how to pass the monitor values when starting
On Mon, May 16, 2022 at 10:29 PM Parav Pandit wrote:
>
>
>
> > From: Eugenio Perez Martin
> > Sent: Monday, May 16, 2022 4:51 AM
> >
> > On Fri, May 13, 2022 at 8:25 PM Parav Pandit wrote:
> > >
> > > Hi Gautam,
> > >
> > > Please fix your email client to have right response format.
> > > Otherw
On Mon, May 16, 2022 at 04:46:29PM -0400, Michael S. Tsirkin wrote:
> On Mon, May 16, 2022 at 11:26:03AM -0400, Igor Mammedov wrote:
> > .. and clean up not longer needed conditionals in DSTD build code
> > pvpanic-isa AML will be fetched and included when ISA bridge will
> > build its own AML code
On Mon, May 16, 2022 at 11:25:35AM -0400, Igor Mammedov wrote:
>
> Series is excerpt form larger refactoring that does
> the same for PCI devices, but it's too large at this
> point, so I've split off a relatively self-contained
> ISA/SMBUS patches into a smaller separate series, and
> PCI refacto
Hi Peter,
I am building it from git but not directly but via Yocto Kirkstone (it
was originally designed to build via downloaded tarball archive). I
will add the --enable-werror to the build recipe.
May I ask why address_space_init should be called from device realize
and not init ?
On Tue, May 1
Thanks Manish for the comment, i'll give my explanation and any
supplement are welcomed.
在 2022/5/17 1:13, manish.mishra 写道:
Hi Hyman Huang,
I had few doubts regarding this patch series.
For the first point, m'm rudely guessing that you want to figure out how
should we set the vcpu dirty limi
I encountered occasional test fail in some of build environment.
Then I found that adding g_usleep(2); soon after
> if (qatomic_cmpxchg(&data[i].n, 0, 4) == 0) {
in do_test_cancel() in tests/unit/test-thread-pool.c reproduces.
In this test, cancel operation is not done atomically.
If data.n
On 12/05/2022 14.16, Markus Armbruster wrote:
[...]> if (strstart(p, "sdl", &opts)) {
+/*
+ * sdl DisplayType needs hand-crafted parser instead of
+ * parse_display_qapi() due to some options not in
+ * DisplayOptions, specifically:
In some of our environment, sometimes test did not pass due to multithreading
behavior.
I think this fix will check correct behavior. Could you review this patch?
Hiroki Narukawa (1):
test-thread-pool: Fix occasional test fail
tests/unit/test-thread-pool.c | 6 +-
1 file changed, 5 inser
* Juan Quintela (quint...@redhat.com) wrote:
> We were calling qemu_target_page_size() left and right.
>
> Signed-off-by: Juan Quintela
(Copying in Peter Maydell)
Your problem here is most of these files are target independent
so you end up calling the qemu_target_page_size functions, which I gu
On Tue, May 17, 2022 at 03:03:38PM +1000, Alistair Francis wrote:
> On Sat, May 7, 2022 at 6:30 AM Atish Kumar Patra wrote:
> >
> > On Fri, May 6, 2022 at 4:00 AM Peter Maydell
> > wrote:
> > >
> > > On Fri, 6 May 2022 at 09:18, Daniel P. Berrangé
> > > wrote:
> > > >
> > > > On Fri, May 06, 2
Hi Zhangfei,
On 2022/5/11 22:17, zhangfei@foxmail.com wrote:
On 2022/5/10 下午10:08, Yi Liu wrote:
On 2022/5/10 20:45, Jason Gunthorpe wrote:
On Tue, May 10, 2022 at 08:35:00PM +0800, Zhangfei Gao wrote:
Thanks Yi and Eric,
Then will wait for the updated iommufd kernel for the PCI MMIO re
Hi Zhangfei,
On 2022/5/12 17:01, zhangfei@foxmail.com wrote:
Hi, Yi
On 2022/5/11 下午10:17, zhangfei@foxmail.com wrote:
On 2022/5/10 下午10:08, Yi Liu wrote:
On 2022/5/10 20:45, Jason Gunthorpe wrote:
On Tue, May 10, 2022 at 08:35:00PM +0800, Zhangfei Gao wrote:
Thanks Yi and Eric,
T
Thomas Huth writes:
> On 12/05/2022 14.16, Markus Armbruster wrote:
[...]
>>> This introduces the new "DisplaySDL" QAPI struct that is used to hold
>>> the parameters that are unique to the SDL display. The only specific
>>> parameter is currently "grab-mod" which is modeled as a string, so tha
17.05.2022 00:05, Eric Blake wrote:
CID 1488362 points out that the second 'rc >= 0' check is now dead
code.
Reported-by: Peter Maydell
Fixes: 172f5f1a40(nbd: remove peppering of nbd_client_connected)
Signed-off-by: Eric Blake
---
block/nbd.c | 8 ++--
1 file changed, 2 insertions(+), 6
Fix an incorrect "@@:" and move "-d keepdepfile" to the NINJAFLAGS variable.
Signed-off-by: Paolo Bonzini
---
Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile
index b842dbccdb..fad312040f 100644
--- a/Makefile
+++ b/Makefile
@@ -143,7 +143,7
Just hardcode $(CC) -E, it should be enough.
Signed-off-by: Paolo Bonzini
---
configure | 3 ---
pc-bios/optionrom/Makefile | 2 +-
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/configure b/configure
index 0cc8c876f7..4c8954feea 100755
--- a/configure
+++ b/confi
Let any make target specify ninja goals that needs to be built for it
(though selecting the goals is _not_ recursive on depending targets)
instead of having a custom mechanism only for "make check" and "make
bench".
Signed-off-by: Paolo Bonzini
---
Makefile | 3 +--
scripts/mtest2ma
TCG tests need both QEMU and firmware to be built, so do "ninja all" before
trying to run them.
Signed-off-by: Paolo Bonzini
---
tests/Makefile.include | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index ec84b2ebc0..72ce0561
This is useful because pc-bios/meson.build already has a list of all ROM
files, and thus does not need to use wildcards. The problems with
wildcards are mentioned above the definition of the LINKS variable,
but then the recommendation is disattended.
Reviewed-by: Richard Henderson
Signed-off-by:
tests/tcg/configure.sh has a complicated story.
In the beginning its code ran as part of the creation of config-target.mak
files, and that is where it placed the information on the target compiler.
However, probing for the buildability of TCG tests required multiple
inclusions of config-target.mak
This is the next part of the firmware cross compilation story. It only
looks at firmware that's strictly part of QEMU (optionrom, s390-ccw,
vof), and does not do docker cross compilers yet; but it takes the
infrastructure from tests/tcg/configure.sh and moves it in the main
configure script so tha
While container-based cross compilers are not supported, this already makes
it possible to build x86 optionroms on any machine that has an installation
of GCC and binutils for 32- or 64-bit x86.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configure | 29
Also in preparation for handling more binaries from the cross binutils,
support an option --cross-prefix-ARCH. All cross_cc_* defaults are
replaced with cross_prefix_*; the cross_cc_* fallbacks are extended
to the cross-compilation prefix, but the compiler fallbacks remain
as well. This way, for
13.05.2022 18:57, Alberto Faria wrote:
Convert uses of bdrv_pwrite_sync() into bdrv_co_pwrite_sync() when the
callers are already coroutine_fn.
Signed-off-by: Alberto Faria
Reviewed-by: Vladimir Sementsov-Ogievskiy
--
Best regards,
Vladimir
Ensure that the pc-bios/optionrom and pc-bios/s390-ccw directory
exist at the time when we'll write out the compiler configuration
for them.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configure | 49 -
1 file changed, 24 inser
We do not want v8plus for pure sparc32, as the difference with the V8 ABI
are only meaningful on 64-bit CPUs suh as ultrasparc; supersparc is the
best CPU to use for 32-bit.
Signed-off-by: Paolo Bonzini
---
tests/tcg/configure.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Firmware builds require paths to all the binutils; it is not enough to
use only cc, or even as/ld as in the case of tests/tcg/tricore.
Adjust the cross-compiler configurator to detect also ar, nm, objcopy,
ranlib and strip.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configu
In preparation for handling more binaries than just cc, handle
the case of "probe_target_compiler $cpu" directly in the function,
setting the target_* variables based on the ones that are used to
build QEMU. The clang check also needs to be moved after this
fallback.
Signed-off-by: Paolo Bonzini
The only compiler variable that is still needed is $(CC), for
contrib/plugins/Makefile. All firmware builds have their own
config-host.mak file.
Signed-off-by: Paolo Bonzini
---
configure | 6 --
1 file changed, 6 deletions(-)
diff --git a/configure b/configure
index 5b7b4e2cca..8cdec79f1a
The arm compiler can be used for armeb, and the sparc64 compiler
can be used for sparc.
Signed-off-by: Paolo Bonzini
---
configure | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index 90cb477c90..1d9d60185c 100755
--- a/configure
+++ b/configure
@@ -
While container-based cross compilers are not supported, this already makes
it possible to build s390-ccw on any machine that has s390x GCC and binutils
installed.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configure| 18 +-
pc-bios/s390-
On 5/16/22 20:49, Alberto Faria wrote:
Thanks for the heads up. In fact, looking at block-backend-io.h,
there's quite a few functions that (AFAICT) we could implement using
generated_co_wrapper:
- blk_pread, blk_preadv, blk_preadv_part
- blk_pwrite, blk_pwritev, blk_pwritev_part
-
While container-based cross compilers are not supported, this already
makes it possible to build vof on any machine that has an installation
of GCC and binutils for 32- or 64-bit PowerPC.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configure| 10 ++
pc-bi
On 5/17/22 10:34, Thomas Huth wrote:
This remains, and that's fine. One step at time.
Not sure how we want to proceed with that in the long run, though ...
IIRC clearly, Paolo once said that it doesn't really belong into
"-display" anyway and should be handled with the separate "-vnc" option
On 14/03/2022 15.31, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
By default, all Cirrus-CI jobs are added as 'on_success' (the
default value). Add a ${MANUAL_JOB} variable (default to 0)
to be able to add manual jobs.
Suggested-by: Daniel P. Berrangé
Signed-off-by: Philippe Mat
from hw/arm/boot.c
static const ARMInsnFixup bootloader[] = {
{ 0xe28fe004 }, /* add lr, pc, #4 */
...
}
$ rasm2 -a arm -d -e 0xe28fe004
add lr, pc, 4
$ rasm2 --help
-e Use big endian instead of little endian
why arm bootloader defalut is big endian?
On Tue, May 17, 2022 at 12:10:30PM +0200, Thomas Huth wrote:
> On 14/03/2022 15.31, Philippe Mathieu-Daudé wrote:
> > From: Philippe Mathieu-Daudé
> >
> > By default, all Cirrus-CI jobs are added as 'on_success' (the
> > default value). Add a ${MANUAL_JOB} variable (default to 0)
> > to be able t
On Tue, 17 May 2022 at 11:19, Liu Jaloo wrote:
>
> from hw/arm/boot.c
>
> static const ARMInsnFixup bootloader[] = {
> { 0xe28fe004 }, /* add lr, pc, #4 */
> ...
> }
>
> $ rasm2 -a arm -d -e 0xe28fe004
> add lr, pc, 4
>
> $ rasm2 --help
> -e Use big endian instead of little
03.05.2022 12:24, Kevin Wolf wrote:
Am 01.04.2022 um 12:08 hat Vladimir Sementsov-Ogievskiy geschrieben:
We don't need extra bitmap. All we need is to backup the original
bitmap when we do first merge. So, drop extra temporary bitmap and work
directly with target and backup.
Still to keep old s
On 17/05/2022 12.30, Daniel P. Berrangé wrote:
On Tue, May 17, 2022 at 12:10:30PM +0200, Thomas Huth wrote:
On 14/03/2022 15.31, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
By default, all Cirrus-CI jobs are added as 'on_success' (the
default value). Add a ${MANUAL_JOB} variabl
On Wed, May 04, 2022 at 02:39:05PM +0100, Stefan Hajnoczi wrote:
> On Tue, Apr 26, 2022 at 04:51:06AM -0400, Emanuele Giuseppe Esposito wrote:
> > This is a new attempt to replace the need to take the AioContext lock to
> > protect graph modifications. In particular, we aim to remove
> > (or better
Am 17. Mai 2022 03:41:51 UTC schrieb Alistair Francis :
>On Wed, Mar 2, 2022 at 8:54 AM Bernhard Beschow wrote:
>>
>> No changes. Just also CC'ed to qemu-trivial.
>>
>> The QOM API already provides appropriate accessors, so reuse them.
>>
>> Testing done:
>>
>> :$ make check
>> Ok:
On May 16 17:25, Lukasz Maniak wrote:
> On Mon, May 09, 2022 at 04:16:08PM +0200, Lukasz Maniak wrote:
> > Changes since v7:
> > - Fixed description of hw/acpi: Make the PCI hot-plug aware of SR-IOV
> > - Added description to docs: Add documentation for SR-IOV and
> > Virtualization Enhancements
From: Vladimir Sementsov-Ogievskiy
v4:
01,03: add Kevin's r-b
02: add hbitmap_free() on success patch if local_backup is not needed
Vladimir Sementsov-Ogievskiy (3):
block: block_dirty_bitmap_merge(): fix error path
block: improve block_dirty_bitmap_merge(): don't allocate extra bitmap
blo
From: Vladimir Sementsov-Ogievskiy
We don't need extra bitmap. All we need is to backup the original
bitmap when we do first merge. So, drop extra temporary bitmap and work
directly with target and backup.
Still to keep old semantics, that on failure target is unchanged and
user don't need to re
From: Vladimir Sementsov-Ogievskiy
We have too much logic to simply check that bitmaps are of the same
size. Let's just define that hbitmap_merge() and
bdrv_dirty_bitmap_merge_internal() require their argument bitmaps be of
same size, this simplifies things.
Let's look through the callers:
For
From: Vladimir Sementsov-Ogievskiy
At the end we ignore failure of bdrv_merge_dirty_bitmap() and report
success. And still set errp. That's wrong.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Nikita Lapshin
Reviewed-by: Kevin Wolf
---
block/monitor/bitmap-qmp-cmds.c | 5 -
1
From: Klaus Jensen
The SRIOV series exposed an issued with how CC register writes are
handled and how CSTS is set in response to that. Specifically, after
applying the SRIOV series, the controller could end up in a state with
CC.EN set to '1' but with CSTS.RDY cleared to '0', causing drivers to
e
27.04.2022 22:29, John Snow wrote:
On Fri, Apr 8, 2022 at 1:02 PM Vladimir Sementsov-Ogievskiy
wrote:
Hi all!
I always dreamed about getting rid of pattern
result = self.vm.qmp(...)
self.assert_qmp(result, 'return', {})
Here is a suggestion to switch to
self.vm.cmd(...)
pat
Paolo Bonzini writes:
> On 5/17/22 10:34, Thomas Huth wrote:
>>> This remains, and that's fine. One step at time.
>> Not sure how we want to proceed with that in the long run, though
>> ... IIRC clearly, Paolo once said that it doesn't really belong into
>> "-display" anyway and should be handl
From: Song Gao
This patch gives an introduction to the LoongArch target.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
MAINTAINERS | 6 ++
target/loongarch/README | 10 ++
2 files changed, 16 insertions(+)
create mode 100644
Hi All,
As this series only supports running binary files in ELF format, and does not
depend on
BIOS and kernel file. so this series are changed from RFC to patch vX.
The manual:
- https://github.com/loongson/LoongArch-Documentation/releases/tag/2022.03.17
Old series:
- https://patchew.org
From: Song Gao
This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 4 ++
target/loongarch/insn_trans
From: Song Gao
This includes:
- SLL.W, SRL.W, SRA.W, ROTR.W
- SLLI.W, SRLI.W, SRAI.W, ROTRI.W
- SLL.D, SRL.D, SRA.D, ROTR.D
- SLLI.D, SRLI.D, SRAI.D, ROTRI.D
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/insn_trans/trans_shift.c.inc
From: Song Gao
This patch adds target state header, target definitions
and initialization routines.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/loongarch/cpu-param.h | 18 ++
target/loongarch/cpu.c
From: Song Gao
This includes:
- ADD.{W/D}, SUB.{W/D}
- ADDI.{W/D}, ADDU16ID
- ALSL.{W[U]/D}
- LU12I.W, LU32I.D LU52I.D
- SLT[U], SLT[U]I
- PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
- AND, OR, NOR, XOR, ANDN, ORN
- MUL.{W/D}, MULH.{W[U]/D[U]}
- MULW.D.W[U]
- DIV.{W[U]/D[U]}, MOD.{W[U]/D[U]}
- ANDI,
From: Song Gao
This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Rich
From: Song Gao
This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
targe
From: Song Gao
This patch adds main translation routines and
basic functions for translation.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h| 6 ++
target/loongarch/op_helper.c | 21 +
target/loongarch/translate.c
From: Song Gao
This includes:
- EXT.W.{B/H}
- CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
- BYTEPICK.{W/D}
- REVB.{2H/4H/2W/D}
- REVH.{2W/D}
- BITREV.{4B/8B}, BITREV.{W/D}
- BSTRINS.{W/D}, BSTRPICK.{W/D}
- MASKEQZ, MASKNEZ
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
-
From: Song Gao
This includes:
- FCMP.cond.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper.c| 60
target/loongarch/helper.h| 9 +++
target/loongarch/insn_trans/t
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
qapi/machine-target.json | 6 --
target/loongarch/cpu.c | 26 ++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/qapi/machine-target.json b/qapi/machine-target.
From: Song Gao
This includes:
- FCVT.S.D, FCVT.D.S
- FFINT.{S/D}.{W/L}, FTINT.{W/L}.{S/D}
- FTINT{RM/RP/RZ/RNE}.{W/L}.{S/D}
- FRINT.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper.c| 393 +++
From: Song Gao
This includes:
- LL.{W/D}, SC.{W/D}
- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[_DB].{W/D}
- AM{MAX/MIN}[_DB].{WU/DU}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
.../loongarch/insn_trans/trans_atomic.c.inc | 113 ++
.../loong
From: Song Gao
This patch adds support for disassembling via option '-d in_asm'.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
include/disas/dis-asm.h | 2 +
meson.build | 1 +
target/loongarch/disas.c | 610
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 229 +++
target/loongarch/cpu.h | 2 +
target/loongarch/internals.h | 2 +
3 files changed, 233 insertions(+)
diff --git a/target/loo
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 1 +
target/loongarch/internals.h | 2 +
target/loongarch/machine.c | 85
target/loongarch/meson.build | 6 +++
4 files changed, 94 in
From: Song Gao
This includes:
- FLD.{S/D}, FST.{S/D}
- FLDX.{S/D}, FSTX.{S/D}
- FLD{GT/LE}.{S/D}, FST{GT/LE}.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
.../loongarch/insn_trans/trans_fmemory.c.inc | 153 ++
target/loongarch/
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
hw/loongarch/loongson3.c | 104 +++
1 file changed, 104 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loo
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu-csr.h | 208 +
target/loongarch/cpu.c | 36 +++
target/loongarch/cpu.h | 64
3 files changed, 308 insertions(+)
create mod
From: Song Gao
This includes:
- FMOV.{S/D}
- FSEL
- MOVGR2FR.{W/D}, MOVGR2FRH.W
- MOVFR2GR.{S/D}, MOVFRH2GR.S
- MOVGR2FCSR, MOVFCSR2GR
- MOVFR2CF, MOVCF2FR
- MOVGR2CF, MOVCF2GR
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 24 +++
target/loongarch/cpu.h| 51 ++
target/loongarch/internals.h | 9 +
target/loongarch/machine.c| 17 ++
tar
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig| 3 +
hw/intc/loongarch_extioi.c | 325 +
hw/intc/meson.build| 1 +
hw/intc/trace-events
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
MAINTAINERS | 8 +
docs/system/loongarch/loongson3.rst | 41 ++
target/loongarch/README | 54 +
3 files changed, 103 i
From: Song Gao
This includes:
- BEQ, BNE, BLT[U], BGE[U]
- BEQZ, BNEZ
- B
- BL
- JIRL
- BCEQZ, BCNEZ
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
.../loongarch/insn_trans/trans_branch.c.inc | 83 +++
target/loongarch/insns.decode
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c| 44
target/loongarch/cpu.h| 25 +++
target/loongarch/disas.c
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/disas.c | 17
target/loongarch/helper.h | 5 +
.../insn_trans/trans_privileged.c.inc
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c| 66 +++--
include/hw/loongarch/virt.h | 9 +
target/loongarch/cpu.h | 2 ++
3 files changed, 75 insertions(+), 2 deletions(-)
diff --git a/hw/loongarch/loongson3.c b
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some unimplented device to emulate guest unused
memory space.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Acked-by: Richard Henderson
---
hw/l
From: Song Gao
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Acked-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
---
tests/tcg/configure.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh
index 6
Emulate a 3A5000 board use the new loongarch instruction.
3A5000 belongs to the Loongson3 series processors.
The board consists of a 3A5000 cpu model and the virt
bridge. The host 3A5000 board is really complicated and
contains many functions.Now for the tcg softmmu mode
only part functions are emu
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
MAINTAINERS | 1 +
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 431 +
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 4 +
hw/rtc/Kconfig | 3 +
hw/rtc/ls7a_rtc.c | 526 +
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
softmmu/qdev-monitor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 12fe60c467..bb5897fc76 100644
--- a/softmmu/qdev-monitor.c
+
They currently return the value of their 'bytes' parameter on success.
Make them return 0 instead, for consistency with other I/O functions and
in preparation to implement them using generated_co_wrapper. This also
makes it clear that short reads/writes are not possible.
Signed-off-by: Alberto Fa
Also convert it into a generated_co_wrapper.
Signed-off-by: Alberto Faria
---
block/block-backend.c | 14 --
block/coroutines.h| 5 -
include/sysemu/block-backend-io.h | 4
tests/unit/test-block-iothread.c | 19 +++
4 files chan
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
MAINTAINERS | 2 +
hw/intc/Kconfig | 3 +
hw/intc/loongarch_ipi.c | 237
hw/
For consistency with other I/O functions, and in preparation to
implement them using generated_co_wrapper.
Signed-off-by: Alberto Faria
---
block/block-backend.c | 6 +++---
include/sysemu/block-backend-io.h | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/b
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
MAINTAINERS
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
MAINTAINERS | 1 +
configs/targets/loongarch64-softmmu.mak | 1 +
gdb-xml/loongarch-base64.xml| 44 ++
gdb-xml/loongarch-fpu64.xml | 57 +
Also convert blk_pwrite_compressed() into a generated_co_wrapper.
Signed-off-by: Alberto Faria
---
block/block-backend.c | 8
include/sysemu/block-backend-io.h | 7 +--
tests/unit/test-block-iothread.c | 18 ++
3 files changed, 27 insertions(+), 6 dele
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/disas.c | 3 ++
target/loongarch/helper.h | 2 ++
target/loongarch/insn_trans/trans_extra.c.inc | 33 +
Swap 'buf' and 'bytes' around for consistency with
blk_co_{pread,pwrite}(), and in preparation to implement these functions
using generated_co_wrapper.
Callers were updated using this Coccinelle script:
@@ expression blk, offset, buf, bytes, flags; @@
- blk_pread(blk, offset, buf, bytes,
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