From: eopXD
The tail elements in the destination mask register are updated under
a tail-agnostic policy.
Signed-off-by: eop Chen
Reviewed-by: Frank Chang
Reviewed-by: Weiwei Li
---
target/riscv/insn_trans/trans_rvv.c.inc | 6 +
target/riscv/vector_helper.c| 30 ++
From: eopXD
Signed-off-by: eop Chen
Reviewed-by: Frank Chang
Reviewed-by: Weiwei Li
---
target/riscv/vector_helper.c | 20
1 file changed, 20 insertions(+)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 21e20d47e5..e0fd0e62b3 100644
--- a/
From: eopXD
`vmadc` and `vmsbc` produces a mask value, they always operate with
a tail agnostic policy.
Signed-off-by: eop Chen
Reviewed-by: Frank Chang
Reviewed-by: Weiwei Li
---
target/riscv/insn_trans/trans_rvv.c.inc | 29 +++
target/riscv/internals.h| 5 +-
target/risc
The following changes since commit cf6f26d6f9b2015ee12b4604b79359e76784163a:
Merge tag 'kraxel-20220427-pull-request' of git://git.kraxel.org/qemu into
staging (2022-04-27 10:49:28 -0700)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you
From: eopXD
Signed-off-by: eop Chen
Reviewed-by: Frank Chang
Reviewed-by: Weiwei Li
---
target/riscv/insn_trans/trans_rvv.c.inc | 22 ++
target/riscv/vector_helper.c| 40 +
2 files changed, 62 insertions(+)
diff --git a/target/riscv/insn_trans/
From: eopXD
No functional change intended in this commit.
Signed-off-by: eop Chen
Reviewed-by: Frank Chang
Reviewed-by: Weiwei Li
Reviewed-by: Alistair Francis
---
target/riscv/vector_helper.c | 1132 +-
1 file changed, 565 insertions(+), 567 deletions(-)
di
The file has been removed in commit a8260d3876 ("ui: install logo icons to
$prefix/share/icons", 2019-01-21), do not try to symlink it in the build tree.
Reviewed-by: Marc-André Lureau
Reviewed-by: Thomas Huth
Signed-off-by: Paolo Bonzini
---
configure | 1 -
1 file changed, 1 deletion(-)
dif
From: Michael Tokarev
Commit c87ea1163111917 "configure: add --without-default-feature"
changed fortify_source from "yes" to "$default_feature". But there's
no option to turn it on, we only turn it off for debug build. I think
this should always be initialized to "yes" in the first place.
Signe
There is no reason other than history (dating back to commit 1d728c3946,
"tests: add gcov
support", 2013-01-06) for this, remove this unnecessary conditional.
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
dif
On 4/27/22 19:00, Víctor Colombo wrote:
Hello everyone! Thanks Zoltan and Richard for your kind reviews!
On 26/04/2022 18:29, Richard Henderson wrote:
On 4/22/22 11:54, Víctor Colombo wrote:
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
---
hw/ppc/pegasos2.c | 2 +-
Like -set and -readconfig, it would not really be too hard to
extend -writeconfig to parsing mechanisms other than QemuOpts.
However, the uses of -writeconfig are substantially more
limited, as it is generally easier to write the configuration
by hand in the first place. In addition, -writeconfig
The actual set of compiler flags can grow beyond what is found by the configure
script, for example if gprof is used. Show the full set in the summary.
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
meson.build | 8
1 file changed, 4 insertions(+), 4 deletions(-)
dif
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 40 ---
meson.build | 16 +-
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh | 3 +++
ui/meson.build
From: Haiyue Wang
The 'g_get_real_time' returns the number of microseconds since January
1, 1970 UTC, but 'g_date_time_new_from_unix_utc' needs the number of
seconds, so it will cause the invalid time input:
(process:279642): GLib-CRITICAL (recursed) **: g_date_time_format: assertion
'datetime
$debug_info is not needed anywhere except in the final meson invocation,
no need to special case it.
Reviewed-by: Marc-André Lureau
Reviewed-by: Thomas Huth
Signed-off-by: Paolo Bonzini
---
configure | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/configure b
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 115 -
contrib/rdmacm-mux/meson.build | 4 +-
meson.build| 56 ++--
meson_options.txt | 4 ++
migration/meson.build
From: Paul Brook
The abs1 function in ops_sse.h only works sorrectly when the result fits
in a signed int. This is fine most of the time because we're only dealing
with byte sized values.
However pcmp_elen helper function uses abs1 to calculate the absolute value
of a cpu register. This incorrec
tcg_interpreter is never written, it is purely a meson option;
trace_backends is never read.
And SeaBIOS is only build from the source tree with roms/Makefile,
so the config.mak file is unused.
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 24 -
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 44 ---
crypto/meson.build| 4 +++-
meson.build | 15 +++-
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh |
The .wxs file uses $(var.Mingw_bin) while configure/meson have always
used Mingw_dlls. Fix them to match what was probably intended.
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 4 ++--
qga/meson.build | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-
From: Thomas Huth
There is no need to present the user with -enable-kvm if there
is no support for KVM on the corresponding target.
Signed-off-by: Thomas Huth
Message-Id: <20220427134906.348118-1-th...@redhat.com>
Signed-off-by: Paolo Bonzini
---
qemu-options.hx | 4 +++-
1 file changed, 3 in
CONFIG_XEN_PCI_PASSTHROUGH is just a global configuration option;
it is never used in the source files, so there is no need to put
CONFIG_XEN_PCI_PASSTHROUGH in config-target.h or even in config-host.h.
This inaccuracy was copied over from the configure script in commit
8a19980e3f ("configure: mov
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 14 --
meson.build | 7 ++-
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh | 4
4 files changed, 12 insertions(+), 15 deletions(-)
diff
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 28
meson.build | 13 +
2 files changed, 13 insertions(+), 28 deletions(-)
diff --git a/configure b/configure
index 313579019d..d527a9c22e 100755
--- a/configure
+++ b/configur
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
backends/meson.build | 2 +-
configure | 58 ---
meson.build | 32 ---
meson_options.txt | 2 ++
scripts/meson-buildoptions
On 4/28/22 16:25, Cédric Le Goater wrote:
On 4/28/22 07:32, Alexey Kardashevskiy wrote:
On 4/27/22 17:36, Cédric Le Goater wrote:
Hello Alexey,
On 4/27/22 06:36, Alexey Kardashevskiy wrote:
VFIO-PCI has an "KVM_IRQFD_FLAG_RESAMPLE" optimization for INTx EOI
handling when KVM can unmask P
On 4/28/22 09:26, Alexey Kardashevskiy wrote:
On 4/28/22 16:25, Cédric Le Goater wrote:
On 4/28/22 07:32, Alexey Kardashevskiy wrote:
On 4/27/22 17:36, Cédric Le Goater wrote:
Hello Alexey,
On 4/27/22 06:36, Alexey Kardashevskiy wrote:
VFIO-PCI has an "KVM_IRQFD_FLAG_RESAMPLE" optimizati
On 4/27/22 13:15, Jean-Philippe Brucker wrote:
> Make the translation error message prettier by adding a missing space
> before the parenthesis.
>
> Signed-off-by: Jean-Philippe Brucker
Reviewed-by: Eric Auger
Eric
> ---
> hw/arm/smmuv3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(
On 27/04/2022 03:01, Richard Henderson wrote:
On 4/25/22 02:10, Xiaojuan Yang wrote:
+static void loongarch_msi_mem_write(void *opaque, hwaddr addr,
+ uint64_t val, unsigned size)
+{
+ LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(opaque);
+ int irq_num = val &
Hi Jean,
On 4/27/22 13:15, Jean-Philippe Brucker wrote:
> The Record bit in the Context Descriptor tells the SMMU to report fault
> events to the event queue. Since we don't cache the Record bit at the
> moment, access faults from a cached Context Descriptor are never
> reported. Store the Record
On 26/04/2022 17:24, Cédric Le Goater wrote:
I would be interested to know if you can start an emulated QEMU PowerNV
system (2cpus) with a KVM guest (1 vcpu) and sustain some network load
host<->guest with a ping -f for instance.
We're not there yet unfortunately. It runs for a while until
On 25/04/2022 10:10, Xiaojuan Yang wrote:
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 1 +
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 434 +
On 25/04/2022 10:10, Xiaojuan Yang wrote:
This patch realize PCH-MSI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
hw/intc/Kconfig | 5 ++
hw/intc/loongarch_pch_msi.c | 75
Hi Peter,
On 4/26/22 18:04, Peter Maydell wrote:
> The Arm SMMUv3 includes an optional feature equivalent to the CPU
> FEAT_BBM, which permits an OS to switch a range of memory between
> "covered by a huge page" and "covered by a sequence of normal pages"
> without having to engage in the traditio
On Fri, Apr 22, 2022 at 11:00 AM Bin Meng wrote:
>
> +Richard
>
> On Wed, Apr 20, 2022 at 4:16 PM Bin Meng wrote:
> >
> > On Tue, Apr 12, 2022 at 9:11 AM Bin Meng wrote:
> > >
> > > On Thu, Mar 24, 2022 at 9:48 PM Bin Meng wrote:
> > > >
> > > > From: Bin Meng
> > > >
> > > > Sync uboot_image.
Hi,
Apologies for missing the references. Should I send an updated patch for
the same?
Regards,
Kshitij Suri
On 26/04/22 11:05 pm, Richard Henderson wrote:
y detected if VNC is enabled currently. This patch adds a
generalised png option in the meson build which is aimed to replace
use of
Hello,
On 4/27/22 20:29, Leif Lindholm wrote:
The sbsa-ref machine is continuously evolving. Some of the changes we
want to make in the near future, to align with real components (e.g.
the GIC-700), will break compatibility for existing firmware.
Introduce two new properties to the DT generated
Any feedback ?
--
Thanks,
On 4/22/22 16:28, Damien Hedde wrote:
Document the 3 life cycles cases that can happen with devices.
Signed-off-by: Damien Hedde
---
Hi all,
It's been a few weeks I wanted to propose this in order to sort
out what should be done to make a 'user-creatable' device.
Hi
On Thu, Apr 28, 2022 at 4:15 AM Lei He wrote:
>
> g_get_real_time() returns the number of MICROSECONDS since
> January 1, 1970 UTC, but g_date_time_new_from_unix_utc() expects
> a timestamp in SECONDS.
>
> Directly call g_data_time_new_from_unix_utc(g_get_real_time()) causes
> overflow and a N
On Wed, Apr 27, 2022 at 11:12:34PM +0300, Nir Soffer wrote:
> I tested patches 1 and 2 on top of 34723f59371f3fd02ea59b94674314b875504426
> and it solved the issue.
>
> Tested-by: Nir Soffer
Thank you!
Stefan
signature.asc
Description: PGP signature
Fine, just ignore this patch.
> On Apr 28, 2022, at 4:58 PM, Marc-André Lureau
> wrote:
>
> Hi
>
> On Thu, Apr 28, 2022 at 4:15 AM Lei He wrote:
>>
>> g_get_real_time() returns the number of MICROSECONDS since
>> January 1, 1970 UTC, but g_date_time_new_from_unix_utc() expects
>> a timestamp
On Wed, Apr 27, 2022 at 10:47:58PM +0300, Michael Tokarev wrote:
> 27.04.2022 17:35, Stefan Hajnoczi wrote:
> > Commit f34e8d8b8d48d73f36a67b6d5e492ef9784b5012 ("virtio-scsi: prepare
> > virtio_scsi_handle_cmd for dataplane") prepared the virtio-scsi cmd
> > virtqueue handler function to by used in
On Wed, 27 Apr 2022 at 23:27, Stafford Horne wrote:
> Yes, this is what was brought up before. At that time semihosting was
> mentioned
> and I tried to understand what it was but didn't really understand it as a
> general
> concept. Is this something arm specific?
QEMU uses "semihosting" for
On Thu, 28 Apr 2022 at 09:37, Eric Auger wrote:
> On 4/26/22 18:04, Peter Maydell wrote:
> > TLB invalidation correctly removes all TLB entries matching
> > the specified address or address range (unless the guest specifies the
> > leaf level explicitly, in which case it gets what it asked for).
On Wed, Apr 27, 2022 at 12:02:27PM +0100, Alex Bennée wrote:
>
> Daniel P. Berrangé writes:
>
> > On Mon, Apr 25, 2022 at 01:53:28PM +0100, Alex Bennée wrote:
> >>
> >> Stefan Hajnoczi writes:
> >>
> >> > [[PGP Signed Part:Undecided]]
> >> > Hi,
> >> > QEMU needs to enroll in GitLab for Open
On Tue, 26 Apr 2022 at 17:33, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 12
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 10 ++
> 1 file changed, 2 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 11 ++-
> 1 file changed, 2 insertions(+), 9 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:40, Richard Henderson
wrote:
>
> Note that tmp was doing double-duty as zero
> and then later as a temporary in its own right.
> Split the use of 0 to a new variable 'zero'.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 26 +--
On Tue, 26 Apr 2022 at 17:32, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:37, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 13 +++--
> 1 file changed, 3 insertions(+), 10 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:41, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:38, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:37, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 31 +--
> 1 file changed, 9 insertions(+), 22 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
From: Richard Henderson
Fixes: 0e0a5b49ad58 ("s390x/tcg: Implement VECTOR STORE WITH LENGTH")
Signed-off-by: Richard Henderson
Reviewed-by: David Miller
Reviewed-by: David Hildenbrand
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/tcg/vec_helper.c | 2 --
1 file ch
We don't include the "msa5" feature in the "qemu" model because it
generates a warning. The PoP states:
"The message-security-assist extension 5 requires
the secure-hash-algorithm (SHA-512) capabilities of
the message-security-assist extension 2 as a prereq-
uisite. (March, 2015)"
As SHA-512 won'
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> We need to encode just the address bytes, not the whole struct sockaddr
> data. Add a test case to validate that we're matching on SAN IP
> addresses correctly.
Lets see:
> Signed-off-by: Daniel P. Berrangé
> ---
> tests/unit/crypto-tls-x509-he
From: Richard Henderson
Swap half-words (16-bit) and words (32-bit) within a larger value.
Mirrors functions of the same names within include/qemu/bitops.h.
Signed-off-by: Richard Henderson
Reviewed-by: David Miller
Reviewed-by: David Hildenbrand
Signed-off-by: David Hildenbrand
---
include
From: David Miller
Signed-off-by: David Miller
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 4 +++
target/s390x/tcg/translate_vx.c.inc | 44 ++---
ta
On Tue, 26 Apr 2022 at 17:44, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
Implement Vector-Enhancements Facility 2 for s390x
resolves: https://gitlab.com/qemu-project/qemu/-/issues/738
implements:
VECTOR LOAD ELEMENTS REVERSED (VLER)
VECTOR LOAD BYTE REVERSED ELEMENTS (VLBR)
VECTOR LOAD BYTE REVERSED ELEMENT (VLEBRH, VLEBRF,
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/tcg/insn-data.def | 6 +++-
target/s390x/tcg/translate_vx.c.inc | 55 +
2 files changed, 53 insertions(+)
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h| 6 ++
target/s390x/tcg/insn-data.def | 2 +
target/s390x/tcg/translate.c
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 3 ++
target/s390x/tcg/insn-data.def | 12 ++---
target/s390x/tcg/translate_
Before we were able to bump up the qemu CPU model to a z13, we included
some experimental features during development in the "max" model only.
Nowadays, the "max" model corresponds exactly to the "qemu" CPU model
of the latest QEMU machine under TCG.
Let's remove all the special casing, effectivel
On Mon, Apr 25, 2022 at 05:30:19PM +, Jag Raman wrote:
>
>
> > On Apr 25, 2022, at 5:38 AM, Stefan Hajnoczi wrote:
> >
> > On Wed, Apr 20, 2022 at 11:15:16AM +, Jag Raman wrote:
> >>
> >>
> >>> On Apr 19, 2022, at 4:45 PM, Jag Raman wrote:
> >>>
> >>> Assign separate address space f
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
[ dh: take care of compat machines ]
Signed-off-by: David Hildenbrand
---
hw/s390x/s390-virtio-ccw.c | 3 +++
target/s390x/gen-features.c | 7 ++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/tcg/insn-data.def | 4 ++
target/s390x/tcg/translate_vx.c.inc | 84 +
2 f
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/tcg/insn-data.def | 4 +
target/s390x/tcg/translate_vx.c.inc | 113
2 f
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
tests/tcg/s390x/Makefile.target | 8 ++
tests/tcg/s390x/vx.h| 19 +
tests/tcg/s390x/vxeh2_vcvt.c| 88
tests
From: David Miller
Signed-off-by: David Miller
Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
Tested-by: Thomas Huth
Signed-off-by: David Hildenbrand
---
target/s390x/tcg/insn-data.def | 12
target/s390x/tcg/translate_vx.c.inc | 85 +
2
On Tue, 26 Apr 2022 at 17:37, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 12
> 1 file changed, 4 insertions(+), 8 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On 4/27/22 19:16, Dr. David Alan Gilbert wrote:
* Paolo Bonzini (pbonz...@redhat.com) wrote:
On 4/27/22 17:16, Dr. David Alan Gilbert wrote:
* Paolo Bonzini (pbonz...@redhat.com) wrote:
On 4/27/22 14:34, Dr. David Alan Gilbert wrote:
If I specify a 'vm' it's not obvious to me whether I'd get
On Tue, 26 Apr 2022 at 17:40, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:44, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 21 +
> 1 file changed, 5 insertions(+), 16 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Mon, Apr 25, 2022 at 05:40:01PM +, Jag Raman wrote:
> > On Apr 25, 2022, at 6:27 AM, Stefan Hajnoczi wrote:
> >
> > On Tue, Apr 19, 2022 at 04:44:20PM -0400, Jagannathan Raman wrote:
> >> +static MSIMessage vfu_object_msi_prepare_msg(PCIDevice *pci_dev,
> >> +
On Tue, 26 Apr 2022 at 17:40, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 24 +++-
> 1 file changed, 7 insertions(+), 17 deletions(-)
> @@ -6052,7 +6049,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t
> insn)
On Tue, 26 Apr 2022 at 17:34, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On 4/28/22 11:26, Peter Maydell wrote:
> On Thu, 28 Apr 2022 at 09:37, Eric Auger wrote:
>> On 4/26/22 18:04, Peter Maydell wrote:
>>> TLB invalidation correctly removes all TLB entries matching
>>> the specified address or address range (unless the guest specifies the
>>> leaf level explicitl
On Tue, 26 Apr 2022 at 17:46, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 25 ++---
> 1 file changed, 10 insertions(+), 15 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:48, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 7 ++-
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:46, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:47, Richard Henderson
wrote:
>
> Finish conversion of the file to tcg_constant_*.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 20
> 1 file changed, 8 insertions(+), 12 deletions(-)
Reviewed-by: Peter Maydell
thanks
-
On Tue, 26 Apr 2022 at 18:05, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 11 +++
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:43, Richard Henderson
wrote:
>
> Existing temp usage treats t1 as both zero and as a
> temporary. Rearrange to only require one temporary,
> so remove t1 and rename t2.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 12 +---
> 1 file
On Tue, 26 Apr 2022 at 17:49, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 40 ++
> 1 file changed, 10 insertions(+), 30 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:57, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 22 +-
> 1 file changed, 9 insertions(+), 13 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
The QEMU-provided FDT was only being recognized by the kernel when it
was used in conjunction with -initrd. Without it, the magic bytes
wouldn't be there and the kernel couldn't load it. This patch fixes the
issue by page aligning the provided FDT.
Cc: Stafford Horne
Cc: Peter Maydell
Signed-off
On Tue, 26 Apr 2022 at 17:43, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 26 ++
> 1 file changed, 6 insertions(+), 20 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:50, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:52, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 11 +--
> 1 file changed, 5 insertions(+), 6 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 18:07, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:43, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 8 ++--
> 1 file changed, 2 insertions(+), 6 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:49, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, Apr 26, 2022 at 04:51:06AM -0400, Emanuele Giuseppe Esposito wrote:
> Next step is the most complex one: figure where to put the rdlocks.
I got a little lost at this step but will hopefully understand more when
reading the patches. Earlier it said there is a counter for readers, so
it seem
On Tue, 26 Apr 2022 at 17:56, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 18:05, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 18:00, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 43 +-
> 1 file changed, 13 insertions(+), 30 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 17:46, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Tue, 26 Apr 2022 at 18:04, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-sve.c | 13 -
> 1 file changed, 4 insertions(+), 9 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
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