Re: [PATCH 4/5] hw/nvme: do not auto-generate uuid

On Apr 20 08:53, Christoph Hellwig wrote: > On Wed, Apr 20, 2022 at 07:51:32AM +0200, Klaus Jensen wrote: > > > So unlike the EUI, UUIDs are designed to be autogenerated even if the > > > current algorithm is completely broken. We'd just need to persist them. > > > Note that NVMe at least in theor

Re: [PATCH] docs/ccid: convert to restructuredText

On 05/04/2022 17.37, Damien Hedde wrote: On 4/5/22 16:29, oxr...@gmx.us wrote: From: Lucas Ramage Buglink: https://gitlab.com/qemu-project/qemu/-/issues/527 Signed-off-by: Lucas Ramage Provided 2 minors tweaks (see below: missing empty line, and empty line at EOF), Reviewed-by: Damien H

Re: [PATCH v4 2/7] target/riscv: machine: Add debug state description

On Tue, Mar 15, 2022 at 5:17 PM Bin Meng wrote: > > From: Bin Meng > > Add a subsection to machine.c to migrate debug CSR state. > > Signed-off-by: Bin Meng > Reviewed-by: Alistair Francis > --- > > (no changes since v2) > > Changes in v2: > - new patch: add debug state description > > target/

Re: [PATCH] hw/riscv: boot: Support 64bit fdt address.

On Tue, Apr 19, 2022 at 10:03 PM Dylan Jhong wrote: > > The current riscv_load_fdt() forces fdt_load_addr to be placed at a dram > address within 3GB, > but not all platforms have dram_base within 3GB. > > This patch adds an exception for dram base not within 3GB, > which will place fdt at dram_e

Re: [PATCH v4 2/7] target/riscv: machine: Add debug state description

On Wed, Apr 20, 2022 at 3:31 PM Alistair Francis wrote: > > On Tue, Mar 15, 2022 at 5:17 PM Bin Meng wrote: > > > > From: Bin Meng > > > > Add a subsection to machine.c to migrate debug CSR state. > > > > Signed-off-by: Bin Meng > > Reviewed-by: Alistair Francis > > --- > > > > (no changes sin

Re: [PATCH v3 3/4] hw/intc: Make RISC-V ACLINT mtime MMIO register writable

On Tue, Apr 19, 2022 at 7:10 PM wrote: > > From: Frank Chang > > RISC-V privilege spec defines that mtime is exposed as a memory-mapped > machine-mode read-write register. However, as QEMU uses host monotonic > timer as timer source, this makes mtime to be read-only in RISC-V > ACLINT. > > This p

Re: [PATCH v3 4/4] hw/intc: riscv_aclint: Add reset function of ACLINT devices

On Tue, Apr 19, 2022 at 7:29 PM wrote: > > From: Jim Shu > > This commit implements reset function of all ACLINT devices. > ACLINT device reset will clear MTIME and MSIP register to 0. > > Depend on RISC-V ACLINT spec v1.0-rc4: > https://github.com/riscv/riscv-aclint/blob/v1.0-rc4/riscv-aclint.ad

Re: [PATCH] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values

On Tue, Apr 19, 2022 at 5:04 PM Frank Chang wrote: > > On Tue, Apr 19, 2022 at 2:00 PM Frank Chang wrote: >> >> On Tue, Apr 19, 2022 at 1:27 PM Anup Patel wrote: >>> >>> On Tue, Apr 19, 2022 at 10:52 AM Alistair Francis >>> wrote: >>> > >>> > On Fri, Apr 15, 2022 at 7:37 PM wrote: >>> > > >>>

Re: [PATCH] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values

On Fri, Apr 15, 2022 at 7:37 PM wrote: > > From: Frank Chang > > Allow user to set core's marchid, mvendorid, mipid CSRs through > -cpu command line option. > > Signed-off-by: Frank Chang > Reviewed-by: Jim Shu Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.c | 4 >

Re: [PATCH v3 3/4] hw/intc: Make RISC-V ACLINT mtime MMIO register writable

On Wed, Apr 20, 2022 at 3:42 PM Alistair Francis wrote: > On Tue, Apr 19, 2022 at 7:10 PM wrote: > > > > From: Frank Chang > > > > RISC-V privilege spec defines that mtime is exposed as a memory-mapped > > machine-mode read-write register. However, as QEMU uses host monotonic > > timer as timer

Re: [PATCH] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values

On Wed, Apr 20, 2022 at 3:47 PM Alistair Francis wrote: > On Tue, Apr 19, 2022 at 5:04 PM Frank Chang > wrote: > > > > On Tue, Apr 19, 2022 at 2:00 PM Frank Chang > wrote: > >> > >> On Tue, Apr 19, 2022 at 1:27 PM Anup Patel > wrote: > >>> > >>> On Tue, Apr 19, 2022 at 10:52 AM Alistair Franci

Re: [PATCH 31/32] RFC: Simplify softmmu/main.c

Hi On Thu, Mar 24, 2022 at 11:52 AM Paolo Bonzini wrote: > On 3/23/22 16:57, marcandre.lur...@redhat.com wrote: > > From: Marc-André Lureau > > > > Move qemu_main() declaration to a new header. > > > > Simplify main.c since both cocoa & sdl cannot be enabled together. > > > > (there might be som

[PATCH v4 0/4] Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses

From: Frank Chang This patchset makes ACLINT mtime to be writable as RISC-V privilege spec defines that mtime is exposed as a memory-mapped machine-mode read-write register. Also, mtimecmp and mtime should be 32/64-bit memory accessible registers. ACLINT reset function is also added, which requir

[PATCH v4 1/4] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT

From: Frank Chang If device's MemoryRegion doesn't have .impl.[min|max]_access_size declaration, the default access_size_min would be 1 byte and access_size_max would be 4 bytes (see: softmmu/memory.c). This will cause a 64-bit memory access to ACLINT to be splitted into two 32-bit memory accesse

[PATCH v4 2/4] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT

From: Frank Chang RISC-V privilege spec defines that: * In RV32, memory-mapped writes to mtimecmp modify only one 32-bit part of the register. * For RV64, naturally aligned 64-bit memory accesses to the mtime and mtimecmp registers are additionally supported and are atomic. It's possible to

Re: [PATCH v2 1/2] hw/core: Sync uboot_image.h from U-Boot v2022.01

On Tue, Apr 12, 2022 at 9:11 AM Bin Meng wrote: > > On Thu, Mar 24, 2022 at 9:48 PM Bin Meng wrote: > > > > From: Bin Meng > > > > Sync uboot_image.h from upstream U-Boot v2022.01 release [1]. > > > > [1] https://source.denx.de/u-boot/u-boot/-/blob/v2022.01/include/image.h > > > > Signed-off-by:

[PATCH] target/ppc: Fix BookE debug interrupt generation

From: Bin Meng Per PowerISA v2.07 [1], Book III-E, chapter 7.6 "Interrupt definitions" "When in Internal Debug Mode with MSR.DE=0, then Instruction Complete and Branch Taken debug events cannot occur, and no DBSR status bits are set and no subsequent imprecise Debug interrupt will occur." Curre

[PATCH v4 4/4] hw/intc: riscv_aclint: Add reset function of ACLINT devices

From: Jim Shu This commit implements reset function of all ACLINT devices. ACLINT device reset will clear MTIME and MSIP register to 0. Depend on RISC-V ACLINT spec v1.0-rc4: https://github.com/riscv/riscv-aclint/blob/v1.0-rc4/riscv-aclint.adoc Signed-off-by: Jim Shu Reviewed-by: Frank Chang

[PATCH v4 3/4] hw/intc: Make RISC-V ACLINT mtime MMIO register writable

From: Frank Chang RISC-V privilege spec defines that mtime is exposed as a memory-mapped machine-mode read-write register. However, as QEMU uses host monotonic timer as timer source, this makes mtime to be read-only in RISC-V ACLINT. This patch makes mtime to be writable by recording the time de

Re: [PATCH 1/2] python/machine.py: upgrade vm.command() method

On Tue, Apr 19, 2022 at 01:08:06PM -0400, John Snow wrote: > On Tue, Apr 19, 2022, 12:42 PM Daniel P. Berrangé > wrote: > > > On Fri, Apr 08, 2022 at 08:02:13PM +0300, Vladimir Sementsov-Ogievskiy > > wrote: > > > The method is not popular, we prefer use vm.qmp() and then check > > > success by h

Re: [PATCH v5 4/4] hw/acpi/aml-build: Use existing CPU topology to build PPTT table

On Wed, 20 Apr 2022 13:19:34 +0800 Gavin Shan wrote: > Hi Igor, > > On 4/19/22 4:54 PM, Igor Mammedov wrote: > > On Thu, 14 Apr 2022 08:33:29 +0800 > > Gavin Shan wrote: > >> On 4/13/22 9:52 PM, Igor Mammedov wrote: > >>> On Sun, 3 Apr 2022 22:59:53 +0800 > >>> Gavin Shan wrote: > >>>

Re: [PATCH] hw/i386/e820: remove legacy reserved entries for e820

On Wed, Apr 20, 2022 at 10:09:04AM +0530, Ani Sinha wrote: > e820 reserved entries were used before the dynamic entries with fw config > files > were intoduced. Please see the following change: > 7d67110f2d9a6("pc: add etc/e820 fw_cfg file") > > Identical support was introduced into seabios as we

Re: [PATCH] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values

On Tue, Apr 19, 2022 at 2:00 PM Frank Chang wrote: > On Tue, Apr 19, 2022 at 1:27 PM Anup Patel > wrote: > >> On Tue, Apr 19, 2022 at 10:52 AM Alistair Francis >> wrote: >> > >> > On Fri, Apr 15, 2022 at 7:37 PM wrote: >> > > >> > > From: Frank Chang >> > > >> > > Allow user to set core's mar

Re: [PATCH v6 2/4] hw/arm/virt: Consider SMP configuration in CPU topology

On Mon, 18 Apr 2022 10:09:18 +0800 Gavin Shan wrote: > Currently, the SMP configuration isn't considered when the CPU > topology is populated. In this case, it's impossible to provide > the default CPU-to-NUMA mapping or association based on the socket > ID of the given CPU. > > This takes accou

Re: [PATCH 1/5] 9pfs: fix qemu_mknodat(S_IFREG) on macOS

On Wed, 20 Apr 2022 11:03:52 +0900 Akihiko Odaki wrote: > On 2022/04/19 20:40, Christian Schoenebeck wrote: > > mknod() on macOS does not support creating regular files, so > > divert to openat_file() if S_IFREG is passed with mode argument. > > > > Furthermore, 'man 2 mknodat' on Linux says: "Z

[PATCH] hw/nvme: add new command abort case

NVMe command set specification for end-to-end data protection formatted namespace states: o If the Reference Tag Check bit of the PRCHK field is set to ‘1’ and the namespace is formatted for Type 3 protection, then the controller: ▪ should not compare the protection Infor

Re: [PATCH] Only advertise aio=io_uring if support is actually available

On Tue, Apr 19, 2022 at 07:19:31PM +0200, Dirk Müller wrote: > This allows $qemu --help runtime configure checks for detecting > the host support. Note: detecting features by parsing --help output is something that is explicitly a non-goal for QEMU. The only supported interface for detecting featu

Re: [PATCH] hw/i386/e820: remove legacy reserved entries for e820

On Wed, Apr 20, 2022 at 1:57 PM Gerd Hoffmann wrote: > > On Wed, Apr 20, 2022 at 10:09:04AM +0530, Ani Sinha wrote: > > e820 reserved entries were used before the dynamic entries with fw config > > files > > were intoduced. Please see the following change: > > 7d67110f2d9a6("pc: add etc/e820 fw_c

[PATCH 1/2] hw/nvme: refactor check of disabled dif

Move to a separate function code determining whether protection checking in end-to-end data protection enabled namespace should be done. Currently this code is used only in nvme_dif_prchk_crc16 and nvme_dif_prchk_crc64 functions. Signed-off-by: Dmitry Tikhov --- hw/nvme/dif.c| 121 ++

[PATCH 2/2] hw/nvme: fix copy cmd for pi enabled namespaces

Current implementation have two problems: First in the read part of copy command. Because there is no metadata mangling before nvme_dif_check invocation, reftag error is thrown for blocks of namespace that have not been previously written to. Second in the write part. Reftag in the protection infor

[PATCH 0/2] Fix nvme copy command with pi metadata

Current implementation of copy command, for namespace with end-to-end data protection enabled, always returns data integrity field check errors. For example, issuing with nvme-cli: nvme copy --sdlba=25 --blocks=2,1,3 --slbs=1,37,50 --prinfow=5 --prinfor=5 --ref-tag=25 --expected-ref-tags=1

Re: [PATCH 2/5] 9pfs: fix qemu_mknodat(S_IFSOCK) on macOS

On Tue, 19 Apr 2022 13:41:03 +0200 Christian Schoenebeck wrote: > mknod() on macOS does not support creating sockets, so divert to > call sequence socket(), bind() and chmod() respectively if S_IFSOCK > was passed with mode argument. > Hmm... thinking again about this one : QEMU on linux calls

Re: [PATCH 1/5] 9pfs: fix qemu_mknodat(S_IFREG) on macOS

On Mittwoch, 20. April 2022 10:40:05 CEST Greg Kurz wrote: > On Wed, 20 Apr 2022 11:03:52 +0900 > > Akihiko Odaki wrote: > > On 2022/04/19 20:40, Christian Schoenebeck wrote: > > > mknod() on macOS does not support creating regular files, so > > > divert to openat_file() if S_IFREG is passed with

Re: [PATCH v5 2/2] Added parameter to take screenshot with screendump as PNG

* Kshitij Suri (kshitij.s...@nutanix.com) wrote: > Currently screendump only supports PPM format, which is un-compressed. Added > a "format" parameter to QMP and HMP screendump command to support PNG image > capture using libpng. > > QMP example usage: > { "execute": "screendump", "arguments": { "

Re: [PATCH v4 3/3] tests/qtest: Add test for Aspeed HACE accumulative mode

On 31/03/2022 09.48, Steven Lee wrote: This add two addition test cases for accumulative mode under sg enabled. The input vector was manually craft with "abc" + bit 1 + padding zeros + L. The padding length depends on algorithm, i.e. SHA512 (1024 bit), SHA256 (512 bit). The result was calculate

Re: [PATCH v4 2/7] target/riscv: machine: Add debug state description

Hi Alistair, On Wed, Apr 20, 2022 at 3:33 PM Bin Meng wrote: > > On Wed, Apr 20, 2022 at 3:31 PM Alistair Francis wrote: > > > > On Tue, Mar 15, 2022 at 5:17 PM Bin Meng wrote: > > > > > > From: Bin Meng > > > > > > Add a subsection to machine.c to migrate debug CSR state. > > > > > > Signed-o

[PATCH v2] target/riscv: Support configuarable marchid, mvendorid, mipid CSR values

From: Frank Chang Allow user to set core's marchid, mvendorid, mipid CSRs through -cpu command line option. The default values of marchid and mipid are built with QEMU's version numbers. Signed-off-by: Frank Chang Reviewed-by: Jim Shu Reviewed-by: Alistair Francis --- target/riscv/cpu.c |

Re: [PATCH 2/2] hw/nvme: fix copy cmd for pi enabled namespaces

On Apr 20 12:03, Dmitry Tikhov wrote: > Current implementation have two problems: > First in the read part of copy command. Because there is no metadata > mangling before nvme_dif_check invocation, reftag error is thrown for > blocks of namespace that have not been previously written to. Yes, this

Re: [PATCH] hw/nvme: add new command abort case

On Apr 20 11:20, Dmitry Tikhov wrote: > NVMe command set specification for end-to-end data protection formatted > namespace states: > > o If the Reference Tag Check bit of the PRCHK field is set to ‘1’ and > the namespace is formatted for Type 3 protection, then the > controller: >

Re: [RFC PATCH for-7.1] Remove the slirp submodule (and only compile with an external libslirp)

On 19/04/2022 18.24, Daniel P. Berrangé wrote: On Mon, Apr 11, 2022 at 08:55:19AM +0200, Thomas Huth wrote: On 11/04/2022 01.50, Brad Smith wrote: On 4/10/2022 5:06 AM, Peter Maydell wrote: On Sun, 10 Apr 2022 at 05:51, Brad Smith wrote: On 4/8/2022 12:47 PM, Thomas Huth wrote: QEMU 7.1 won

Re: [PATCH v5 4/4] hw/acpi/aml-build: Use existing CPU topology to build PPTT table

Hi Igor, On 4/20/22 4:10 PM, Igor Mammedov wrote: On Wed, 20 Apr 2022 13:19:34 +0800 Gavin Shan wrote: On 4/19/22 4:54 PM, Igor Mammedov wrote: On Thu, 14 Apr 2022 08:33:29 +0800 Gavin Shan wrote: On 4/13/22 9:52 PM, Igor Mammedov wrote: On Sun, 3 Apr 2022 22:59:53 +0800 Gavin Shan wrote

Re: [PATCH 2/5] 9pfs: fix qemu_mknodat(S_IFSOCK) on macOS

On Mittwoch, 20. April 2022 11:09:46 CEST Greg Kurz wrote: > On Tue, 19 Apr 2022 13:41:03 +0200 > > Christian Schoenebeck wrote: > > mknod() on macOS does not support creating sockets, so divert to > > call sequence socket(), bind() and chmod() respectively if S_IFSOCK > > was passed with mode ar

Re: [PATCH v6 2/4] hw/arm/virt: Consider SMP configuration in CPU topology

Hi Igor, On 4/20/22 4:32 PM, Igor Mammedov wrote: On Mon, 18 Apr 2022 10:09:18 +0800 Gavin Shan wrote: Currently, the SMP configuration isn't considered when the CPU topology is populated. In this case, it's impossible to provide the default CPU-to-NUMA mapping or association based on the soc

[PULL 2/7] tests/qtest: Enable more tests for the "mipsel" target

Allow the same set of tests for all MIPS targets, so that "mipsel" now gets some additional test coverage, too. While we're at it, simplify the definitions for qtests_mips64 and qtests_mips64el. Message-Id: <20220414114655.604391-1-th...@redhat.com> Signed-off-by: Thomas Huth --- tests/qtest/end

[PULL 3/7] tests/qtest: Move the fuzz tests to x86 only

The fuzz tests are currently scheduled for all targets, but their setup code limits the run to "i386", so that these tests always show "SKIP" on other targets. Move it to the right x86 list in meson.build, then we can drop the architecture check during runtime, too. Message-Id: <20220414130127.719

Re: [PATCH v4 01/19] migration: Postpone releasing MigrationState.hostname

On Thu, Mar 31, 2022 at 11:08:39AM -0400, Peter Xu wrote: > We used to release it right after migrate_fd_connect(). That's not good > enough when there're more than one socket pair required, because it'll be > needed to establish TLS connection for the rest channels. > > One example is multifd, w

[PULL 1/7] tests: Drop perl-Test-Harness from the CI containers / VMs

The perl test harness is not necessary anymore since commit 3d2f73ef75 ("build: use "meson test" as the test harness"). Thus remove it from tests/lcitool/projects/qemu.yml, run "make lcitool-refresh" and manually clean the remaining docker / vm files that are not managed by lcitool yet. Message-Id

Re: [PATCH v4 02/19] migration: Drop multifd tls_hostname cache

On Thu, Mar 31, 2022 at 11:08:40AM -0400, Peter Xu wrote: > The hostname is cached N times, N equals to the multifd channels. > > Drop that cache because after previous patch we've got s->hostname > being alive for the whole lifecycle of migration procedure. > > Cc: Juan Quintela > Cc: Daniel P.

[PULL 0/7] Misc patches

The following changes since commit 1be5a765c08cee3a9587c8a8d3fc2ea247b13f9c: Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2022-04-19 18:22:16 -0700) are available in the Git repository at: https://gitlab.com/thuth/qemu.git tags/pull-request-2022-04-20 for you t

[PULL 4/7] tests/qtest: properly initialise the vring used idx

From: Alex Bennée Eric noticed while attempting to enable the vhost-user-blk-test for Aarch64 that that things didn't work unless he put in a dummy guest_malloc() at the start of the test. Without it qvirtio_wait_used_elem() would assert when it reads a junk value for idx resulting in: qvirtqu

Re: [PATCH v4 06/19] migration: Move channel setup out of postcopy_try_recover()

On Thu, Mar 31, 2022 at 11:08:44AM -0400, Peter Xu wrote: > We used to use postcopy_try_recover() to replace migration_incoming_setup() to > setup incoming channels. That's fine for the old world, but in the new world > there can be more than one channels that need setup. Better move the channel

[PULL 7/7] tests/avocado: Allow overwrite smp and memory size command line options

From: Ahmed Abouzied Removes the hard-coded values in setUp(). Class inheriting from avocado_qemu.LinuxTest can overwrite the default smp and memory instead. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/453 Signed-off-by: Ahmed Abouzied Message-Id: <2021080257.50946-1-em...@aabou

Re: [PATCH] hw/nvme: add new command abort case

On Apr 20 12:13, Klaus Jensen wrote: > On Apr 20 11:20, Dmitry Tikhov wrote: > > NVMe command set specification for end-to-end data protection formatted > > namespace states: > > > > o If the Reference Tag Check bit of the PRCHK field is set to ‘1’ and > > the namespace is formatted for

Re: [PATCH v4 03/19] migration: Add pss.postcopy_requested status

On Thu, Mar 31, 2022 at 11:08:41AM -0400, Peter Xu wrote: > This boolean flag shows whether the current page during migration is triggered > by postcopy or not. Then in ram_save_host_page() and deeper stack we'll be > able to have a reference on the priority of this page. > > Reviewed-by: Dr. Dav

[PULL 5/7] docs/ccid: convert to restructuredText

From: Lucas Ramage Buglink: https://gitlab.com/qemu-project/qemu/-/issues/527 Signed-off-by: Lucas Ramage Message-Id: <20220405142906.21382-1-oxr...@gmx.us> Reviewed-by: Damien Hedde [thuth: Added some cosmetic fixes] Signed-off-by: Thomas Huth --- docs/ccid.txt| 182 -

Re: [PATCH] tests/acceptance: Allow overwrite smp and memory

On 10/08/2021 19.30, Ahmed Abouzied wrote: ping Just pinging about this little patch. Patchew link here: https://patchew.org/QEMU/2021080257.50946-1-em...@aabouzied.com/ Sorry, seems like this completely fell through the cracks ... since nobody else picked this up yet, I've now put it i

[PULL 6/7] hw: Add compat machines for 7.1

From: Cornelia Huck Add 7.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck Message-Id: <20220316145521.1224083-1-coh...@redhat.com> Reviewed-by: Eric Farman Reviewed-by: Cédric Le Goater Acked-by: Laurent Vivier Reviewed-by: Eric Auger Reviewed-by: Yanan Wan

[PATCH v7 2/4] hw/arm/virt: Consider SMP configuration in CPU topology

Currently, the SMP configuration isn't considered when the CPU topology is populated. In this case, it's impossible to provide the default CPU-to-NUMA mapping or association based on the socket ID of the given CPU. This takes account of SMP configuration when the CPU topology is populated. The die

Re: [PATCH v4 04/19] migration: Move migrate_allow_multifd and helpers into migration.c

On Thu, Mar 31, 2022 at 11:08:42AM -0400, Peter Xu wrote: > This variable, along with its helpers, is used to detect whether multiple > channel will be supported for migration. In follow up patches, there'll be > other capability that requires multi-channels. Hence move it outside multifd > speci

Re: [PATCH v4 05/19] migration: Export ram_load_postcopy()

On Thu, Mar 31, 2022 at 11:08:43AM -0400, Peter Xu wrote: > Will be reused in postcopy fast load thread. > > Reviewed-by: Dr. David Alan Gilbert > Signed-off-by: Peter Xu > --- > migration/ram.c | 2 +- > migration/ram.h | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Dan

Re: [PATCH] hw/nvme: add new command abort case

On Wed, Apr 20, 2022 at 12:36:54, Klaus Jensen wrote: > On Apr 20 12:13, Klaus Jensen wrote: > > On Apr 20 11:20, Dmitry Tikhov wrote: > > > NVMe command set specification for end-to-end data protection formatted > > > namespace states: > > > > > > o If the Reference Tag Check bit of the PRCHK

Re: [PATCH v4 09/19] migration: Postcopy preemption preparation on channel creation

On Thu, Mar 31, 2022 at 11:08:47AM -0400, Peter Xu wrote: > Create a new socket for postcopy to be prepared to send postcopy requested > pages via this specific channel, so as to not get blocked by precopy pages. > > A new thread is also created on dest qemu to receive data from this new > channe

Re: [PATCH v4 08/19] migration: Add postcopy-preempt capability

On Thu, Mar 31, 2022 at 11:08:46AM -0400, Peter Xu wrote: > Firstly, postcopy already preempts precopy due to the fact that we do > unqueue_page() first before looking into dirty bits. > > However that's not enough, e.g., when there're host huge page enabled, when > sending a precopy huge page, a

Re: [PATCH v4 10/19] migration: Postcopy preemption enablement

On Thu, Mar 31, 2022 at 11:08:48AM -0400, Peter Xu wrote: > This patch enables postcopy-preempt feature. > > It contains two major changes to the migration logic: > > (1) Postcopy requests are now sent via a different socket from precopy > background migration stream, so as to be isolated fro

Re: [PATCH v4 07/19] migration: Allow migrate-recover to run multiple times

On Thu, Mar 31, 2022 at 11:08:45AM -0400, Peter Xu wrote: > Previously migration didn't have an easy way to cleanup the listening > transport, migrate recovery only allows to execute once. That's done with a > trick flag in postcopy_recover_triggered. > > Now the facility is already there. > > D

[PATCH v7 4/4] hw/acpi/aml-build: Use existing CPU topology to build PPTT table

When the PPTT table is built, the CPU topology is re-calculated, but it's unecessary because the CPU topology has been populated in virt_possible_cpu_arch_ids() on arm/virt machine. This reworks build_pptt() to avoid by reusing the existing IDs in ms->possible_cpus. Currently, the only user of bui

Re: [PATCH v7 12/12] hw/acpi: Make the PCI hot-plug aware of SR-IOV

On Mon, Apr 04, 2022 at 11:41:46AM +0200, Łukasz Gieryk wrote: > On Thu, Mar 31, 2022 at 02:38:41PM +0200, Igor Mammedov wrote: > > it's unclear what's bing hotpluged and unplugged, it would be better if > > you included QEMU CLI and relevan qmp/monito commands to reproduce it. > > Qemu CLI: > ---

Re: [PATCH 31/32] RFC: Simplify softmmu/main.c

On 2022/04/20 16:57, Marc-André Lureau wrote: Hi On Thu, Mar 24, 2022 at 11:52 AM Paolo Bonzini > wrote: On 3/23/22 16:57, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureaumailto:marcandre.lur...@redhat.co

[PATCH v7 0/4] hw/arm/virt: Fix CPU's default NUMA node ID

When the CPU-to-NUMA association isn't provided by user, the default NUMA node ID for the specific CPU is returned from virt_get_default_cpu_node_id(). Unfortunately, the default NUMA node ID breaks socket boundary and leads to the broken CPU topology warning message in Linux guest. This series int

Re: [PATCH] hw/nvme: add new command abort case

On Apr 20 13:41, Dmitry Tikhov wrote: > On Wed, Apr 20, 2022 at 12:36:54, Klaus Jensen wrote: > > On Apr 20 12:13, Klaus Jensen wrote: > > > On Apr 20 11:20, Dmitry Tikhov wrote: > > > > NVMe command set specification for end-to-end data protection formatted > > > > namespace states: > > > > > > >

Re: [PATCH v8 12/17] vfio-user: IOMMU support for remote device

> On Apr 19, 2022, at 4:45 PM, Jag Raman wrote: > > Assign separate address space for each device in the remote processes. > > Signed-off-by: Elena Ufimtseva > Signed-off-by: John G Johnson > Signed-off-by: Jagannathan Raman > --- > include/hw/remote/iommu.h | 40 + > hw/remote/

[PATCH v7 1/4] qapi/machine.json: Add cluster-id

This adds cluster-id in CPU instance properties, which will be used by arm/virt machine. Besides, the cluster-id is also verified or dumped in various spots: * hw/core/machine.c::machine_set_cpu_numa_node() to associate CPU with its NUMA node. * hw/core/machine.c::machine_numa_finish_cpu_

Re: [PATCH] qga/vss-win32: enable qga-vss.tlb generation with widl

Hi Helge, I checked what happened in MSYS2 and this looks like a bug in the widl tool. I looked into the widl source code and think that it detects the default include path incorrectly. During build of widl tool the corresponding variable receive incorrect value: `BIN_TO_INCLUDEDIR = ../x86_64-w

[PATCH v7 3/4] hw/arm/virt: Fix CPU's default NUMA node ID

When CPU-to-NUMA association isn't explicitly provided by users, the default one is given by mc->get_default_cpu_node_id(). However, the CPU topology isn't fully considered in the default association and this causes CPU topology broken warnings on booting Linux guest. For example, the following wa

Re: [PATCH v4 14/19] migration: Add helpers to detect TLS capability

On Thu, Mar 31, 2022 at 11:08:52AM -0400, Peter Xu wrote: > Add migrate_tls_enabled() to detect whether TLS is configured. > > Add migrate_channel_requires_tls() to detect whether the specific channel > requires TLS. > > No functional change intended. > > Signed-off-by: Peter Xu > --- > migrat

Re: [PATCH] hw/i386/e820: remove legacy reserved entries for e820

On Wed, Apr 20, 2022 at 02:25:54PM +0530, Ani Sinha wrote: > On Wed, Apr 20, 2022 at 1:57 PM Gerd Hoffmann wrote: > > > > On Wed, Apr 20, 2022 at 10:09:04AM +0530, Ani Sinha wrote: > > > e820 reserved entries were used before the dynamic entries with fw config > > > files > > > were intoduced. Pl

Re: [PATCH v4 15/19] migration: Export tls-[creds|hostname|authz] params to cmdline too

On Thu, Mar 31, 2022 at 11:08:53AM -0400, Peter Xu wrote: > It's useful for specifying tls credentials all in the cmdline (along with > the -object tls-creds-*), especially for debugging purpose. > > The trick here is we must remember to not free these fields again in the > finalize() function of

Re: [PATCH v4 16/19] migration: Enable TLS for preempt channel

On Thu, Mar 31, 2022 at 11:08:54AM -0400, Peter Xu wrote: > This patch is based on the async preempt channel creation. It continues > wiring up the new channel with TLS handshake to destionation when enabled. > > Note that only the src QEMU needs such operation; the dest QEMU does not > need any

Re: [PATCH v4 17/19] tests: Add postcopy tls migration test

On Thu, Mar 31, 2022 at 11:08:55AM -0400, Peter Xu wrote: > We just added TLS tests for precopy but not postcopy. Add the > corresponding test for vanilla postcopy. > > Signed-off-by: Peter Xu > --- > tests/qtest/migration-test.c | 43 +++- > 1 file changed, 37 i

Re: [PATCH v4 18/19] tests: Add postcopy tls recovery migration test

On Thu, Mar 31, 2022 at 11:08:56AM -0400, Peter Xu wrote: > It's easy to build this upon the postcopy tls test. > > Signed-off-by: Peter Xu > --- > tests/qtest/migration-test.c | 27 +-- > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/tests/qtest/migr

Re: [PATCH v4 19/19] tests: Add postcopy preempt tests

On Thu, Mar 31, 2022 at 11:08:57AM -0400, Peter Xu wrote: > Four tests are added for preempt mode: > > - Postcopy default > - Postcopy tls > - Postcopy recovery > - Postcopy tls+recovery > > Signed-off-by: Peter Xu > --- > tests/qtest/migration-test.c | 49 ++

Re: [PATCH v6 2/4] hw/arm/virt: Consider SMP configuration in CPU topology

On Wed, 20 Apr 2022 18:31:02 +0800 Gavin Shan wrote: > Hi Igor, > > On 4/20/22 4:32 PM, Igor Mammedov wrote: > > On Mon, 18 Apr 2022 10:09:18 +0800 > > Gavin Shan wrote: > > > >> Currently, the SMP configuration isn't considered when the CPU > >> topology is populated. In this case, it's imp

[PATCH v7 04/13] s390x: topology: implementating Store Topology System Information

The handling of STSI is enhanced with the interception of the function code 15 for storing CPU topology. Using the objects built during the pluging of CPU, we build the SYSIB 15_1_x structures. With this patch the maximum MNEST level is 2, this is also the only level allowed and only SYSIB 15_1_2

[PATCH v7 02/13] vfio: tolerate migration protocol v1 uapi renames

From: Matthew Rosato The v1 uapi is deprecated and will be replaced by v2 at some point; this patch just tolerates the renaming of uapi fields to reflect v1 / deprecated status. Signed-off-by: Matthew Rosato --- hw/vfio/common.c| 2 +- hw/vfio/migration.c | 19 +++ 2 files

[PATCH v7 01/13] Update linux headers

This is a placeholder that pulls in 5.18-rc3 + unmerged kernel changes required by this item. A proper header sync can be done once the associated kernel code merges. Signed-off-by: Pierre Morel --- .../linux/input-event-codes.h | 4 +- .../standard-headers/linux/virtio_config

[PATCH v7 03/13] s390x: topology: CPU topology objects and structures

We use new objects to have a dynamic administration of the CPU topology. The highest level object in this implementation is the s390 book and in this first implementation of CPU topology for S390 we have a single book. The book is built as a SYSBUS bridge during the CPU initialization. Other object

Re: [PATCH v7 12/12] hw/acpi: Make the PCI hot-plug aware of SR-IOV

On Fri, Mar 18, 2022 at 08:18:19PM +0100, Lukasz Maniak wrote: > From: Łukasz Gieryk > > PCI device capable of SR-IOV support is a new, still-experimental > feature with only a single working example of the Nvme device. > > This patch in an attempt to fix a double-free problem when a > SR-IOV-ca

[PATCH v7 08/13] s390x: topology: Adding drawers to STSI

Let's add STSI support for the container level 4, drawers, and provide the information back to the guest. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 137 +--- include/hw/s390x/cpu-topology.h | 19 - include/hw/s390x/sclp.h | 2 +-

[PATCH v7 06/13] s390x: topology: Adding books to STSI

Let's add STSI support for the container level 3, books, and provide the information back to the guest. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 147 +--- include/hw/s390x/cpu-topology.h | 20 - include/hw/s390x/sclp.h | 1 + ta

[PATCH v7 10/13] s390x: kvm: topology: interception of PTF instruction

When the host supports the CPU topology facility, the PTF instruction with function code 2 is interpreted by the SIE, provided that the userland hypervizor activates the interpretation by using the KVM_CAP_S390_CPU_TOPOLOGY KVM extension. The PTF instructions with function code 0 and 1 are interce

[PATCH v7 11/13] s390x: topology: resetting the Topology-Change-Report

During a subsystem reset the Topology-Change-Report is cleared. Let's ask KVM to clear the MTCR in the case of a subsystem reset. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 6 ++ hw/s390x/s390-virtio-ccw.c | 1 + target/s390x/cpu-sysemu.c| 7 +++ target/s390x

[PATCH v7 09/13] s390x: topology: implementing numa for the s390x topology

S390x CPU Topology allows a non uniform repartition of the CPU inside the topology containers, sockets, books and drawers. We use numa to place the CPU inside the right topology container and report the non uniform topology to the guest. Note that s390x needs CPU0 to belong to the topology and co

Re: [PATCH v7 00/12] hw/nvme: SR-IOV with Virtualization Enhancements

On Fri, Mar 18, 2022 at 08:18:07PM +0100, Lukasz Maniak wrote: > Resubmitting v6 as v7 since Patchew got lost with my sophisticated CC of > all maintainers just for the cover letter. > > Changes since v5: > - Fixed PCI hotplug issue related to deleting VF twice > - Corrected error messages for SR-

[PATCH v7 00/13] s390x: CPU Topology

Hi, This new spin adds RESET for the CPU Topology. I added Matthew's patch to help compile the source until the migration V2 is in the main tree. The goal of this series is to implement CPU topology for S390, it improves the preceeding series with the implementation of books and drawers, of non u

[PATCH v7 07/13] s390x: topology: Adding drawers to CPU topology

S390 CPU topology may have up to 5 topology containers. The first container above the cores is level 2, the sockets, and the level 3, containing sockets are the books. We introduce here the drawers, drawers is the level containing books. Let's add drawers, level4, containers to the CPU topology.

[PATCH v7 13/13] s390x: topology: activating CPU topology

Signed-off-by: Pierre Morel --- target/s390x/kvm/kvm.c | 9 + 1 file changed, 9 insertions(+) diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 17f426864b..cae37cddc3 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -366,6 +366,7 @@ int kvm_arch_init(M

[PATCH v7 12/13] s390x: CPU topology: CPU topology migration

To migrate the Multiple Topology Change report, MTCR, we get it from KVM and save its state in the topology VM State Description during the presave and restore it to KVM on the destination during the postload. The migration state is needed whenever the CPU topology feature is activated. Signed-of

[PATCH v7 05/13] s390x: topology: Adding books to CPU topology

S390 CPU topology may have up to 5 topology containers. The first container above the cores is level 2, the sockets. We introduce here the books, book is the level containing sockets. Let's add books, level3, containers to the CPU topology. Signed-off-by: Pierre Morel --- hw/core/machine-smp.c

Re: [PATCH 2/5] 9pfs: fix qemu_mknodat(S_IFSOCK) on macOS

On Tue, 19 Apr 2022 13:41:03 +0200 Christian Schoenebeck wrote: > mknod() on macOS does not support creating sockets, so divert to > call sequence socket(), bind() and chmod() respectively if S_IFSOCK > was passed with mode argument. > > Link: https://lore.kernel.org/qemu-devel/17933734.zYzKuhC0

Re: [PATCH 2/5] 9pfs: fix qemu_mknodat(S_IFSOCK) on macOS

On Wed, 20 Apr 2022 12:28:01 +0200 Christian Schoenebeck wrote: > On Mittwoch, 20. April 2022 11:09:46 CEST Greg Kurz wrote: > > On Tue, 19 Apr 2022 13:41:03 +0200 > > > > Christian Schoenebeck wrote: > > > mknod() on macOS does not support creating sockets, so divert to > > > call sequence soc

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