On Thu, 2022-03-24 at 09:22 +0100, Igor Mammedov wrote:
> On Mon, 14 Mar 2022 16:50:59 +0800
> Robert Hoo wrote:
>
> > Icelake, is the codename for Intel 3rd generation Xeon Scalable
> > server
> > processors. There isn't ever client variants. This "Icelake-Client"
> > CPU
> > model was added wr
Ping !
It would be nice to have some rough feedback about this series.
I plan to submit it in 2 sub-series (riscv-array in a separate part) but
would like to know first if this direction looks ok to you ?
Note that I'm a bit confused by the terminology. Should a "cluster" as
in "machine topol
Hi,
On 2022/3/29 上午5:02, Mark Cave-Ayland wrote:
+static const MemoryRegionOps loongarch_qemu_ops = {
+ .read = loongarch_qemu_read,
+ .write = loongarch_qemu_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 8,
+
On Thu, Apr 14, 2022 at 2:04 AM Andrew Deason
wrote:
> On Solaris, instead of the -P, -H, and -r flags, we need to provide
> the target init state to the 'shutdown' command: state 5 is poweroff,
> 0 is halt, and 6 is reboot. We also need to pass -g0 to avoid the
> default 60-second delay, and -y
On Thu, Apr 14, 2022 at 2:01 AM Andrew Deason
wrote:
> guest_get_network_stats can silently fail in a couple of ways. Add
> debug messages to these cases, so we're never completely silent on
> failure.
>
> Signed-off-by: Andrew Deason
>
Reviewed-by: Marc-André Lureau
> ---
> Changes since v1
Hi,
Thanks for the work!
On Thu, Apr 14, 2022 at 03:46:52AM -0700, Yi Liu wrote:
> - More tests
I did a quick test on my ARM64 platform, using "iommu=smmuv3"
string. The behaviors are different between using default and
using legacy "iommufd=off".
The legacy pathway exits the VM with:
vfi
From: Frank Chang
Allow user to set core's marchid, mvendorid, mipid CSRs through
-cpu command line option.
Signed-off-by: Frank Chang
Reviewed-by: Jim Shu
---
target/riscv/cpu.c | 4
target/riscv/cpu.h | 4
target/riscv/csr.c | 38 ++
3 files c
Hi All,
As this series only supports running binary files in ELF format, and does not
depend on
BIOS and kernel file. so this series are changed from RFC to patch v1.
The manual:
- https://github.com/loongson/LoongArch-Documentation/releases/tag/2022.03.17
Old series:
- https://patchew.org/
From: Song Gao
This includes:
- EXT.W.{B/H}
- CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
- BYTEPICK.{W/D}
- REVB.{2H/4H/2W/D}
- REVH.{2W/D}
- BITREV.{4B/8B}, BITREV.{W/D}
- BSTRINS.{W/D}, BSTRPICK.{W/D}
- MASKEQZ, MASKNEZ
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
-
From: Song Gao
This includes:
- SLL.W, SRL.W, SRA.W, ROTR.W
- SLLI.W, SRLI.W, SRAI.W, ROTRI.W
- SLL.D, SRL.D, SRA.D, ROTR.D
- SLLI.D, SRLI.D, SRAI.D, ROTRI.D
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/insn_trans/trans_shift.c.inc
From: Song Gao
This includes:
- ADD.{W/D}, SUB.{W/D}
- ADDI.{W/D}, ADDU16ID
- ALSL.{W[U]/D}
- LU12I.W, LU32I.D LU52I.D
- SLT[U], SLT[U]I
- PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
- AND, OR, NOR, XOR, ANDN, ORN
- MUL.{W/D}, MULH.{W[U]/D[U]}
- MULW.D.W[U]
- DIV.{W[U]/D[U]}, MOD.{W[U]/D[U]}
- ANDI,
From: Song Gao
This patch adds target state header, target definitions
and initialization routines.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/loongarch/cpu-param.h | 18 ++
target/loongarch/cpu.c
From: Song Gao
This includes:
- LL.{W/D}, SC.{W/D}
- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[_DB].{W/D}
- AM{MAX/MIN}[_DB].{WU/DU}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
.../loongarch/insn_trans/trans_atomic.c.inc | 114 ++
.../loong
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 18 +
target/loongarch/helper.h | 13 +
.../insn_trans/trans_privileged.c.inc |
From: Song Gao
This patch adds main translation routines and
basic functions for translation.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h| 6 ++
target/loongarch/op_helper.c | 21 +
target/loongarch/translate.c
From: Song Gao
This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 4 ++
target/loongarch/insn_trans
From: Song Gao
This patch gives an introduction to the LoongArch target.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
MAINTAINERS | 6 ++
target/loongarch/README | 10 ++
2 files changed, 16 insertions(+)
create mode 100644
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu-csr.h | 201 +
target/loongarch/cpu.c | 36 +++
target/loongarch/cpu.h | 65
3 files changed, 302 insertions(+)
create mod
Emulate a 3A5000 board use the new loongarch instruction.
3A5000 belongs to the Loongson3 series processors.
The board consists of a 3A5000 cpu model and the virt
bridge. The host 3A5000 board is really complicated and
contains many functions.Now for the tcg softmmu mode
only part functions are emu
From: Song Gao
This includes:
- FCMP.cond.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper.c| 60
target/loongarch/helper.h| 9 +++
target/loongarch/insn_trans/t
From: Song Gao
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/loongarch/meson.build | 19 +++
target/meson.build | 1 +
2 files changed, 20 insertions(+)
create mode 100644 target/
From: Song Gao
This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Rich
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 1 +
tests/tcg/l
From: Song Gao
This patch adds support for disassembling via option '-d in_asm'.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
include/disas/dis-asm.h | 2 +
meson.build | 1 +
target/loongarch/disas.c | 610
From: Song Gao
This includes:
- FCVT.S.D, FCVT.D.S
- FFINT.{S/D}.{W/L}, FTINT.{W/L}.{S/D}
- FTINT{RM/RP/RZ/RNE}.{W/L}.{S/D}
- FRINT.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper.c| 393 +++
From: Song Gao
This includes:
- FLD.{S/D}, FST.{S/D}
- FLDX.{S/D}, FSTX.{S/D}
- FLD{GT/LE}.{S/D}, FST{GT/LE}.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
.../loongarch/insn_trans/trans_fmemory.c.inc | 153 ++
target/loongarch/
From: Song Gao
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Acked-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
---
tests/tcg/configure.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh
index 8
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 68 +++-
include/hw/loongarch/loongarch.h | 8
2 files changed, 74 insertions(+), 2 deletions(-)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index e
From: Song Gao
This includes:
- FMOV.{S/D}
- FSEL
- MOVGR2FR.{W/D}, MOVGR2FRH.W
- MOVFR2GR.{S/D}, MOVFRH2GR.S
- MOVGR2FCSR, MOVFCSR2GR
- MOVFR2CF, MOVCF2FR
- MOVGR2CF, MOVCF2GR
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 1 +
target/loongarch/internals.h | 2 +
target/loongarch/machine.c | 85
target/loongarch/meson.build | 6 +++
4 files changed, 94 in
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h| 2 +
target/loongarch/csr_helper.c | 186 ++
target/loongarch/disas.c | 15 ++
target/loongar
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 106 +++
1 file changed, 106 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 345226d
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 1 +
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 488
hw/intc/meson.build
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 2 +
configs/targets/loongarch64-softmmu.mak | 1 +
gdb-xml/loongarch-base64.xml| 44 ++
gdb-xml/loongarch-fpu64.xml | 57 +
target/loongarch/cpu.c
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 8 +
docs/system/loongarch/loongson3.rst | 41 ++
target/loongarch/README | 54 +
3 files changed, 103 insertions(+)
create mode 100644
This patch realize PCH-MSI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 5 ++
hw/intc/loongarch_pch_msi.c | 75 +
hw/intc/meson.build | 1 +
hw/intc/trace-events
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig| 3 +
hw/intc/loongarch_extioi.c | 373 +
hw/intc/meson.build| 1 +
hw/intc/trace-events
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some unimplented device to emulate guest unused
memory space.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 7 +
From: Song Gao
This includes:
- BEQ, BNE, BLT[U], BGE[U]
- BEQZ, BNEZ
- B
- BL
- JIRL
- BCEQZ, BCNEZ
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
.../loongarch/insn_trans/trans_branch.c.inc | 83 +++
target/loongarch/insns.decode
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 261 +++
target/loongarch/cpu.h | 2 +
target/loongarch/internals.h | 2 +
3 files changed, 265 insertions(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 3 +
target/loongarch/disas.c | 8 +
target/loongarch/helper.h | 2 +
.../insn_trans/trans_privileged.c
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 3 ++
target/loongarch/helper.h | 2 ++
target/loongarch/insn_trans/trans_extra.c.inc | 33 +++
target/loongarch
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
qapi/machine-target.json | 6 --
target/loongarch/cpu.c | 26 ++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/qapi/machine-target.json b/qapi/machine-target.
14.04.2022 20:57, Paolo Bonzini wrote:
The .reply_possible field of s->requests is never set to false. This is
not a problem as it is only a safeguard to detect protocol errors,
but it's sloppy. In fact, the field is actually not necessary at all,
because .coroutine is set to NULL in NBD_FOREAC
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/constant_timer.c | 65 +++
target/loongarch/cpu.c| 2 +
target/loongarch/cpu.h| 4 ++
target/loongarch/internals.h | 6 +++
target/loongarch/meson.build | 1
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
softmmu/qdev-monitor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 12fe60c467..bb5897fc76 100644
--- a/softmmu/qdev-monitor.c
+
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 17
target/loongarch/helper.h | 5 +
.../insn_trans/trans_privileged.c.inc | 65 +
target/
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 24 +++
target/loongarch/cpu.h| 51 ++
target/loongarch/internals.h | 9 +
target/loongarch/machine.c| 17 ++
tar
From: Song Gao
This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
targe
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 2 +
hw/acpi/Kconfig| 4 +
hw/acpi/ls7a.c | 374 +
hw/acpi/meson.build| 1 +
hw/loongarch/Kconfig | 2 +
hw/loongarch/loongson3.
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 2 +
hw/intc/Kconfig | 3 +
hw/intc/loongarch_ipi.c | 145 +++
hw/intc/meson.build
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 4 +
hw/rtc/Kconfig | 3 +
hw/rtc/ls7a_rtc.c | 323 +
14.04.2022 20:57, Paolo Bonzini wrote:
Several coroutine functions in block/nbd.c are not marked as such. This
patch adds a few more markers; it is not exhaustive, but it focuses
especially on:
- places that wake other coroutines, because aio_co_wake() has very
different semantics inside a coro
Moteen Shah writes:
> From: Moteen Shah
>
> The error message in virtio_init_region_cache()
> is given a prefix virtio.
It seems a shame considering we have a common virtio_error function that
we couldn't do it in one place. One option would be to make virtio_error
a macro that could insert _
This is the initial result of reviving Marc-André's series at
https://patchew.org/QEMU/20170704220346.29244-1-marcandre.lur...@redhat.com/.
A lot of the patches are similar to the ones that Marc-André wrote,
but due to the changes in the code it was easier to redo them.
For nbd, the patch is on
Signed-off-by: Paolo Bonzini
---
block/block-backend.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/block-backend.c b/block/block-backend.c
index e0e1aff4b1..fedf2eca83 100644
--- a/block/block-backend.c
+++ b/block/block-backend.c
@@ -1391,10 +1391,10 @@ int
Signed-off-by: Paolo Bonzini
---
block/qcow2-refcount.c | 4 ++--
block/qcow2.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index b91499410c..b6f90b2702 100644
--- a/block/qcow2-refcount.c
+++ b/block/qcow2-refc
Signed-off-by: Paolo Bonzini
---
block/block-backend.c | 18 +-
block/io.c| 24
2 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/block/block-backend.c b/block/block-backend.c
index fedf2eca83..52009b8949 100644
--- a/block/block
Signed-off-by: Paolo Bonzini
---
block/blkverify.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/blkverify.c b/block/blkverify.c
index e4a37af3b2..020b1ae7b6 100644
--- a/block/blkverify.c
+++ b/block/blkverify.c
@@ -258,7 +258,7 @@ blkverify_co_pwritev(BlockDriverStat
Signed-off-by: Paolo Bonzini
---
include/block/nbd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/block/nbd.h b/include/block/nbd.h
index a98eb665da..5c3710fa52 100644
--- a/include/block/nbd.h
+++ b/include/block/nbd.h
@@ -423,6 +423,6 @@ QIOChannel *coroutine_fn
Signed-off-by: Paolo Bonzini
---
block/parallels.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/block/parallels.c b/block/parallels.c
index 8879b7027a..bee2ff023d 100644
--- a/block/parallels.c
+++ b/block/parallels.c
@@ -165,8 +165,9 @@ static int64_t block_status(BDR
Signed-off-by: Paolo Bonzini
---
include/qemu/coroutine.h | 2 +-
util/qemu-coroutine.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qemu/coroutine.h b/include/qemu/coroutine.h
index 284571badb..2d9211faff 100644
--- a/include/qemu/coroutine.h
+++ b/include/qe
Signed-off-by: Paolo Bonzini
---
block/blkdebug.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/block/blkdebug.c b/block/blkdebug.c
index bbf2948703..a93ba61487 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -587,8 +587,8 @@ out:
return ret;
}
Signed-off-by: Paolo Bonzini
---
block/file-posix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/file-posix.c b/block/file-posix.c
index bfd9b2..cf7b5531c8 100644
--- a/block/file-posix.c
+++ b/block/file-posix.c
@@ -2143,7 +2143,7 @@ static void raw_aio_unplug(Bl
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Acked-by: Greg Kurz
Signed-off-by: Paolo Bonzini
---
hw/9pfs/9p.h | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/9pfs/9p.h b/hw/9pfs/9p.h
index 994f952600..a523ac34a9 100644
--- a/hw/9pfs/9p.h
+++ b/hw/9
Signed-off-by: Paolo Bonzini
---
block/nfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/nfs.c b/block/nfs.c
index 444c40b458..596ebe98cb 100644
--- a/block/nfs.c
+++ b/block/nfs.c
@@ -223,7 +223,7 @@ static void nfs_process_write(void *arg)
qemu_mutex_unlock(&c
Signed-off-by: Paolo Bonzini
---
block/quorum.c | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/block/quorum.c b/block/quorum.c
index f33f30d36b..5ff69d7443 100644
--- a/block/quorum.c
+++ b/block/quorum.c
@@ -161,11 +161,10 @@ static bool
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Message-Id: <20170704220346.29244-4-marcandre.lur...@redhat.com>
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/te
Signed-off-by: Paolo Bonzini
---
block/nvme.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/block/nvme.c b/block/nvme.c
index 01fb28aa63..6519697e40 100644
--- a/block/nvme.c
+++ b/block/nvme.c
@@ -1234,8 +1234,9 @@ static inline bool nvme_qiov_aligned(BlockDriverState
Signed-off-by: Paolo Bonzini
---
block/nbd.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/block/nbd.c b/block/nbd.c
index 5af4deac3f..a4c8d661ad 100644
--- a/block/nbd.c
+++ b/block/nbd.c
@@ -974,11 +974,11 @@ static void nbd_iter_request_error(NBDReplyChunkIter
Signed-off-by: Paolo Bonzini
---
block/throttle.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/throttle.c b/block/throttle.c
index 6e8d52fa24..ddd450593a 100644
--- a/block/throttle.c
+++ b/block/throttle.c
@@ -162,7 +162,7 @@ static int coroutine_fn
throttle_co_pwri
Signed-off-by: Paolo Bonzini
---
block/qcow2-cluster.c | 18 +-
block/qcow2-refcount.c | 2 +-
block/qcow2.c | 4 ++--
block/qcow2.h | 14 +++---
4 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/block/qcow2-cluster.c b/block/qcow2-clust
Signed-off-by: Paolo Bonzini
---
block/copy-before-write.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/copy-before-write.c b/block/copy-before-write.c
index a8a06fdc09..5ad9693b13 100644
--- a/block/copy-before-write.c
+++ b/block/copy-before-write.c
@@ -165,
Signed-off-by: Paolo Bonzini
---
block/curl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/curl.c b/block/curl.c
index 1e0f609579..cba4c4cac7 100644
--- a/block/curl.c
+++ b/block/curl.c
@@ -855,7 +855,7 @@ out_noclean:
return -EINVAL;
}
-static void curl_setu
Signed-off-by: Paolo Bonzini
---
include/qemu/job.h | 2 +-
job.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qemu/job.h b/include/qemu/job.h
index c105b31076..397ac39608 100644
--- a/include/qemu/job.h
+++ b/include/qemu/job.h
@@ -436,7 +436,7 @@ v
Signed-off-by: Paolo Bonzini
---
block/qed.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/block/qed.c b/block/qed.c
index f34d9a3ac1..208128d679 100644
--- a/block/qed.c
+++ b/block/qed.c
@@ -259,7 +259,7 @@ static CachedL2Table *qed_new_l2_table(BDRVQEDState *s)
r
Signed-off-by: Paolo Bonzini
---
block/vmdk.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/block/vmdk.c b/block/vmdk.c
index 37c0946066..27d3732255 100644
--- a/block/vmdk.c
+++ b/block/vmdk.c
@@ -1741,10 +1741,10 @@ static int coroutine_fn
vmdk_co_b
Signed-off-by: Paolo Bonzini
---
block/iscsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/iscsi.c b/block/iscsi.c
index d707d0b354..b33eeec794 100644
--- a/block/iscsi.c
+++ b/block/iscsi.c
@@ -290,7 +290,7 @@ iscsi_co_generic_cb(struct iscsi_context *iscsi, int sta
Signed-off-by: Paolo Bonzini
---
util/qemu-coroutine-lock.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/util/qemu-coroutine-lock.c b/util/qemu-coroutine-lock.c
index 2669403839..ec55490b52 100644
--- a/util/qemu-coroutine-lock.c
+++ b/util/qemu-coroutine-loc
Signed-off-by: Paolo Bonzini
---
block/raw-format.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/raw-format.c b/block/raw-format.c
index 69fd650eaf..45440345b6 100644
--- a/block/raw-format.c
+++ b/block/raw-format.c
@@ -411,7 +411,7 @@ static void raw_lock_medium(Blo
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Juan Quintela
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Paolo Bonzini
---
migration/migration.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/migration/migration.c b/migration/migration.c
index 4d
Hi Alistair,
On Wed, Apr 6, 2022 at 10:05 PM Alistair Francis
wrote:
>
> From: Alistair Francis
>
> Move the binary and device tree loading code to the machine done
> notifier. This allows us to prepare for editing the device tree as part
> of the notifier.
>
> This is based on similar code in t
14.04.2022 20:57, Paolo Bonzini wrote:
It is unnecessary to check nbd_client_connected() because every time
s->state is moved out of NBD_CLIENT_CONNECTED the socket is shut down
and all coroutines are resumed.
The only case where it was actually needed is when the NBD
server disconnects and ther
On Fri, Apr 15, 2022 at 10:27:21PM +0300, Dmitry Tikhov wrote:
> Since there is no else after nvme_dsm_cb invocation, metadata associated
> with non-zero block range is currently zeroed. Also this behaviour leads
> to segfault since we schedule iocb->bh two times. First when entering
> nvme_dsm_cb
On Apr 15 13:35, Keith Busch wrote:
> On Fri, Apr 15, 2022 at 10:27:21PM +0300, Dmitry Tikhov wrote:
> > Since there is no else after nvme_dsm_cb invocation, metadata associated
> > with non-zero block range is currently zeroed. Also this behaviour leads
> > to segfault since we schedule iocb->bh t
On Apr 15 23:23, Dmitry Tikhov wrote:
> On Fri, Apr 15, 2022 at 21:42:05, Klaus Jensen wrote:
> > On Apr 15 13:35, Keith Busch wrote:
> > > On Fri, Apr 15, 2022 at 10:27:21PM +0300, Dmitry Tikhov wrote:
> > > > Since there is no else after nvme_dsm_cb invocation, metadata associated
> > > > with no
Since there is no else after nvme_dsm_cb invocation, metadata associated
with non-zero block range is currently zeroed. Also this behaviour leads
to segfault since we schedule iocb->bh two times. First when entering
nvme_dsm_cb with iocb->idx == iocb->nr and second on call stack unwinding
by callin
Since there is no return after nvme_dsm_cb invocation, metadata
associated with non-zero block range is currently zeroed. Also this
behaviour leads to segfault since we schedule iocb->bh two times.
First when entering nvme_dsm_cb with iocb->idx == iocb->nr and
second because of missing return on ca
On Fri, Apr 15, 2022 at 21:42:05, Klaus Jensen wrote:
> On Apr 15 13:35, Keith Busch wrote:
> > On Fri, Apr 15, 2022 at 10:27:21PM +0300, Dmitry Tikhov wrote:
> > > Since there is no else after nvme_dsm_cb invocation, metadata associated
> > > with non-zero block range is currently zeroed. Also thi
On 4/15/22 02:40, Xiaojuan Yang wrote:
+static bool gen_ll(DisasContext *ctx, arg_rr_i *a,
+ void (*func)(TCGv, TCGv, int))
+{
+TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
+TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
+TCGv t0 = tcg_temp_new();
+
+tcg_gen_addi_tl(t0
On 4/15/22 02:40, Xiaojuan Yang wrote:
@@ -45,13 +47,37 @@ target_ulong helper_bitswap(target_ulong v)
void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
{
if (rj > rk) {
-do_raise_exception(env, EXCP_ADE, GETPC());
+do_raise_exception(env, EX
On 4/15/22 02:40, Xiaojuan Yang wrote:
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 8 +
docs/system/loongarch/loongson3.rst | 41 ++
target/loongarch/README | 54 +
3 files cha
On 4/15/22 02:40, Xiaojuan Yang wrote:
+const VMStateDescription vmstate_loongarch_cpu = {
+.name = "cpu",
+.version_id = 0,
+.minimum_version_id = 0,
+.fields = (VMStateField[]) {
+
+VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
+VMSTATE_UINTTL(env.pc, LoongArc
On Wed, Apr 13, 2022 at 12:08 AM Alistair Francis wrote:
>
> On Thu, Mar 31, 2022 at 10:19 AM Atish Patra wrote:
> >
> > The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions,
> > and 'cofpmf' for Count OverFlow and Privilege Mode Filtering)
> > extension allows the perf to handl
On 4/15/22 02:40, Xiaojuan Yang wrote:
+if (level) {
+env->CSR_ESTAT |= 1 << irq;
+} else {
+env->CSR_ESTAT &= ~(1 << irq);
+}
This is
env->CSR_ESTAT = deposit64(env->CSR_ESTAT, irq, 1, level != 0);
+static inline unsigned int get_vint_size(CPULoongArchState *
On 4/15/22 02:40, Xiaojuan Yang wrote:
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/constant_timer.c | 65 +++
target/loongarch/cpu.c| 2 +
target/loongarch/cpu.h| 4 ++
target/loongarch/internals.h | 6
On 4/15/22 02:40, Xiaojuan Yang wrote:
+int cpu_csr_offset(unsigned csr_num);
...
+static const uint64_t csr_offsets[] = {
There's no reason for this array to be uint64_t.
It really should match the function.
+target_ulong helper_csrwr_estat(CPULoongArchState *env, target_ulong val)
+{
+
On 4/15/22 02:40, Xiaojuan Yang wrote:
+static bool trans_iocsrrd_b(DisasContext *ctx, arg_iocsrrd_b *a)
+static bool trans_iocsrrd_h(DisasContext *ctx, arg_iocsrrd_h *a)
+static bool trans_iocsrrd_w(DisasContext *ctx, arg_iocsrrd_w *a)
+static bool trans_iocsrrd_d(DisasContext *ctx, arg_iocsrrd_
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Acked-by: Alistair Francis
---
target/riscv/cpu.c | 23 +++
target/riscv/cpu.h | 13 +
2 files changed, 36 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index faa41217d2..365bdd5fe5 10064
This patchset implements RISC-V scalar crypto extension v1.0.0 version
instructions.
Partial instructions are reused from B-extension.
Specification:
https://github.com/riscv/riscv-crypto
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v10
To test rvk impl
1 - 100 of 118 matches
Mail list logo
