On Wed, Mar 09, 2022 at 11:28:27AM +, Jonathan Cameron wrote:
> Hi Peter,
Hi, Jonathan,
>
> >
> > https://lore.kernel.org/qemu-devel/20220306174137.5707-35-jonathan.came...@huawei.com/
> >
> > Having mr->ops set but with memory_access_is_direct() returning true sounds
> > weird to me.
> >
On Wed, Mar 09, 2022 at 11:58:01PM +0800, huang...@chinatelecom.cn wrote:
> From: Hyman Huang(黄勇)
>
> Add dirty page rate limit test if kernel support dirty ring,
> create a standalone file to implement the test case.
Thanks for writting this test case.
>
> Signed-off-by: Hyman Huang(黄勇)
> --
On 09/03/2022 12.22, Alex Bennée wrote:
With -cpu max we get a warning:
qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
But dropping the -cpu max and it still runs fine.
Signed-off-by: Alex Bennée
Cc: Thomas Huth
---
tests/tcg/s390x/Makefile.target | 2 --
1 file changed, 2 d
On Mittwoch, 9. März 2022 14:24:24 CET Christian Schoenebeck wrote:
> Send Twalk request with nwname=0. In this case no QIDs should
> be returned by 9p server; this is equivalent to walking to dot.
>
> Signed-off-by: Christian Schoenebeck
> ---
> tests/qtest/virtio-9p-test.c | 22 +++
Notify VM exit is introduced to mitigate the potential DOS attach from
malicious VM. This series is the userspace part to enable this feature
through a new KVM capability KVM_CAP_X86_NOTIFY_VMEXIT. The
corresponding KVM patch series is available at
https://lore.kernel.org/lkml/20220310084001.10235
There are cases that malicious virtual machine can cause CPU stuck (due
to event windows don't open up), e.g., infinite loop in microcode when
nested #AC (CVE-2015-5307). No event window means no event (NMI, SMI and
IRQ) can be delivered. It leads the CPU to be unavailable to host or
other VMs. Not
On Mittwoch, 9. März 2022 15:49:04 CET Christian Schoenebeck wrote:
> Extend previously added fs_walk_none() test by comparing the QID
> of the root fid with the QID of the cloned fid. They should be
> equal.
>
> Signed-off-by: Christian Schoenebeck
> ---
> tests/qtest/virtio-9p-test.c | 70
Signed-off-by: Chenyi Qiang
---
linux-headers/asm-x86/kvm.h | 4
linux-headers/linux/kvm.h | 29 -
2 files changed, 28 insertions(+), 5 deletions(-)
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index 2da3316bb5..44757bd612 100644
---
On Mittwoch, 9. März 2022 18:12:17 CET Christian Schoenebeck wrote:
> The local variable 'name_idx' is used in two loops in function v9fs_walk().
> Let the first loop use its own variable 'nvalid' instead, which we will use
> in subsequent patches as the number of (requested) path components
> succ
On Mittwoch, 9. März 2022 18:57:39 CET Christian Schoenebeck wrote:
> Current implementation of 'Twalk' request handling always sends an 'Rerror'
> response if any error occured. The 9p2000 protocol spec sais though:
>
> "
> If the first element cannot be walked for any reason, Rerror is retur
On Thu, Mar 10, 2022 at 05:02:05PM +0800, Chenyi Qiang wrote:
> There are cases that malicious virtual machine can cause CPU stuck (due
> to event windows don't open up), e.g., infinite loop in microcode when
> nested #AC (CVE-2015-5307). No event window means no event (NMI, SMI and
> IRQ) can be d
On Thu, Mar 03, 2022 at 03:58:19PM +0100, Nicolas Saenz Julienne wrote:
> Upon freeing a thread pool we need to get rid of any remaining worker.
> This is achieved by setting the thread pool's topping flag, waking the
s/topping/stopping/
> workers up, and waiting for them to exit one by one. The
On Tue, 8 Mar 2022 at 18:22, Philippe Mathieu-Daudé
wrote:
>
> From: Philippe Mathieu-Daudé
>
> The following changes since commit 9740b907a5363c06ecf61e08b21966a81eb0dab4:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20220307' into staging (2022-03-08
> 15:26:10
On 3/10/2022 5:17 PM, Daniel P. Berrangé wrote:
On Thu, Mar 10, 2022 at 05:02:05PM +0800, Chenyi Qiang wrote:
There are cases that malicious virtual machine can cause CPU stuck (due
to event windows don't open up), e.g., infinite loop in microcode when
nested #AC (CVE-2015-5307). No event win
On Thu, Mar 10, 2022 at 05:53:05PM +0800, Chenyi Qiang wrote:
>
>
> On 3/10/2022 5:17 PM, Daniel P. Berrangé wrote:
> > On Thu, Mar 10, 2022 at 05:02:05PM +0800, Chenyi Qiang wrote:
> > > There are cases that malicious virtual machine can cause CPU stuck (due
> > > to event windows don't open up)
On Thu, 2022-03-10 at 09:20 +, Stefan Hajnoczi wrote:
> On Thu, Mar 03, 2022 at 03:58:19PM +0100, Nicolas Saenz Julienne wrote:
> > Upon freeing a thread pool we need to get rid of any remaining worker.
> > This is achieved by setting the thread pool's topping flag, waking the
>
> s/topping/st
Am 08/03/2022 um 14:41 schrieb Stefan Hajnoczi:
> It's not clear to me that .get_parent_aio_context() should only be
> called from the main thread. The API is read-only so someone might try
> to call from I/O code in the future expecting it to work like other
> read-only graph APIs that are avai
On Wed, Mar 09, 2022 at 03:34:53PM -0700, Alex Williamson wrote:
> > +The only device-specific region type and subtype supported by vfio-user is
> > +``VFIO_REGION_TYPE_MIGRATION`` (3) and ``VFIO_REGION_SUBTYPE_MIGRATION``
> > (1).
>
> These should be considered deprecated from the kernel interf
On 10/03/2022 09.36, Thomas Huth wrote:
On 09/03/2022 12.22, Alex Bennée wrote:
With -cpu max we get a warning:
qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
But dropping the -cpu max and it still runs fine.
Signed-off-by: Alex Bennée
Cc: Thomas Huth
---
tests/tcg/s390x/Mak
On Thu, Mar 03, 2022 at 03:58:20PM +0100, Nicolas Saenz Julienne wrote:
> @@ -2935,13 +2947,6 @@ qemu_syms = custom_target('qemu.syms', output:
> 'qemu.syms',
> capture: true,
> command: [undefsym, nm, '@INPUT@'])
>
> -qom_ss = qom_ss.a
Am 08/03/2022 um 15:04 schrieb Stefan Hajnoczi:
> On Tue, Feb 08, 2022 at 09:35:12AM -0500, Emanuele Giuseppe Esposito wrote:
>> diff --git a/include/qemu/job.h b/include/qemu/job.h
>> index ca46e46f5b..574110a1f2 100644
>> --- a/include/qemu/job.h
>> +++ b/include/qemu/job.h
>> @@ -75,11 +75,14
On Thu, Mar 03, 2022 at 03:58:21PM +0100, Nicolas Saenz Julienne wrote:
> 'event-loop-base' provides basic property handling for all 'AioContext'
> based event loops. So let's define a new 'MainLoopClass' that inherits
> from it. This will permit tweaking the main loop's properties through
> qapi a
Thomas Huth writes:
> On 09/03/2022 12.22, Alex Bennée wrote:
>> With -cpu max we get a warning:
>>qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
>> But dropping the -cpu max and it still runs fine.
>> Signed-off-by: Alex Bennée
>> Cc: Thomas Huth
>> ---
>> tests/tcg/s390x/Ma
On 10/03/2022 11.34, Alex Bennée wrote:
Thomas Huth writes:
On 09/03/2022 12.22, Alex Bennée wrote:
With -cpu max we get a warning:
qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
But dropping the -cpu max and it still runs fine.
Signed-off-by: Alex Bennée
Cc: Thomas Huth
---
On Thu, Mar 03, 2022 at 04:13:07PM +0100, Nicolas Saenz Julienne wrote:
> @@ -537,10 +546,19 @@
> # 0 means that the engine will use its default
> # (default:0, since 6.1)
> #
> +# @thread-pool-min: minimum number of threads readily available in the thread
> +#
On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
> On 07/03/2022 11.06, Daniel P. Berrangé wrote:
> > On Mon, Mar 07, 2022 at 02:51:23PM +0800, Peter Xu wrote:
> > > On Wed, Mar 02, 2022 at 05:49:18PM +, Daniel P. Berrangé wrote:
> > > > The QMP commands have a trailing newline, but
On Mon, Mar 07, 2022 at 11:11:07AM +0100, Thomas Huth wrote:
> On 02/03/2022 18.49, Daniel P. Berrangé wrote:
> > The test cases differ only in the URI they provide to the migration
> > commands, and the ability to set the dirty_ring mode. This code is
> > trivially merged into a common helper.
> >
On Thu, Mar 10, 2022 at 12:00:35PM +0100, Christian Schoenebeck wrote:
> On Mittwoch, 9. März 2022 12:44:16 CET Daniel P. Berrangé wrote:
> > On Wed, Mar 09, 2022 at 11:40:42AM +0100, Christian Schoenebeck wrote:
> > > On Mittwoch, 9. März 2022 11:05:02 CET Philippe Mathieu-Daudé wrote:
> > > > Not
On Mittwoch, 9. März 2022 12:44:16 CET Daniel P. Berrangé wrote:
> On Wed, Mar 09, 2022 at 11:40:42AM +0100, Christian Schoenebeck wrote:
> > On Mittwoch, 9. März 2022 11:05:02 CET Philippe Mathieu-Daudé wrote:
> > > Not sure what you have in mind. I'm totally new to the macOS/Darwin
> > > world, a
Offset calculations are easy enough to get wrong. Let's add a few
variables to make moving around elf headers and data sections easier.
Signed-off-by: Janosch Frank
Reviewed-by: Marc-André Lureau
---
dump/dump.c | 35 +++
include/sysemu/dump.h | 4
The dump/dump.c file has lots of duplicated code for handling 64 and
32 bit elf files. Additionally there are many instances where code can
be improved by adding a variable to avoid having to specify the same
calculation or check over and over.
This series is the cleanup step onto which my series
There's no need to have phdr_num and sh_info at the same time. We can
make phdr_num 32 bit and set PN_XNUM when we write the header if
phdr_num >= PN_XNUM.
Signed-off-by: Janosch Frank
---
dump/dump.c | 34 ++
include/sysemu/dump.h | 3 +--
2 files chan
Checking d_class in dump_info leads to lengthy conditionals so let's
shorten things a bit by introducing a helper function.
Signed-off-by: Janosch Frank
---
dump/dump.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/dump/dump.c b/dump/dump.c
index 12b3a1
Just like with the other write functions let's move the 32/64 bit elf
handling to a function to improve readability.
Signed-off-by: Janosch Frank
---
dump/dump.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/dump/dump.c b/dump/dump.c
index 5542adf7b
There's no need to have a gigantic if in there let's move the elf
32/64 bit logic into the section, segment or note code.
Signed-off-by: Janosch Frank
---
dump/dump.c | 42 +++---
1 file changed, 11 insertions(+), 31 deletions(-)
diff --git a/dump/dump.c b/du
When s->shdr_num is 0 we'll add 0 bytes of section headers which is
equivalent to not adding section headers but with the multiplication
we can remove a if/else.
Signed-off-by: Janosch Frank
---
dump/dump.c | 24
1 file changed, 8 insertions(+), 16 deletions(-)
diff --g
Hello,
I've noticed that the command
qemu-system-xtensa -cpu help
no longer prints anything. Apparently because cpu_list is no longer defined
in list_cpus inside softmmu/cpus.c
Bisection points to the following commit:
e0220bb5b200 ("softmmu: Build target-agnostic objects once")
Reverting the c
There's no need to have two write functions. Let's rather have two
functions that set the data for elf 32/64 and then write it in a
common function.
Signed-off-by: Janosch Frank
---
dump/dump.c | 94 +++--
1 file changed, 48 insertions(+), 46 delet
Let's move ELF related members into one block and guest memory related
ones into another to improve readability.
Signed-off-by: Janosch Frank
---
include/sysemu/dump.h | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/include/sysemu/dump.h b/include/sysemu/d
Hi
On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
wrote:
> On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
> > On 07/03/2022 11.06, Daniel P. Berrangé wrote:
> > > On Mon, Mar 07, 2022 at 02:51:23PM +0800, Peter Xu wrote:
> > > > On Wed, Mar 02, 2022 at 05:49:18PM +, Daniel
By splitting the writing of the section headers and (future) section
data we prepare for the addition of a string table section and
architecture sections.
Signed-off-by: Janosch Frank
---
dump/dump.c | 112 --
include/sysemu/dump.h | 4 ++
2 fi
Let's move from a boolean to a int variable which will later enable us
to store the number of sections that are in the dump file.
Signed-off-by: Janosch Frank
---
dump/dump.c | 24
include/sysemu/dump.h | 2 +-
2 files changed, 13 insertions(+), 13 deletions(-
Allocating the header lets us write it at a later time and hence also
allows us to change section and segment table offsets until we
finally write it.
Signed-off-by: Janosch Frank
---
dump/dump.c | 115 ++
include/sysemu/dump.h | 1 +
2 files c
Let's move to the new way of handling errors before changing the dump
code. This patch has mostly been generated by the coccinelle script
scripts/coccinelle/errp-guard.cocci.
Signed-off-by: Janosch Frank
---
dump/dump.c | 144 ++--
1 file changed,
Architectures already provide custom cpu data via elf notes but
there's currently no way for an architecture to add other custom data
to dumps.
s390x for instance needs to store special data in the dump when
dumping protected guests so the vm owner can decrypt the dump and
access the vm data.
Sim
On 10/3/22 06:21, Joel Stanley wrote:
In order to correctly report secure boot running firmware, these values
must be set. They are taken from a running machine when secure boot is
enabled.
We don't yet have documentation from ASPEED on what they mean. Set the
raw values for now, and in the futu
Add hooks which architectures can use to add arbitrary data to custom
sections.
Signed-off-by: Janosch Frank
---
dump/dump.c| 21 ++---
include/sysemu/dump-arch.h | 27 +++
2 files changed, 45 insertions(+), 3 deletions(-)
diff --git a/dum
This is the qemu part of the PV dump support where we take the data
that the KVM PV dump API gives us and put it into the ELF file for
later processing.
The encrypted PV cpu state is added as an additional note like the
other architecture registers.
The storage state and completion data however a
On 09.03.22 23:02, Jason A. Donenfeld wrote:
Hi Alex,
On Wed, Mar 9, 2022 at 3:10 AM Alexander Graf wrote:
The vmgenid driver basically works, though it is racy, because that ACPI
notification can arrive after the system is already running again. This
I believe enough people already pointed
From: Amir Gonnen
The implementation of eret will become much more complex
with the introduction of shadow registers.
Reviewed-by: Peter Maydell
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-3-amir.gon...@neuroblade.ai>
[rth: Split out of a larger patch for shadow register set
Time to add a bit more descriptiveness to the dumps.
Signed-off-by: Janosch Frank
---
dump/dump.c | 106 --
include/sysemu/dump.h | 1 +
2 files changed, 94 insertions(+), 13 deletions(-)
diff --git a/dump/dump.c b/dump/dump.c
index e4198e8f3e
We had failed to copy BSTATUS back to STATUS, and diagnose
supervisor-only. The spec is light on the specifics of the
implementation of bret, but it is an easy assumption that
the restore into STATUS should work the same as eret.
Therefore, reuse the existing helper_eret.
Reported-by: Peter Mayd
Signed-off-by: Janosch Frank
---
target/s390x/kvm/kvm.c | 7 +++
target/s390x/kvm/kvm_s390x.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 6acf14d5ec..56ca5408db 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target/s390x/kvm/kvm
We don't need to reference them often, and when we do it
is just as easy to load/store from cpu_env directly.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff -
Signed-off-by: Janosch Frank
---
linux-headers/linux/kvm.h | 55 +++
1 file changed, 55 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 00af3bc333..ead1d51cb5 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/lin
Sometimes dumping a guest from the outside is the only way to get the
data that is needed. This can be the case if a dumping mechanism like
KDUMP hasn't been configured or data needs to be fetched at a specific
point. Dumping a protected guest from the outside without help from
fw/hw doesn't yield
Drop the set of estatus in init_thread; it was clearly intended
to be setting the value of CR_STATUS for the application, but we
never actually performed that copy. However, the proper value is
set in nios2_cpu_reset so we don't need to do anything here.
We only initialize SP and EA in init_threa
Replace current uses of tcg_const_tl, and remove the frees.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 30 ++
1 file changed, 6 insertions(+), 24 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/transl
Introduce an interface over which we can get information about UV data.
Signed-off-by: Janosch Frank
---
hw/s390x/pv.c | 61 ++
hw/s390x/s390-virtio-ccw.c | 5
include/hw/s390x/pv.h | 10 +++
3 files changed, 76 insertions(+)
diff
The bulk of the general register set is undefined on reset.
The zero register is for the most part special-cased in translate,
but the slot is still exposed to gdbstub and nios2_cpu_dump_state,
so continue to make sure that's zeroed.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 6 +
From: Amir Gonnen
eret instruction is only allowed in supervisor mode.
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-2-amir.gon...@neuroblade.ai>
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 2 ++
There's nothing about EH that affects translation,
so there's no need to include it in tb->flags.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
From: Amir Gonnen
Split NUM_CORE_REGS into components that can be used elsewhere.
Reviewed-by: Peter Maydell
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-3-amir.gon...@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.]
Signed-off-by: Richard Henderson
Let's add a few bits of code which hide the new KVM PV dump API from
us via new functions.
Signed-off-by: Janosch Frank
---
hw/s390x/pv.c | 52 +++
include/hw/s390x/pv.h | 8 +++
2 files changed, 60 insertions(+)
diff --git a/hw/s390x/pv.c b/
Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions
This is the cpu side of the operation. Register one irq line,
called EIC. Split out the rather different processing to a
separate function.
Delay initialization of gpio irqs until realize. We need to
provide a window after init in which the board can set eic_present.
Signed-off-by: Richard Hen
On 10/3/22 10:18, Peter Maydell wrote:
On Tue, 8 Mar 2022 at 18:22, Philippe Mathieu-Daudé
wrote:
From: Philippe Mathieu-Daudé
The following changes since commit 9740b907a5363c06ecf61e08b21966a81eb0dab4:
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20220307' into
Use FIELD_DP32 instead of manual shifting and masking.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h| 4
target/nios2/helper.c | 37 ++---
2 files changed, 26 insertions(+), 15 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
Add all fields; retain the helper macros for single bit fields.
So far there are no uses of the multi-bit status fields.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/target/nios2/cpu.h b/
This has grown quite beyond merely implementing $SUBJECT,
which are only the last 8 patches of the set.
Version 5 addresses all of the feedback from v4, fixes some
further bugs in the base exception handling, implements
some missing exceptions.
r~
Amir Gonnen (5):
target/nios2: Check supervi
From: Amir Gonnen
Implement nios2 Vectored Interrupt Controller (VIC).
VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi
fields on Nios2CPU before raising an IRQ.
For that purpose, VIC has a "cpu" property which should refer to the
nios2 cpu and set by the board that connects VIC
Retain the helper macros for single bit fields as aliases to
the longer R_*_MASK names. Use FIELD_EX32 and FIELD_DP32
instead of manually manipulating the fields.
Since we're rewriting the references to CR_TLBACC_IGN_* anyway,
we correct the name of this field to IG, which is its name in
the offi
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation
of the fields.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 8
target/nios2/helper.c| 4 ++--
target/nios2/mmu.c | 17 +
target/nios2/translate.c | 2
Convert to contiguous allocation, as much as possible so far.
The two timer objects are not exposed for subobject allocation.
Reviewed-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
hw/nios2/10m50_devboard.c | 30 --
1 file changed, 16 insertions(+), 14 de
Whether the cpu is in user-mode or not is something that we
know at translation-time. We do not need to generate code
after having raised an exception.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 20 +++
These symbols become available to the debugger.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 72 ++
1 file changed, 35 insertions(+), 37 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 7
WE is the architectural name of the field, not WR.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h| 2 +-
target/nios2/helper.c | 4 ++--
target/nios2/mmu.c| 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 25b77
On Thu, Mar 10, 2022 at 03:11:08PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
> wrote:
>
> > On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
> > > On 07/03/2022 11.06, Daniel P. Berrangé wrote:
> > > > On Mon, Mar 07, 2022 at 02:51:23
Decode 'break 1' during translation, rather than doing
it again during exception processing.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/helper.c| 14 ++
target/nios2/translate.c | 17 -
3 files ch
Split out do_exception and do_iic_irq to handle bulk of the interrupt and
exception processing. Parameterize the changes required to cpu state.
The status.EH bit, which protects some data against double-faults,
is only present with the MMU. Several exception cases did not check
for status.EH bei
It is cleaner to have a separate name for this variable.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 10 +++-
linux-user/elfload.c| 2 +-
linux-user/nios2/cpu_loop.c | 17 ++---
linux-user/nios2/signal.c | 6 ++---
target
Constrain all references to cpu_R[] to load_gpr and dest_gpr.
This will be required for supporting shadow register sets.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 153 ++-
1 file changed, 55 insertions(+), 98 d
Performing this early means that we can merge more cases
within the non-logging switch statement.
Signed-off-by: Richard Henderson
---
target/nios2/helper.c | 58 +++
1 file changed, 47 insertions(+), 11 deletions(-)
diff --git a/target/nios2/helper.c b/t
This function is unused. The real computation of this value
is located in nios2_cpu_exec_interrupt.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 9be128d63
Place the control registers into their own array, env->ctrl[].
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 43
target/nios2/cpu.c | 19 +++
target/nios2/helper.c| 106 +++
target/
Copy the existing cpu_index into the space reserved for CR_CPUID.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index ce2b0c6493..d491360973 100644
--- a/target/n
Unaligned traps are optional, but required with an mmu.
Turn them on always, because the fallback behaviour is not
documented (though presumably it discards low bits).
Enable alignment checks in the config file.
Unwind the guest pc properly from do_unaligned_access.
Signed-off-by: Richard Henders
Depending on the reason for ending the TB, we can chain
to the next TB because the PC is constant.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 51907
Create an array of masks which detail the writable and readonly
bits for each control register. Apply them when writing to
control registers, including the write to status during eret.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 13 ++
target/nios2/cpu.c | 94 +
Use FIELD_EX32 and FIELD_DP32 instead of managing the
masking by hand.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 29 +++--
target/nios2/helper.c| 7 ++-
target/nios2/mmu.c | 35 +--
target/nios2/translat
These misaligned data and misaligned destination exceptions
are defined, but not currently raised.
Signed-off-by: Richard Henderson
---
target/nios2/helper.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/nios2/helper.c b/target/nios2/helper.c
index 285f3aae1d..0392c0ea84 100
From: Amir Gonnen
Demonstrate how to use nios2 VIC on a machine.
Introduce a new machine property to attach a VIC.
When VIC is present, let the CPU know that it should use the
External Interrupt Interface instead of the Internal Interrupt Interface.
The devices on the machine are attached to the
Without EIC, this bit is RES1. So set the bit at reset,
and add it to the readonly fields of CR_STATUS.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/nios2/cpu.c b/target/nios2/
Division may (optionally) raise a division exception.
Since the linux kernel has been prepared for this for
some time, enable it by default.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 ++
target/nios2/helper.h | 2 ++
linux-user/nios2/cpu_loop.c | 4 +++
target
The register is entirely read-only for software, and we do not
implement ECC, so we need not deposit the cause into an existing
value; just create a new value from scratch.
Furthermore, exception.CAUSE is not written for break exceptions.
Signed-off-by: Richard Henderson
---
target/nios2/helper
Thomas Huth writes:
> On 10/03/2022 11.34, Alex Bennée wrote:
>> Thomas Huth writes:
>>
>>> On 09/03/2022 12.22, Alex Bennée wrote:
With -cpu max we get a warning:
qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
But dropping the -cpu max and it still runs fine.
>>
On 10/03/2022 12.35, Daniel P. Berrangé wrote:
On Thu, Mar 10, 2022 at 03:11:08PM +0400, Marc-André Lureau wrote:
Hi
On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
wrote:
On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
On 07/03/2022 11.06, Daniel P. Berrangé wrote:
On Mon,
The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any
exception with EH=0, or so says Table 42 (Processor Status After
Taking Exception).
We currently do not set PERM or BAD at all, and only set/clear
DBL for tlb miss, and do not clear DBL for any other exception.
It is a bit confus
Split out a function to perform an indirect branch.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index d5f2e98de9..f61ba92052 100
On Thu, 10 Mar 2022 at 11:27, Richard Henderson
wrote:
>
> We had failed to copy BSTATUS back to STATUS, and diagnose
> supervisor-only. The spec is light on the specifics of the
> implementation of bret, but it is an easy assumption that
> the restore into STATUS should work the same as eret.
>
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