Re: [PATCH v15 3/8] net/vmnet: implement shared mode (vmnet-shared)

On Tue, Mar 1, 2022 at 8:52 AM Akihiko Odaki wrote: > On 2022/02/28 20:59, Vladislav Yaroshchuk wrote: > > > > > > On Sat, Feb 26, 2022 at 3:27 PM Akihiko Odaki > > wrote: > > > > On Sat, Feb 26, 2022 at 8:33 PM Vladislav Yaroshchuk > > >

Re: [PATCH v15 3/8] net/vmnet: implement shared mode (vmnet-shared)

On 2022/03/01 17:09, Vladislav Yaroshchuk wrote: > Not sure that only one field is enough, cause > we may have two states on bh execution start: > 1. There are packets in vmnet buffer s->packets_buf >      that were rejected by qemu_send_async and waiting >      to be sen

Re: [PATCH] ppc/pnv: fix default PHB4 QOM hierarchy

On 2/28/22 14:51, Daniel Henrique Barboza wrote: On 2/26/22 10:49, Cédric Le Goater wrote: On 2/18/22 21:28, Daniel Henrique Barboza wrote: Commit 3f4c369ea63e ("ppc/pnv: make PECs create and realize PHB4s") changed phb4_pec code to create the default PHB4 objects in pnv_pec_default_phb_reali

Re: [PATCH v14 0/4] PMU-EBB support for PPC64 TCG

On 2/25/22 11:11, Daniel Henrique Barboza wrote: Hi, This new version contains a change suggested by Richard in patch 4. No function change was made. Changes from v13: - patch 1: * added Richard's r-b - patch 4: * renamed helper_ebb_perfm_excp() to raise_ebb_perfm_exception(). The fu

Re: [PATCH v5 00/49] target/ppc: PowerISA Vector/VSX instruction batch

On 2/25/22 22:08, matheus.fe...@eldorado.org.br wrote: From: Matheus Ferst This patch series implements 5 missing instructions from PowerISA v3.0 and 58 new instructions from PowerISA v3.1, moving 87 other instructions to decodetree along the way. Patches without review: 4, 24, 26, 27, 34, 35,

Re: [PATCH v2 05/22] hw/ppc/pnv: Determine ns16550's IRQ number from QOM property

On 2/27/22 23:17, Philippe Mathieu-Daudé wrote: On 22/2/22 20:34, Bernhard Beschow wrote: Determine the IRQ number in the same way as for isa-ipmi-bt. This resolves the last usage of ISADevice::isairq[] which allows it to be removed. Signed-off-by: Bernhard Beschow ---   hw/ppc/pnv.c | 5 -

[PATCH v2 00/25] migration: Postcopy Preemption

This is v2 of postcopy preempt series. It can also be found here: https://github.com/xzpeter/qemu/tree/postcopy-preempt RFC: https://lore.kernel.org/qemu-devel/20220119080929.39485-1-pet...@redhat.com V1: https://lore.kernel.org/qemu-devel/20220216062809.57179-1-pet...@redhat.com v1->v2 chan

[PATCH v2 01/25] migration: Dump sub-cmd name in loadvm_process_command tp

It'll be easier to read the name rather than index of sub-cmd when debugging. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/savevm.c | 3 ++- migration/trace-events | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/migration/savevm.c b/migrat

[PATCH v2 02/25] migration: Finer grained tracepoints for POSTCOPY_LISTEN

The enablement of postcopy listening has a few steps, add a few tracepoints to be there ready for some basic measurements for them. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/savevm.c | 9 - migration/trace-events | 2 +- 2 files changed, 9 insertions(

[PATCH v2 04/25] migration: Introduce postcopy channels on dest node

Postcopy handles huge pages in a special way that currently we can only have one "channel" to transfer the page. It's because when we install pages using UFFDIO_COPY, we need to have the whole huge page ready, it also means we need to have a temp huge page when trying to receive the whole content

[PATCH v2 03/25] migration: Tracepoint change in postcopy-run bottom half

Remove the old two tracepoints and they're even near each other: trace_loadvm_postcopy_handle_run_cpu_sync() trace_loadvm_postcopy_handle_run_vmstart() Add trace_loadvm_postcopy_handle_run_bh() with a finer granule trace. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu ---

[PATCH v2 06/25] migration: Add postcopy_thread_create()

Postcopy create threads. A common manner is we init a sem and use it to sync with the thread. Namely, we have fault_thread_sem and listen_thread_sem and they're only used for this. Make it a shared infrastructure so it's easier to create yet another thread. Reviewed-by: Dr. David Alan Gilbert S

[PATCH v2 05/25] migration: Dump ramblock and offset too when non-same-page detected

In ram_load_postcopy() we'll try to detect non-same-page case and dump error. This error is very helpful for debugging. Adding ramblock & offset into the error log too. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/ram.c | 8 ++-- 1 file changed, 6 insertions(+)

[PATCH v2 12/25] migration: Export ram_load_postcopy()

Will be reused in postcopy fast load thread. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/ram.c | 2 +- migration/ram.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/migration/ram.c b/migration/ram.c index f1de1a06e4..5cb5dfc2cc 100644 --- a/m

[PATCH v2 08/25] migration: Add pss.postcopy_requested status

This boolean flag shows whether the current page during migration is triggered by postcopy or not. Then in ram_save_host_page() and deeper stack we'll be able to have a reference on the priority of this page. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/ram.c | 6 +

[PATCH v2 10/25] migration: Enlarge postcopy recovery to capture !-EIO too

We used to have quite a few places making sure -EIO happened and that's the only way to trigger postcopy recovery. That's based on the assumption that we'll only return -EIO for channel issues. It'll work in 99.99% cases but logically that won't cover some corner cases. One example is e.g. ram_bl

[PATCH v2 07/25] migration: Move static var in ram_block_from_stream() into global

Static variable is very unfriendly to threading of ram_block_from_stream(). Move it into MigrationIncomingState. Make the incoming state pointer to be passed over to ram_block_from_stream() on both caller sites. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/migratio

[PATCH v2 14/25] migration: Add migration_incoming_transport_cleanup()

Add a helper to cleanup the transport listener. When do it, we should also null-ify the cleanup hook and the data, then it's even safe to call it multiple times. Move the socket_address_list cleanup altogether, because that's a mirror of the listener channels and only for the purpose of query-mig

[PATCH v2 24/25] tests: Add postcopy preempt test

Two tests are added: a normal postcopy preempt test, and a recovery test. Signed-off-by: Peter Xu --- tests/qtest/migration-test.c | 41 ++-- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c

[PATCH v2 13/25] migration: Move channel setup out of postcopy_try_recover()

We used to use postcopy_try_recover() to replace migration_incoming_setup() to setup incoming channels. That's fine for the old world, but in the new world there can be more than one channels that need setup. Better move the channel setup out of it so that postcopy_try_recover() only handles the

[PATCH v2 09/25] migration: Move migrate_allow_multifd and helpers into migration.c

This variable, along with its helpers, is used to detect whether multiple channel will be supported for migration. In follow up patches, there'll be other capability that requires multi-channels. Hence move it outside multifd specific code and make it public. Meanwhile rename it from "multifd" t

[PATCH v2 21/25] migration: Parameter x-postcopy-preempt-break-huge

Add a parameter that can conditionally disable the "break sending huge page" behavior in postcopy preemption. By default it's enabled. It should only be used for debugging purposes, and we should never remove the "x-" prefix. Signed-off-by: Peter Xu --- migration/migration.c | 2 ++ migration/

[PATCH v2 15/25] migration: Allow migrate-recover to run multiple times

Previously migration didn't have an easy way to cleanup the listening transport, migrate recovery only allows to execute once. That's done with a trick flag in postcopy_recover_triggered. Now the facility is already there. Drop postcopy_recover_triggered and instead allows a new migrate-recover

[PATCH v2 22/25] migration: Add helpers to detect TLS capability

Add migrate_tls_enabled() to detect whether TLS is configured. Add migrate_channel_requires_tls() to detect whether the specific channel requires TLS. No functional change intended. Signed-off-by: Peter Xu --- migration/channel.c | 10 ++ migration/migration.c | 17 +

[PATCH v2 11/25] migration: postcopy_pause_fault_thread() never fails

Per the title, remove the return code and simplify the callers as the errors will never be triggered. No functional change intended. Reviewed-by: Dr. David Alan Gilbert Signed-off-by: Peter Xu --- migration/postcopy-ram.c | 25 - 1 file changed, 4 insertions(+), 21 dele

[PATCH v2 17/25] migration: Postcopy preemption preparation on channel creation

Create a new socket for postcopy to be prepared to send postcopy requested pages via this specific channel, so as to not get blocked by precopy pages. A new thread is also created on dest qemu to receive data from this new channel based on the ram_load_postcopy() routine. The ram_load_postcopy(PO

[PATCH v2 23/25] migration: Fail postcopy preempt with TLS for now

The support is not yet there. Temporarily fail it properly when starting postcopy until it's supported. Fail at postcopy-start still allows the user to proceed with e.g. pure tls precopy even if postcopy-ram is set. Signed-off-by: Peter Xu --- migration/migration.c | 6 ++ 1 file changed,

[PATCH v2 16/25] migration: Add postcopy-preempt capability

Firstly, postcopy already preempts precopy due to the fact that we do unqueue_page() first before looking into dirty bits. However that's not enough, e.g., when there're host huge page enabled, when sending a precopy huge page, a postcopy request needs to wait until the whole huge page that is sen

Re: [PATCH] hw/arm/virt: Fix CPU's default NUMA node ID

Hi Igor, On 2/28/22 6:54 PM, Igor Mammedov wrote: On Mon, 28 Feb 2022 12:26:53 +0800 Gavin Shan wrote: On 2/25/22 6:03 PM, Igor Mammedov wrote: On Fri, 25 Feb 2022 16:41:43 +0800 Gavin Shan wrote: On 2/17/22 10:14 AM, Gavin Shan wrote: On 1/26/22 5:14 PM, Igor Mammedov wrote: On Wed, 26 J

Re: [PATCH] target/riscv: fix inverted checks for ext_zb[abcs]

On Tue, 1 Mar 2022 at 02:28, Vineet Gupta wrote: > Hi Alistair, > > On 2/3/22 16:59, Alistair Francis wrote: > > On Fri, Feb 4, 2022 at 1:42 AM Philipp Tomsich > wrote: > >> > >> While changing to the use of cfg_ptr, the conditions for > REQUIRE_ZB[ABCS] > >> inadvertently became inverted and sl

[PATCH v2 25/25] tests: Pass in MigrateStart** into test_migrate_start()

test_migrate_start() will release the MigrateStart structure that passed in, however that's not super clear to the caller because after the call returned the pointer can still be referenced by the callers. It can easily be a source of use-after-free. Let's pass in a double pointer of that, then w

[PATCH v2 18/25] migration: Postcopy preemption enablement

This patch enables postcopy-preempt feature. It contains two major changes to the migration logic: (1) Postcopy requests are now sent via a different socket from precopy background migration stream, so as to be isolated from very high page request delays. (2) For huge page enabled hosts:

[PATCH v2 19/25] migration: Postcopy recover with preempt enabled

To allow postcopy recovery, the ram fast load (preempt-only) dest QEMU thread needs similar handling on fault tolerance. When ram_load_postcopy() fails, instead of stopping the thread it halts with a semaphore, preparing to be kicked again when recovery is detected. A mutex is introduced to make

[PATCH] tests/Makefile.include: Let "make clean" remove the TCG tests, too

"make clean" should clear all binaries that have been built, but so far it left the TCG tests still in place. Let's make sure that they are now removed, too. Signed-off-by: Thomas Huth --- tests/Makefile.include | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/Makefile.i

Re: What is the correct way to handle the VirtIO config space in vhost-user?

On Mon, Feb 28, 2022 at 04:44:47PM +, Peter Maydell wrote: > On Mon, 28 Feb 2022 at 16:32, Alex Bennée wrote: > > Stefan Hajnoczi writes: > > > On Fri, Feb 25, 2022 at 05:32:43PM +, Alex Bennée wrote: > > >> (aside: this continues my QOM confusion about when things should be in a > > >> c

Re: [PATCH] vhost-vsock: detach the virqueue element in case of error

On Mon, Feb 28, 2022 at 10:50:58AM +0100, Stefano Garzarella wrote: > In vhost_vsock_common_send_transport_reset(), if an element popped from > the virtqueue is invalid, we should call virtqueue_detach_element() to > detach it from the virtqueue before freeing its memory. > > Fixes: fc0b9b0e1c ("v

Re: [PATCH] hw/arm/virt: Validate memory size on the first NUMA node

Hi Igor, On 2/28/22 5:08 PM, Igor Mammedov wrote: On Mon, 28 Feb 2022 15:52:03 +0800 Gavin Shan wrote: When the memory size on the first NUMA node is less than 128MB, the guest hangs inside EDK2 as the following logs show. /home/gavin/sandbox/qemu.main/build/qemu-system-aarch64 \

[PATCH v2 20/25] migration: Create the postcopy preempt channel asynchronously

This patch allows the postcopy preempt channel to be created asynchronously. The benefit is that when the connection is slow, we won't take the BQL (and potentially block all things like QMP) for a long time without releasing. A function postcopy_preempt_wait_channel() is introduced, allowing the

Re: [PATCH 1/5] crypto: perform permission checks under BQL

Am 09.02.2022 um 11:54 hat Emanuele Giuseppe Esposito geschrieben: > Move the permission API calls into driver-specific callbacks > that always run under BQL. In this case, bdrv_crypto_luks > needs to perform permission checks before and after > qcrypto_block_amend_options(). The problem is that th

Re: [PATCH v2 00/25] migration: Postcopy Preemption

On Tue, Mar 01, 2022 at 04:39:00PM +0800, Peter Xu wrote: > This is v2 of postcopy preempt series. It can also be found here: > > https://github.com/xzpeter/qemu/tree/postcopy-preempt > > RFC: > https://lore.kernel.org/qemu-devel/20220119080929.39485-1-pet...@redhat.com > V1: > https://lore

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Mon, 28 Feb 2022 22:17:32 +0200 Liav Albani wrote: > This can allow the guest OS to determine more easily if i8042 controller > is present in the system or not, so it doesn't need to do probing of the > controller, but just initialize it immediately, before enumerating the > ACPI AML namespace

[PATCH] tests/tcg/s390x: Fix the exrl-trt* tests with Clang

The exrl-trt* tests use two pre-initialized variables for the results of the assembly code: uint64_t r1 = 0xull; uint64_t r2 = 0xull; But then the assembly code copies over the full contents of the register into the output variable, without taking care of t

Re: [PATCH] aio-posix: fix spurious ->poll_ready() callbacks in main loop

On Wed, Feb 23, 2022 at 03:57:03PM +, Stefan Hajnoczi wrote: > When ->poll() succeeds the AioHandler is placed on the ready list with > revents set to the magic value 0. This magic value causes > aio_dispatch_handler() to invoke ->poll_ready() instead of ->io_read() > for G_IO_IN or ->io_write(

[PATCH] tests/tcg/s390x: Fix mvc, mvo and pack tests with Clang

These instructions use addressing with a "base address", meaning that if register r0 is used, it is always treated as zero, no matter what value is stored in the register. So we have to make sure not to use register r0 for these instructions in our tests. There was no problem with GCC so far since

Re: [PATCH] tests/tcg/s390x: Fix the exrl-trt* tests with Clang

On 01.03.22 10:24, Thomas Huth wrote: > The exrl-trt* tests use two pre-initialized variables for the > results of the assembly code: > > uint64_t r1 = 0xull; > uint64_t r2 = 0xull; > > But then the assembly code copies over the full contents > of the regis

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Tue, 1 Mar 2022 08:29:05 +0530 (IST) Ani Sinha wrote: > On Mon, 28 Feb 2022, Liav Albani wrote: > > > This can allow the guest OS to determine more easily if i8042 controller > > is present in the system or not, so it doesn't need to do probing of the > > controller, but just initialize it im

[PULL 01/18] tests/docker: restore TESTS/IMAGES filtering

This was broken in the re-factor: e86c9a64f4 ("tests/docker/Makefile.include: add a generic docker-run target") Rather than unwind the changes just apply the filters to the total set of available images and tests. That way we don't inadvertently build images only not to use them later. Signed-

Re: [PATCH] tests/tcg/s390x: Fix mvc, mvo and pack tests with Clang

On 01.03.22 10:39, Thomas Huth wrote: > These instructions use addressing with a "base address", meaning > that if register r0 is used, it is always treated as zero, no matter > what value is stored in the register. So we have to make sure not > to use register r0 for these instructions in our test

[PULL 00/18] testing and semihosting updates

The following changes since commit fa435db8ce1dff3b15e3f59a12f55f7b3a347b08: Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' into staging (2022-02-24 12:48:14 +) are available in the Git repository at: https://github.com/stsquad/qemu.git tags/pull-testing-an

[PULL 03/18] tests/lcitool: update to latest version

We will need an update shortly for some new images. Signed-off-by: Alex Bennée Message-Id: <20220225172021.3493923-4-alex.ben...@linaro.org> diff --git a/tests/docker/dockerfiles/opensuse-leap.docker b/tests/docker/dockerfiles/opensuse-leap.docker index 1b78d8369a..e1ad9434a3 100644 --- a/tests

Re: [PATCH v2 10/14] vdpa: Add custom IOTLB translations to SVQ

On Mon, Feb 28, 2022 at 8:37 AM Jason Wang wrote: > > > 在 2022/2/27 下午9:41, Eugenio Pérez 写道: > > Use translations added in VhostIOVATree in SVQ. > > > > Only introduce usage here, not allocation and deallocation. As with > > previous patches, we use the dead code paths of shadow_vqs_enabled to >

[PULL 15/18] gitlab: upgrade the job definition for s390x to 20.04

The new s390x machine has more of everything including the OS. As 18.04 will soon be going we might as well get onto something moderately modern. Signed-off-by: Alex Bennée Acked-by: Christian Borntraeger Reviewed-by: Thomas Huth Acked-by: Cornelia Huck Reviewed-by: Philippe Mathieu-Daudé Cc:

[PULL 02/18] tests/docker: add NOUSER for alpine image

The alpine image doesn't have a standard useradd binary so disable this convenience feature for it. Signed-off-by: Alex Bennée Reviewed-by: Daniel P. Berrangé Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-3-alex.ben...@linaro.org> diff --git a/tests/docker/Makefile.include

[PULL 10/18] tests/tcg/ppc64: clean-up handling of byte-reverse

Rather than having an else leg for the missing compiler case we can simply just not add the test - the same way as is done for ppc64le. Also while we are at it fix up the compiler invocation. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-11-alex.be

Re: [PATCH 1/3] util & iothread: Introduce event-loop abstract class

On Mon, Feb 28, 2022 at 08:05:52PM +0100, Nicolas Saenz Julienne wrote: > On Thu, 2022-02-24 at 09:48 +, Stefan Hajnoczi wrote: > > On Mon, Feb 21, 2022 at 06:08:43PM +0100, Nicolas Saenz Julienne wrote: > > > diff --git a/qom/meson.build b/qom/meson.build > > > index 062a3789d8..c20e5dd1cb 100

[PULL 11/18] tests/tcg: build sha1-vector with O3 and compare

The aim of this is to test code generation for vectorised operations. Unfortunately gcc struggles to do much with the messy sha1 code (try -fopt-info-vec-missed to see why). However it's better than nothing. We assume the non-vectorised output is gold and baring compiler bugs the outputs should ma

[PULL 04/18] tests/docker: update debian-arm64-cross with lcitool

Using lcitool update debian-arm64-cross to a Debian 11 based system. As a result we can drop debian-arm64-test-cross just for building tests. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-5-alex.ben...@linaro.org> diff --git a/.gitlab-ci.d/contain

[PULL 14/18] travis.yml: Update the s390x jobs to Ubuntu Focal

From: Thomas Huth QEMU will soon drop the support for Ubuntu 18.04, so let's update the Travis jobs that were still using this version to 20.04 instead. While we're at it, also remove an obsolete comment about Ubuntu Xenial being the default for our Travis jobs. Signed-off-by: Thomas Huth Sign

[PULL 05/18] tests/docker: update debian-s390x-cross with lcitool

A later compiler is needed for some upcomming tests so we might as well migrate to an lcitool generated docker file. Signed-off-by: Alex Bennée Cc: David Hildenbrand Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-6-alex.ben...@linaro.org> diff --git a/.gitlab-ci.d/container

[PULL 13/18] tests/tcg: add vectorised sha512 versions

This builds vectorised versions of sha512 to exercise the vector code: - aarch64 (AdvSimd) - i386 (SSE) - s390x (MVX) - ppc64/ppc64le (power10 vectors) Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-14-alex.ben...@linaro.org> diff --git a/

[PULL 08/18] scripts/ci: allow for a secondary runner

Some HW can run multiple architecture profiles so we can install a secondary runner to build and run tests for those profiles. This allows setting up secondary service. Signed-off-by: Alex Bennée Acked-by: Richard Henderson Message-Id: <20220225172021.3493923-9-alex.ben...@linaro.org> diff --gi

[PULL 06/18] tests/docker: introduce debian-riscv64-test-cross

Cross building QEMU for riscv64 still involves messing about with sid and ports. However for building tests we can have a slimmer compiler only container which should be more stable. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-7-alex.ben...@linar

[PULL 07/18] scripts/ci: add build env rules for aarch32 on aarch64

At least the current crop of Aarch64 HW can support running 32 bit EL0 code. Before we can build and test we need a minimal set of packages installed. We can't use "apt build-dep" because it currently gets confused trying to keep two sets of build-deps installed at once. Instead we install a minima

[PULL 09/18] gitlab: add a new aarch32 custom runner definition

Although running on aarch64 hardware we can still target 32bit builds with a cross compiler and run the resulting binaries. Signed-off-by: Alex Bennée Message-Id: <20220225172021.3493923-10-alex.ben...@linaro.org> diff --git a/docs/devel/ci-jobs.rst.inc b/docs/devel/ci-jobs.rst.inc index db3f571

[PULL 12/18] tests/tcg: add sha512 test

This imports the sha512 algorithm and related tests from ccan which offers a cleaner hash implementation with its own validation tests with which we can exercise TCG code generations. Signed-off-by: Alex Bennée Acked-by: Richard Henderson Message-Id: <20220225172021.3493923-13-alex.ben...@linaro

[PULL 17/18] semihosting/arm-compat: replace heuristic for softmmu SYS_HEAPINFO

The previous numbers were a guess at best and rather arbitrary without taking into account anything that might be loaded. Instead of using guesses based on the state of registers implement a new function that: a) scans the MemoryRegions for the largest RAM block b) iterates through all "ROM" blo

[PULL 16/18] tests/tcg: completely disable threadcount for sh4

The previous disabling of threadcount 3bdc19af00 ("tests/tcg/sh4: disable another unreliable test") just for plugins was being too conservative. It's all broken so skip it. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-17-alex.ben...@linaro.org> d

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Tue, 1 Mar 2022, Igor Mammedov wrote: > On Mon, 28 Feb 2022 22:17:32 +0200 > Liav Albani wrote: > > > This can allow the guest OS to determine more easily if i8042 controller > > is present in the system or not, so it doesn't need to do probing of the > > controller, but just initialize it

[PULL 18/18] tests/tcg: port SYS_HEAPINFO to a system test

This allows us to check our new SYS_HEAPINFO implementation generates sane values. Signed-off-by: Alex Bennée Reviewed-by: Peter Maydell Message-Id: <20220225172021.3493923-19-alex.ben...@linaro.org> diff --git a/tests/tcg/aarch64/system/semiheap.c b/tests/tcg/aarch64/system/semiheap.c new fil

Re: [PATCH v2 00/25] migration: Postcopy Preemption

On Tue, Mar 01, 2022 at 06:17:49PM +0800, Peter Xu wrote: > On Tue, Mar 01, 2022 at 09:25:55AM +, Daniel P. Berrangé wrote: > > On Tue, Mar 01, 2022 at 04:39:00PM +0800, Peter Xu wrote: > > > This is v2 of postcopy preempt series. It can also be found here: > > > > > > https://github.com/xz

Re: [PATCH v2 04/18] tests/docker: update debian-arm64-cross with lci-tool

On Mon, Feb 28, 2022 at 02:39:17PM +, Alex Bennée wrote: > > Daniel P. Berrangé writes: > > > $SUBJECT =~ s/lci-tool/lcitool/ > > > > On Fri, Feb 25, 2022 at 05:20:07PM +, Alex Bennée wrote: > >> Using lci-tool update debian-arm64-cross to a Debian 11 based system. > > > > Likewise > >

Re: [PATCH v2 08/14] util: Add iova_tree_alloc

On Mon, Feb 28, 2022 at 7:39 AM Jason Wang wrote: > > > 在 2022/2/27 下午9:41, Eugenio Pérez 写道: > > This iova tree function allows it to look for a hole in allocated > > regions and return a totally new translation for a given translated > > address. > > > > It's usage is mainly to allow devices to

Re: [PATCH v2 00/25] migration: Postcopy Preemption

On Tue, Mar 01, 2022 at 09:25:55AM +, Daniel P. Berrangé wrote: > On Tue, Mar 01, 2022 at 04:39:00PM +0800, Peter Xu wrote: > > This is v2 of postcopy preempt series. It can also be found here: > > > > https://github.com/xzpeter/qemu/tree/postcopy-preempt > > > > RFC: > > https://lore.ker

Re: [PATCH v7 3/4] tests/tcg/s390x: Tests for Miscellaneous-Instruction-Extensions Facility 3

On 28/02/2022 19.31, David Miller wrote: Had it on my TODO list for this morning, thank you. Thanks! Please send it as additional patch on top of my s390x-next, since I already sent a pull request for the other patches yesterday: https://gitlab.com/thuth/qemu/-/commits/s390x-next/ On Mon,

Re: [PATCH 0/5] block layer: permission API refactoring in preparation

Am 09.02.2022 um 11:54 hat Emanuele Giuseppe Esposito geschrieben: > This serie aims to refactoring and fixing permission API related bugs that > came > up in the serie "block layer: split block APIs in global state and I/O". > In that serie, we are splitting all block layer headers in > Global St

Re: [PULL 0/7] aspeed queue

On Mon, 28 Feb 2022 at 07:12, Cédric Le Goater wrote: > > The following changes since commit c13b8e9973635f34f3ce4356af27a311c993729c: > > Merge remote-tracking branch > 'remotes/alistair/tags/pull-riscv-to-apply-20220216' into staging (2022-02-16 > 09:57:11 +) > > are available in the Git

[PATCH v2 0/6] hw/nvme: enhanced protection information (64-bit guard)

From: Klaus Jensen This adds support for one possible new protection information format introduced in TP4068 (and integrated in NVMe 2.0): the 64-bit CRC guard and 48-bit reference tag. This version does not support storage tags. Like the CRC16 support already present, this uses a software imple

[PATCH v2 1/6] hw/nvme: move dif/pi prototypes into dif.h

From: Klaus Jensen Move dif/pi data structures and inlines to dif.h. Reviewed-by: Keith Busch Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 1 + hw/nvme/dif.c | 1 + hw/nvme/dif.h | 53 ++ hw/nvme/nvme.h | 50 -

[PATCH v2 5/6] hw/nvme: add pi tuple size helper

From: Klaus Jensen A subsequent patch will introduce a new tuple size; so add a helper and use that instead of sizeof() and magic numbers. Reviewed-by: Keith Busch Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 14 -- hw/nvme/dif.c | 16 hw/nvme/dif.h | 5 +++

[PATCH v2 6/6] hw/nvme: 64-bit pi support

From: Naveen Nagar This adds support for one possible new protection information format introduced in TP4068 (and integrated in NVMe 2.0): the 64-bit CRC guard and 48-bit reference tag. This version does not support storage tags. Like the CRC16 support already present, this uses a software imple

[PATCH v2 3/6] hw/nvme: move format parameter parsing

From: Klaus Jensen There is no need to extract the format command parameters for each namespace. Move it to the entry point. Reviewed-by: Keith Busch Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 31 ++- 1 file changed, 18 insertions(+), 13 deletions(-) diff --

[PATCH v2 2/6] hw/nvme: add host behavior support feature

From: Naveen Nagar Add support for getting and setting the Host Behavior Support feature. Reviewed-by: Keith Busch Signed-off-by: Naveen Nagar Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 8 hw/nvme/nvme.h | 4 +++- include/block/nvme.h | 9 + 3 files changed

[PATCH v2 4/6] hw/nvme: add support for the lbafee hbs feature

From: Naveen Nagar Add support for up to 64 LBA formats through the LBAFEE field of the Host Behavior Support feature. Reviewed-by: Keith Busch Signed-off-by: Naveen Nagar Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 34 +++--- hw/nvme/ns.c | 15

Re: [PATCH v2 00/25] migration: Postcopy Preemption

On Tue, Mar 01, 2022 at 10:27:10AM +, Daniel P. Berrangé wrote: > > I also didn't know whether there's other limitations of it. For example, > > will a new socket pair be a problem for any VM environment (either a > > limitation from the management app, container, and so on)? I think it's > >

Re: [PATCH v2 03/14] vhost: Add Shadow VirtQueue call forwarding capabilities

On Mon, Feb 28, 2022 at 4:18 AM Jason Wang wrote: > > > 在 2022/2/27 下午9:41, Eugenio Pérez 写道: > > This will make qemu aware of the device used buffers, allowing it to > > write the guest memory with its contents if needed. > > > > Signed-off-by: Eugenio Pérez > > --- > > hw/virtio/vhost-shadow-

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Tue, Mar 01, 2022 at 09:43:54AM +0100, Igor Mammedov wrote: > On Mon, 28 Feb 2022 22:17:32 +0200 > Liav Albani wrote: > > > This can allow the guest OS to determine more easily if i8042 controller > > is present in the system or not, so it doesn't need to do probing of the > > controller, but

Re: [PATCH v4 3/3] tests/acpi: i386: update FACP table differences

On Tue, Mar 01, 2022 at 08:29:57AM +0530, Ani Sinha wrote: > > > On Mon, 28 Feb 2022, Liav Albani wrote: > > > After changing the IAPC boot flags register to indicate support of i8042 > > in the machine chipset to help the guest OS to determine its existence > > "faster", we need to have the upd

Re: [PATCH v7 02/31] main loop: macros to mark GS and I/O functions

Am 11.02.2022 um 15:51 hat Emanuele Giuseppe Esposito geschrieben: > Righ now, IO_CODE and IO_OR_GS_CODE are nop, as there isn't > really a way to check that a function is only called in I/O. > On the other side, we can use qemu_in_main_thread to check if > we are in the main loop. > > Signed-off-

Re: [PATCH v9 3/3] qapi/monitor: allow VNC display id in set/expire_password

* Fabian Ebner (f.eb...@proxmox.com) wrote: > From: Stefan Reiter > > It is possible to specify more than one VNC server on the command line, > either with an explicit ID or the auto-generated ones à la "default", > "vnc2", "vnc3", ... > > It is not possible to change the password on one of thes

Re: [PATCH v2 00/14] vDPA shadow virtqueue

On Mon, Feb 28, 2022 at 3:32 AM Jason Wang wrote: > > On Sun, Feb 27, 2022 at 9:42 PM Eugenio Pérez wrote: > > > > This series enable shadow virtqueue (SVQ) for vhost-vdpa devices. This > > is intended as a new method of tracking the memory the devices touch > > during a migration process: Instea

Re: [PATCH] hw/arm/virt: Validate memory size on the first NUMA node

Hi, > > Unless it architecturally wrong thing i.e. (node size less than 128Mb) > > ,in which case limiting it in QEMU would be justified, I'd prefer > > firmware being fixed or it reporting more useful for user error message. > > [include EDK2 developers] > > I don't think 128MB node memory si

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Tue, 1 Mar 2022 06:19:51 -0500 "Michael S. Tsirkin" wrote: > On Tue, Mar 01, 2022 at 09:43:54AM +0100, Igor Mammedov wrote: > > On Mon, 28 Feb 2022 22:17:32 +0200 > > Liav Albani wrote: > > > > > This can allow the guest OS to determine more easily if i8042 controller > > > is present in t

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Tue, 1 Mar 2022 15:22:17 +0530 (IST) Ani Sinha wrote: > On Tue, 1 Mar 2022, Igor Mammedov wrote: > > > On Mon, 28 Feb 2022 22:17:32 +0200 > > Liav Albani wrote: > > > > > This can allow the guest OS to determine more easily if i8042 controller > > > is present in the system or not, so it d

Re: Portable inline asm to get address of TLS variable

* Stefan Hajnoczi: >> But going against ABI and toolchain in this way is really no long-term >> solution. You need to switch to stackless co-routines, or we need to >> provide proper ABI-level support for this. Today it's the thread >> pointer, tomorrow it's the shadow stack pointer, and the day

[PATCH v8 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64

- add aes64dsm, aes64ds, aes64im, aes64es, aes64esm, aes64ks2, aes64ks1i instructions Co-authored-by: Ruibo Lu Co-authored-by: Zewen Ye Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson --- target/riscv/crypto_helper.c| 169 +++

[PATCH v8 03/14] target/riscv: rvk: add support for zbkc extension

- reuse partial instructions of zbc extension, update extension check for them Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/insn32.decode | 3 ++- target/riscv/insn_trans/trans_rvb.c.inc | 4 +

[PATCH v8 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension

- add sha512sum0r, sha512sig0l, sha512sum1r, sha512sig1l, sha512sig0h and sha512sig1h instructions Co-authored-by: Zewen Ye Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/insn32.decode | 6 ++ target/riscv/insn_trans/trans_rvk.c.inc | 100 ++

[PATCH v8 01/14] target/riscv: rvk: add cfg properties for zbk* and zk*

Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Acked-by: Alistair Francis --- target/riscv/cpu.c | 23 +++ target/riscv/cpu.h | 13 + 2 files changed, 36 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ddda4906ff..9e8bbce6f1 10064

[PATCH v8 04/14] target/riscv: rvk: add support for zbkx extension

- add xperm4 and xperm8 instructions Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson --- target/riscv/bitmanip_helper.c | 27 + target/riscv/helper.h | 2 ++ target/riscv/insn32.decode | 4 +

[PATCH v8 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32

- add aes32esmi, aes32esi, aes32dsmi and aes32dsi instructions Co-authored-by: Zewen Ye Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson --- target/riscv/crypto_helper.c| 105 target/riscv/helper.h |

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