Add a model of Versal's PMC SLCR (system-level control registers).
Signed-off-by: Francisco Iglesias
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/meson.build|5 +-
hw/misc/xlnx-versal-pmc-iou-slcr.c | 1446 +
Connect Versal's PMC SLCR (system-level control registers) model.
Signed-off-by: Francisco Iglesias
---
hw/arm/xlnx-versal.c | 71 +++-
include/hw/arm/xlnx-versal.h | 5
2 files changed, 75 insertions(+), 1 deletion(-)
diff --git a/hw/arm/xl
Add an orgate and 'or' the interrupts from the BBRAM and RTC models.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal-virt.c| 2 +-
hw/arm/xlnx-versal.c | 28 ++--
include/hw/arm/xlnx-versal.h | 5 +++--
3 files changed, 3
An option on real hardware when embedding a DMA engine into a peripheral
is to make the peripheral control the engine through a custom DMA control
(hardware) interface between the two. Software drivers in this scenario
configure and trigger DMA operations through the controlling peripheral's
regist
Add support for Micron Xccela flash mt35xu01g.
Signed-off-by: Francisco Iglesias
Reviewed-by: Edgar E. Iglesias
---
hw/block/m25p80.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index b77503dc84..c6bf3c6bfa 100644
--- a/hw/block/m25p80.c
+++ b/hw/
Add in the missing includes in the header for being able to build the DMA
model when reusing it.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
include/hw/dma/xlnx_csu_dma.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/hw/dma/xlnx_csu_dma.h b/include/hw/dma
List myself as maintainer for the Xilinx Versal OSPI controller.
Signed-off-by: Francisco Iglesias
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6ccdec7f02..0e31569d65 100644
-
Implement the DMA control interface for allowing direct control of DMA
operations from inside peripheral models embedding (and reusing) the
Xilinx CSU DMA.
Signed-off-by: Francisco Iglesias
---
hw/dma/xlnx_csu_dma.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/dma
Add a model of Xilinx Versal's OSPI flash memory controller.
Signed-off-by: Francisco Iglesias
---
hw/ssi/meson.build|1 +
hw/ssi/xlnx-versal-ospi.c | 1856 +
include/hw/ssi/xlnx-versal-ospi.h | 111 +++
3 files changed, 1968 inser
This patchset fixes up some minor nits in the linux-user code that I
noticed while I was reading code to assist with reviewing the
bsd-user signal handling.
thanks
-- PMM
Peter Maydell (3):
linux-user: Remove unnecessary 'aligned' attribute from TaskState
linux-user: Rename user_force_sig tra
Connect the OSPI flash memory controller model (including the source and
destination DMA).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 93
include/hw/arm/xlnx-versal.h | 20 ++
2 files chang
In commit c599d4d6d6e9bfdb64 in 2016 we renamed the old force_sig()
function to dump_core_and_abort(), but we forgot to rename the
associated tracepoint. Rename the tracepoint to to match the
function it's called from.
Signed-off-by: Peter Maydell
---
linux-user/signal.c | 2 +-
linux-user/
Connect Micron Xccela mt35xu01g flashes to the OSPI flash memory
controller.
Signed-off-by: Francisco Iglesias
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal-virt.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/hw/arm/xlnx-versal
On 14/1/22 16:37, Peter Maydell wrote:
In commit c599d4d6d6e9bfdb64 in 2016 we renamed the old force_sig()
function to dump_core_and_abort(), but we forgot to rename the
associated tracepoint. Rename the tracepoint to to match the
function it's called from.
Signed-off-by: Peter Maydell
---
l
Also, since being the author, list myself as maintainer for the file.
Signed-off-by: Francisco Iglesias
---
MAINTAINERS| 1 +
docs/devel/dma-ctrl-if.rst | 243 +
docs/devel/index.rst | 1 +
3 files changed, 245 insertions(+)
Hi,
This series attempts to add support for Xilinx Versal's PMC SLCR
(system-level control registers) and OSPI flash memory controller to
Xilinx Versal virt machine.
The series start with adding a model of Versal's PMC SLCR and connecting
the model to the Versal virt machine. The series then adds
On 14/1/22 12:32, Philippe Mathieu-Daudé wrote:
On 13/1/22 20:44, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
We fairly regularly forget VMSTATE_END_OF_LIST markers off descriptions;
given that the current check is only for ->name being NULL, sometimes
we get unlucky and
In linux-user/signal.c we have two FIXME comments claiming that
parts of the signal-handling code are not threadsafe. These are
very old, as they were first introduced in commit 624f7979058
in 2008. Since then we've radically overhauled the signal-handling
logic, while carefully preserving these FI
The linux-user struct TaskState has an 'aligned(16)' attribute. When
the struct was first added in commit 851e67a1b46f in 2003, there was
a justification in a comment (still present in the source today):
/* NOTE: we force a big alignment so that the stack stored after is
aligned too */
becaus
In linux-user/signal.c we have two FIXME comments claiming that
parts of the signal-handling code are not threadsafe. These are
very old, as they were first introduced in commit 624f7979058
in 2008. Since then we've radically overhauled the signal-handling
logic, while carefully preserving these FI
The linux-user queue_signal() function always returns 1, and none of
its callers check the return value. Give it a void return type
instead.
The return value is a leftover from the old pre-2016 linux-user
signal handling code, which really did have a queue of signals and so
might return a failure
Idan Horowitz writes:
> When the length of the range is large enough, clearing the whole cache is
> faster than iterating over the (possibly extremely large) set of pages
> contained in the range.
>
> This mimics the pre-existing similar optimization done on the flush of the
> tlb itself.
>
> S
+)
>
> are available in the Git repository at:
>
> git://git.kraxel.org/qemu tags/kraxel-20220114-pull-request
>
> for you to fetch changes up to 17f6315ef883a142b6a41a491b63a6554e784a5c:
>
> ui/input-legacy: pass horizon
On 14/1/22 16:37, Peter Maydell wrote:
The linux-user queue_signal() function always returns 1, and none of
its callers check the return value. Give it a void return type
instead.
The return value is a leftover from the old pre-2016 linux-user
signal handling code, which really did have a queue
On Fri, 14 Jan 2022 at 15:50, Peter Maydell wrote:
>
> In linux-user/signal.c we have two FIXME comments claiming that
> parts of the signal-handling code are not threadsafe. These are
> very old, as they were first introduced in commit 624f7979058
> in 2008. Since then we've radically overhauled
Daniel P. Berrangé writes:
> On Fri, Jan 14, 2022 at 12:22:13PM +0100, Markus Armbruster wrote:
>> Nikita Lapshin writes:
>>
>> > If this capability is enabled migration stream
>> > will have RAM section only.
>> >
>> > Signed-off-by: Nikita Lapshin
>>
>> [...]
>>
>> > diff --git a/qapi/migr
Currently, we have to use OpenSBI firmware ELF as bios for the spike
machine because the HTIF console requires ELF for parsing "fromhost"
and "tohost" symbols.
The latest OpenSBI can now optionally pick-up HTIF register address
from HTIF DT node so using this feature spike machine can now use
Open
On Thu, 13 Jan 2022 20:54:52 +0100
Halil Pasic wrote:
> > > This is the very reason for which commit 7ef7e6e3b ("vhost: correctly
> > > turn on VIRTIO_F_IOMMU_PLATFORM") for, which fences _F_ACCESS_PLATFORM
> > > form the vhost device that does not need it, because on the vhost
> > > interface it
Alex Bennée wrote:
>
>
> For multi-patch series please include a cover letter which is the parent
> of all the patches. This is the default for git-send-email.
>
Sorry, I will do so from now on.
>
> The code itself looks fine but what sort of improvements are we talking
> about here? What measur
On 22.12.21 18:40, Vladimir Sementsov-Ogievskiy wrote:
That simplifies handling failure in existing code and in further new
usage of bdrv_merge_dirty_bitmap().
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/dirty-bitmap.h| 2 +-
block/dirty-bitmap.c| 9 +++-
On 22.12.21 18:40, Vladimir Sementsov-Ogievskiy wrote:
We are going to complicate bitmap initialization in the further
commit. And in future, backup job will be able to work without filter
(when source is immutable), so we'll need same bitmap initialization in
copy-before-write filter and in back
On 22.12.21 18:40, Vladimir Sementsov-Ogievskiy wrote:
This will be used in the following commit to bring "incremental" mode
to copy-before-write filter.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block-copy.h | 2 +-
block/block-copy.c | 14 --
block
On 22.12.21 18:40, Vladimir Sementsov-Ogievskiy wrote:
This brings "incremental" mode to copy-before-write filter: user can
specify bitmap so that filter will copy only "dirty" areas.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qapi/block-core.json | 10 +-
block/copy-before
On 22.12.21 18:40, Vladimir Sementsov-Ogievskiy wrote:
Split block_copy_reset() out of block_copy_reset_unallocated() to be
used separately later.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block-copy.h | 1 +
block/block-copy.c | 21 +
2 file
On Thu, Jan 13, 2022 at 04:55:11PM +, Daniel P. Berrangé wrote:
> Traditionally the OVMF firmware has been loaded using the pflash
> mechanism. This is because it is usually provided as a pair of
> files, one read-only containing the code and one writable to
> provided persistence of non-volati
Hi,
This second version contains improvements suggested by Cedric in the
v1 review.
Patches 1-10 from v1 are already accepted and aren't included in this
v2.
Changes from v1:
- v1 patches 1-10: already accepted, not included in the v2
- 'stack-stack_no' use is eliminated. We're now deriving sta
Move the current pnv_pec_stk_default_phb_realize() call to
pec_realize(), renaming the function to pnv_pec_default_phb_realize(),
and set the PHB attributes using the PEC object directly.
This will be important to allow for PECs devices to handle PHB4s
directly later on.
Reviewed-by: Cédric Le Go
All the complexity that was scattered between PnvPhb4PecStack and
PnvPHB4 are now centered in the PnvPHB4 device. PnvPhb4PecStack does not
serve any purpose in the current code base.
Reviewed-by: Cédric Le Goater
Signed-off-by: Daniel Henrique Barboza
---
hw/pci-host/pnv_phb4_pec.c | 33 ---
This pointer was being used for two reasons: pnv_phb4_update_regions()
was using it to access the PHB and phb4_realize() was using it as a way
to determine if the PHB was user created.
We can determine if the PHB is user created via phb->pec, introduced in
the previous patch, and pnv_phb4_update_r
This property will track the owner PEC of this PHB. For now it's
redundant since we can retrieve the PEC via phb->stack->pec but it
will not be redundant when we get rid of the stack device.
Reviewed-by: Cédric Le Goater
Signed-off-by: Daniel Henrique Barboza
---
hw/pci-host/pnv_phb4.c
pnv_pec_default_phb_realize() stopped using it after the previous patch and
no one else is using it.
Signed-off-by: Daniel Henrique Barboza
---
hw/pci-host/pnv_phb4_pec.c | 2 --
include/hw/pci-host/pnv_phb4.h | 3 ---
2 files changed, 5 deletions(-)
diff --git a/hw/pci-host/pnv_phb4_pec.c
On Fri, Jan 14, 2022 at 05:05:56PM +0100, Halil Pasic wrote:
> On Thu, 13 Jan 2022 20:54:52 +0100
> Halil Pasic wrote:
>
> > > > This is the very reason for which commit 7ef7e6e3b ("vhost: correctly
> > > > turn on VIRTIO_F_IOMMU_PLATFORM") for, which fences _F_ACCESS_PLATFORM
> > > > form the vh
'stack->stack_no' represents the order that a stack appears in its PEC.
Its primary use is in XSCOM address space calculation in
pnv_phb4_xscom_realize() when calculating the memory region offset.
This attribute is redundant with phb->phb_id, which is calculated via
pnv_phb4_pec_get_phb_id() using
This patch changes the design of the PEC device to create and realize PHB4s
instead of PecStacks. After all the recent changes, PHB4s now contain all
the information needed for their proper functioning, not relying on PecStack
in any capacity.
All changes are being made in a single patch to avoid
On 22.12.21 18:40, Vladimir Sementsov-Ogievskiy wrote:
Split intersecting-requests functionality out of block-copy to be
reused in copy-before-write filter.
Note: while being here, fix tiny typo in MAINTAINERS.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/reqlist.h | 67 +++
This function does not use 'stack' anymore. Rename it to
pnv_pec_phb_update_map().
Reviewed-by: Cédric Le Goater
Signed-off-by: Daniel Henrique Barboza
---
hw/pci-host/pnv_phb4.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb
On Thu, Jan 13, 2022 at 10:40 AM Peter Maydell
wrote:
> On Sun, 9 Jan 2022 at 16:29, Warner Losh wrote:
> >
> > Update for the richer set of data faults that are now possible. Copied
> > largely from linux-user/arm/cpu_loop.c
> >
> > Signed-off-by: Warner Losh
> > ---
> > bsd-user/arm/target_a
On Thu, Jan 13, 2022 at 04:32:49PM +0100, Sebastian Hasler wrote:
> With the current implementation, blocking flock can lead to
> deadlock. Thus, it's better to return EOPNOTSUPP if a user attempts
> to perform a blocking flock request.
>
> Signed-off-by: Sebastian Hasler
Reviewed-by: Vivek Goya
Fix a typo in a comment in the arm cpu_loop code.
Signed-off-by: Peter Maydell
---
linux-user/arm/cpu_loop.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index f153ab503a8..032e1ffddfb 100644
--- a/linux-user/arm/cp
On Fri, 14 Jan 2022 at 18:14, Warner Losh wrote:
>
>
>
> On Thu, Jan 13, 2022 at 10:40 AM Peter Maydell
> wrote:
>>
>> On Sun, 9 Jan 2022 at 16:29, Warner Losh wrote:
>> >
>> > Update for the richer set of data faults that are now possible. Copied
>> > largely from linux-user/arm/cpu_loop.c
>>
On Thu, Jan 13, 2022 at 10:45 AM Peter Maydell
wrote:
> On Sun, 9 Jan 2022 at 16:29, Warner Losh wrote:
> >
> > Implement host_to_target_signal and target_to_host_signal.
> >
> > Signed-off-by: Stacey Son
> > Signed-off-by: Kyle Evans
> > Signed-off-by: Warner Losh
> > ---
> > bsd-user/qemu.
On Thu, Jan 13, 2022 at 12:28 PM Peter Maydell
wrote:
> On Sun, 9 Jan 2022 at 16:29, Warner Losh wrote:
> >
> > Initialize the signal state for the emulator. Setup a set of sane
> > default signal handlers, mirroring the host's signals. For fatal signals
> > (those that exit by default), establi
On Mon, Jan 10, 2022 at 06:29:02PM -0500, John Snow wrote:
> Simply import the type defition from the new location.
definition
>
> Signed-off-by: John Snow
> Reviewed-by: Vladimir Sementsov-Ogievskiy
> Reviewed-by: Beraldo Leal
> ---
> tests/qemu-iotests/iotests.py | 2 +-
> 1 file changed,
Double-check I'm doing this right + test.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio-ccw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index 84e3e63c43..e02fe11b07 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s
The zpci-interp feature is used to specify whether zPCI interpretation is
to be used for this guest.
Signed-off-by: Matthew Rosato
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 2 ++
target/s390x/kvm/kvm.c | 1 +
3 files changed, 4 insertions(+
Allow the underlying kvm host to handle the Refresh PCI Translation
instruction intercepts.
Reviewed-by: Pierre Morel
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-pci-bus.c | 6 ++--
hw/s390x/s390-pci-inst.c | 51 ++--
hw/s390x/s390-pci-vfio.c
Let's use the reserved pool of simulated PCI groups to allow intercept
devices to have separate groups from interpreted devices as some group
values may be different. If we run out of simulated PCI groups, subsequent
intercept devices just get the default group.
Furthermore, if we encounter any PCI
When using the IOAT assist via interpretation, we should advertise what
the host driver supports, not QEMU.
Reviewed-by: Pierre Morel
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-pci-vfio.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/s390-pci-vfio.c b/hw
This is a placeholder that pulls in 5.17 + unmerged kernel changes
required by this item. A proper header sync can be done once the
associated kernel code merges.
Signed-off-by: Matthew Rosato
---
include/standard-headers/asm-x86/kvm_para.h | 1 +
include/standard-headers/drm/drm_fourcc.h
For QEMU, the majority of the work in enabling instruction interpretation
is handled via new VFIO ioctls to SET the appropriate interpretation and
interrupt forwarding modes, and to GET the function handle to use for
interpretive execution.
This series implements these new ioctls, as well as add
Use the associated vfio feature ioctl to enable interpretation for devices
when requested. As part of this process, we must use the host function
handle rather than a QEMU-generated one -- this is provided as part of the
ioctl payload.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-pci-bus.c
Lack of MSI-X support is not an issue for interpreted passthrough
devices, so let's let these in. This will allow, for example, ISM
devices to be passed through -- but only when interpretation is
available and being used.
Reviewed-by: Thomas Huth
Reviewed-by: Pierre Morel
Signed-off-by: Matthew
Use the associated vfio feature ioctl to enable adapter event notification
and forwarding for devices when requested. This feature will be set up
with or without firmware assist based upon the 'intassist' setting.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-pci-bus.c | 24 -
On Fri, Jan 14, 2022 at 11:25 AM Peter Maydell
wrote:
> Fix a typo in a comment in the arm cpu_loop code.
>
> Signed-off-by: Peter Maydell
> ---
> linux-user/arm/cpu_loop.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Warner Losh
> diff --git a/linux-user/arm/c
Idan Horowitz wrote:
>
> cbnz x9, 0x5168abc8
>
I forgot to include the addresses of the instructions, making this
jump undecipherable, here's the snippet again but with addresses this
time:
0x5168abb0 movkx0, #0x0
0x5168abb4 movkx0, #0x0, lsl #16
0x5168abb8 movkx0, #0xff80, lsl #
On 1/14/22 3:38 PM, Matthew Rosato wrote:
Double-check I'm doing this right + test.
Argh... This should have been squashed into the preceding patch
'target/s390x: add zpci-interp to cpu models'
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio-ccw.c | 1 +
1 file changed, 1 inser
David Gibson writes:
> On Mon, Jan 10, 2022 at 03:15:40PM -0300, Fabiano Rosas wrote:
>> Signed-off-by: Fabiano Rosas
>> ---
>> target/ppc/cpu_init.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
>> index a50ddaeaae..9097948e67 1006
On Thu, Jan 13, 2022 at 6:28 PM Philipp Tomsich
wrote:
>
> On Thu, 13 Jan 2022 at 06:07, Alistair Francis wrote:
> >
> > On Thu, Jan 13, 2022 at 1:42 AM Philipp Tomsich
> > wrote:
> > >
> > > Alistair,
> > >
> > > Do you (and the other RISC-V custodians of target/riscv) have any opinion
> > > o
> -Original Message-
> From: Brian Cain
> Sent: Friday, October 1, 2021 7:23 PM
> To: Richard Henderson ; Alex Bennée
> ; qemu-devel@nongnu.org
> Cc: Taylor Simpson
> Subject: RE: hexagon container update
>
> > -Original Message-
> > From: Brian Cain
> ...
> > > -Original Mess
On Thu, Jan 13, 2022 at 12:43 PM Peter Maydell
wrote:
> On Sun, 9 Jan 2022 at 16:41, Warner Losh wrote:
> >
> > Implement conversion of host to target siginfo.
> >
> > Signed-off-by: Stacey Son
> > Signed-off-by: Kyle Evans
> > Signed-off-by: Warner Losh
> > ---
> > bsd-user/signal.c | 37 ++
On Fri, Jan 14, 2022 at 06:46:10PM -0300, Fabiano Rosas wrote:
> David Gibson writes:
>
> > On Mon, Jan 10, 2022 at 03:15:40PM -0300, Fabiano Rosas wrote:
> >> Signed-off-by: Fabiano Rosas
> >> ---
> >> target/ppc/cpu_init.c | 2 ++
> >> 1 file changed, 2 insertions(+)
> >>
> >> diff --git a/t
From: Daniel P. Berrangé
Currently QEMU defaults to a resolution of 1024x768 when exposing EDID
info to the guest OS. The EDID default info is important as this will
influence what resolution many guest OS will configure the screen with
on boot. It can also potentially influence what resolution t
On Fri, Jan 14, 2022 at 3:13 PM Peter Xu wrote:
>
> On Fri, Jan 14, 2022 at 01:58:07PM +0800, Jason Wang wrote:
> > > > Right, but I think you meant to do this only when scalable mode is
> > > > disabled.
> > >
> > > Yes IMHO it will definitely suite for !scalable case since that's exactly
> > >
On Fri, Jan 14, 2022 at 02:12:12AM +0800, Hongren (Zenithal) Zheng wrote:
> +F: docs/canokey.txt
I forgot to change this line, I will change it in the next version
along with other requested changes.
On 13/01/2022 18.10, Bernhard Beschow wrote:
More than 1k of TypeInfo instances are already marked as const. Mark the
remaining ones, too.
Signed-off-by: Bernhard Beschow
---
hw/core/generic-loader.c | 2 +-
hw/core/guest-loader.c | 2 +-
hw/display/bcm2835_fb.c| 2 +-
hw/display
At A64FX specification, VHE is enabled by default, so
the virtualization option should be enabled when -cpu a64fx
is specified.
Signed-off-by: Shuuichirou Ishii
---
hw/arm/virt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index b45b52c90e..56acf5cc7e
On Fri, Jan 14, 2022 at 03:22:16PM +0800, Jason Wang wrote:
> On Fri, Jan 14, 2022 at 3:13 PM Peter Xu wrote:
> >
> > On Fri, Jan 14, 2022 at 01:58:07PM +0800, Jason Wang wrote:
> > > > > Right, but I think you meant to do this only when scalable mode is
> > > > > disabled.
> > > >
> > > > Yes IM
Hi Stefan,
On 1/13/22 4:38 PM, Stefan Berger wrote:
> On 1/13/22 09:40, Eric Auger wrote:
>
>> Hi Stefan,
>>
>> On 1/13/22 3:06 PM, Stefan Berger wrote:
>>> On 1/13/22 05:37, Eric Auger wrote:
Representing the CRB cmd/response buffer as a standard
RAM region causes some trouble when the
From: Marc-André Lureau
../qga/meson.build:76:4: ERROR: Key ARCH is not in the dictionary.
Fixes commit 823eb013 ("configure, meson: move ARCH to meson.build")
Signed-off-by: Marc-André Lureau
---
qga/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qga/meson.bu
On 2022/01/14 2:22, Vladislav Yaroshchuk wrote:
Interaction with vmnet.framework in different modes
differs only on configuration stage, so we can create
common `send`, `receive`, etc. procedures and reuse them.
vmnet.framework supports iov, but writing more than
one iov into vmnet interface fai
Hi,
Thank you for fixing the feature availability check.
I decided to just check the series thoroughly before adding Reviewed-By,
and unfortunately ended up finding minor memory leaks and style
problems. I'm sorry for adding comments so late.
Particulalry, his patch has several 2-space inden
On 2022/01/14 2:22, Vladislav Yaroshchuk wrote:
Signed-off-by: Vladislav Yaroshchuk
---
net/vmnet-bridged.m | 105 +---
1 file changed, 100 insertions(+), 5 deletions(-)
diff --git a/net/vmnet-bridged.m b/net/vmnet-bridged.m
index 4e42a90391..bc499c619
From: Marc-André Lureau
That should help catch build issues/regressions with wixl.
Signed-off-by: Marc-André Lureau
---
tests/docker/dockerfiles/fedora-win32-cross.docker | 1 +
tests/docker/dockerfiles/fedora-win64-cross.docker | 1 +
2 files changed, 2 insertions(+)
diff --git a/tests/docke
On Fri, Jan 14, 2022 at 04:24:37PM +0900, Shuuichirou Ishii wrote:
> At A64FX specification, VHE is enabled by default, so
> the virtualization option should be enabled when -cpu a64fx
> is specified.
>
> Signed-off-by: Shuuichirou Ishii
> ---
> hw/arm/virt.c | 6 ++
> 1 file changed, 6 inse
On 10/01/2022 22.19, Eric Auger wrote:
-netdev vhost-user,vhostforce is deprecated and vhostforce=on
should be used instead.
Signed-off-by: Eric Auger
---
tests/qtest/vhost-user-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/vhost-user-test.c b/tests/q
The corresponding change for hmp-commands.hx is missing (Look for
hmp_netdev_add).
Regards,
Akihiko Odaki
On 2022/01/14 2:22, Vladislav Yaroshchuk wrote:
Signed-off-by: Vladislav Yaroshchuk
---
qemu-options.hx | 25 +
1 file changed, 25 insertions(+)
diff --git a/q
On 10/01/2022 22.19, Eric Auger wrote:
When run on ARM, basic and indirect tests currently fail with the
following error:
ERROR:../tests/qtest/libqos/virtio.c:224:qvirtio_wait_used_elem:
assertion failed (got_desc_idx == desc_idx): (50331648 == 0)
Bail out! ERROR:../tests/qtest/libqos/virtio.c:2
On 10/01/2022 22.19, Eric Auger wrote:
At the moment the IO space limit is hardcoded to
QPCI_PIO_LIMIT = 0x1. When accesses are performed to a bar,
the base address of this latter is compared against the limit
to decide whether we perform an IO or a memory access.
On ARM, we cannot keep this
On 10/01/2022 22.19, Eric Auger wrote:
The vq setup code is repeated several times and can be
easily factorized.
Signed-off-by: Eric Auger
---
tests/qtest/vhost-user-blk-test.c | 33 +++
1 file changed, 16 insertions(+), 17 deletions(-)
Reviewed-by: Thomas Huth
On 10/01/2022 22.19, Eric Auger wrote:
ARM does not not support hotplug on pcie.0. Add a flag on the bus
which tells if devices can be hotplugged and skip hotplug tests
if the bus cannot be hotplugged. This is a temporary solution to
enable the other pci tests on aarch64.
Signed-off-by: Eric Aug
On Fri, Jan 14, 2022 at 3:45 PM Peter Xu wrote:
>
> On Fri, Jan 14, 2022 at 03:22:16PM +0800, Jason Wang wrote:
> > On Fri, Jan 14, 2022 at 3:13 PM Peter Xu wrote:
> > >
> > > On Fri, Jan 14, 2022 at 01:58:07PM +0800, Jason Wang wrote:
> > > > > > Right, but I think you meant to do this only when
On 10/01/2022 22.19, Eric Auger wrote:
Up to now the virt-machine node contains a virtio-mmio node.
However no driver produces any PCI interface node. Hence, PCI
tests cannot be run with aarch64 binary.
Add a GPEX driver node that produces a pci interface node. This latter
then can be consumed b
在 2022/1/14 下午1:08, Jason Wang 写道:
The following changes since commit f8d75e10d3e0033a0a29a7a7e4777a4fbc17a016:
Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220112' into
staging (2022-01-13 11:18:24 +)
are available in the git repository at:
https://github.com/ja
在 2022/1/14 上午10:32, Jason Wang 写道:
dressSpace *as)
/* GHashTable functions */
static gboolean vtd_uint64_equal(gconstpointer v1, gconstpointer v2)
{
- return *((const uint64_t *)v1) == *((const uint64_t *)v2);
+ const struct vtd_as_key *key1 = v1;
+ const struct vtd_as_key *key2
Hi,
> This patchset introduces:
>
> 1) Skeleton of QEMU printer subsystem with a dummy builtin driver.
>
> 2) USB printer device emulation, with definitions in the extension of
> IPP-over-
>USB [3].
>
> WIP:
>
> 1) QEMU printer subsystem interfaces, which will be finalized with a concre
Anup Patel 於 2021年12月30日 週四 下午8:55寫道：
> From: Anup Patel
>
> The AIA specification adds new CSRs for RV32 so that RISC-V hart can
> support 64 local interrupts on both RV32 and RV64.
>
> Signed-off-by: Anup Patel
> Signed-off-by: Anup Patel
> Reviewed-by: Alistair Francis
> ---
> target/risc
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