Add target/riscv/kvm.c to place kvm_arch_* function needed by
kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file.
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Alistair Francis
Reviewed-by: Anup Patel
---
meson.build | 2 +
target/riscv/kvm.c
On Mon, Jan 10, 2022 at 1:56 AM Michael S. Tsirkin wrote:
> On Fri, Nov 05, 2021 at 12:48:17AM +0800, Cindy Lu wrote:
> > these patches add the support for configure interrupt
> >
> > These codes are all tested in vp-vdpa (support configure interrupt)
> > vdpa_sim (not support configure interrupt
When KVM is enabled, set the S-mode external interrupt through
kvm_riscv_set_irq function.
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Alistair Francis
Reviewed-by: Anup Patel
---
target/riscv/cpu.c | 6 +-
target/riscv/kvm-stub.c | 5 +
target/riscv/kv
Use char-fe to handle console sbi call, which implement early
console io while apply 'earlycon=sbi' into kernel parameters.
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Anup Patel
---
target/riscv/kvm.c | 42 -
target/riscv/sbi_ecall_interf
Add virtual time context description to vmstate_kvmtimer. After cpu being
loaded, virtual time context is updated to KVM.
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Anup Patel
Reviewed-by: Alistair Francis
---
target/riscv/machine.c | 30 ++
'host' type cpu is set isa to RV32 or RV64 simply, more isa info
will obtain from KVM in kvm_arch_init_vcpu()
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Alistair Francis
Reviewed-by: Anup Patel
---
target/riscv/cpu.c | 15 +++
target/riscv/cpu.h | 1 +
2 f
Add kvm_riscv_get/put_regs_timer to synchronize virtual time context
from KVM.
To set register of RISCV_TIMER_REG(state) will occur a error from KVM
on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter
that adaping in QEMU.
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwan
Get kernel and fdt start address in virt.c, and pass them to KVM
when cpu reset. Add kvm_riscv.h to place riscv specific interface.
In addition, PLIC is created without M-mode PLIC contexts when KVM
is enabled.
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Alistair Francis
We hope that virtual time adjusts with vm state changing. When a vm
is stopped, guest virtual time should stop counting and kvm_timer
should be stopped. When the vm is resumed, guest virtual time should
continue to count and kvm_timer should be restored.
Signed-off-by: Yifei Jiang
Signed-off-by:
Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl
Signed-off-by: Yifei Jiang
Signed-off-by: Mingwang Li
Reviewed-by: Alistair Francis
Reviewed-by: Anup Patel
---
target/riscv/kvm.c | 104 -
1 file changed, 103 insertions(+), 1 deletion(-)
On 2022/1/7 21:38, Thomas Huth wrote:
If I configure my build with --enable-sanitizers, my GCC (v8.5.0)
complains:
.../softmmu/device_tree.c: In function ‘qemu_fdt_add_path’:
.../softmmu/device_tree.c:560:18: error: ‘retval’ may be used uninitialized
in this function [-Werror=maybe-uninitial
On 2022/1/8 4:18, Richard Henderson wrote:
On 1/7/22 5:38 AM, Thomas Huth wrote:
diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c
index 3965c834ca..9e96f5ecd5 100644
--- a/softmmu/device_tree.c
+++ b/softmmu/device_tree.c
@@ -564,7 +564,7 @@ int qemu_fdt_add_path(void *fdt, const cha
On Fri, Jan 7, 2022 at 7:04 PM Patrick Venture wrote:
> From: Hao Wu
>
> SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible
> interface that reports AMD SoC's Ttcl (normalized temperature),
> and resembles a typical 8-pin remote temperature sensor's I2C interface
> to BMC.
>
> This
On Fri, Jan 07, 2022 at 07:26:01PM -0300, Fabiano Rosas wrote:
> We use the endianness of interrupts to determine which endianness to
> use for the guest kernel memory dump. For machines that support HILE
> (powernv8 and up) we have been always generating big endian dump
> files.
>
> This patch us
Hi, Mark
On 12/23/2021 06:52 PM, Mark Cave-Ayland wrote:
> On 22/12/2021 08:26, yangxiaojuan wrote:
>
>> Hi, Mark
>>
>> On 12/18/2021 06:02 PM, Mark Cave-Ayland wrote:
>>> On 04/12/2021 12:07, Xiaojuan Yang wrote:
>>>
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map f
On Mon, Jan 10, 2022 at 9:37 AM Cindy Lu wrote:
>
>
>
>
> On Mon, Jan 10, 2022 at 1:56 AM Michael S. Tsirkin wrote:
>>
>> On Fri, Nov 05, 2021 at 12:48:17AM +0800, Cindy Lu wrote:
>> > these patches add the support for configure interrupt
>> >
>> > These codes are all tested in vp-vdpa (support c
On Mon, Jan 10, 2022 at 10:37 AM Jason Wang wrote:
> On Mon, Jan 10, 2022 at 9:37 AM Cindy Lu wrote:
> >
> >
> >
> >
> > On Mon, Jan 10, 2022 at 1:56 AM Michael S. Tsirkin
> wrote:
> >>
> >> On Fri, Nov 05, 2021 at 12:48:17AM +0800, Cindy Lu wrote:
> >> > these patches add the support for confi
Hi, Xuerui
Thank you for all you advice, I will modify the target part carefully.
Xiaojuan
On 01/09/2022 05:26 PM, WANG Xuerui wrote:
> Hi Xiaojuan,
>
> I've just finished reviewing the first part (target modifications) as I'm not
> familiar with QEMU device emulation. You may have to rev
On 08/01/2022 00:39, Greg Kurz wrote:
On Fri, 7 Jan 2022 23:19:03 +1100
David Gibson wrote:
On Fri, Jan 07, 2022 at 12:57:47PM +0100, Greg Kurz wrote:
On Fri, 7 Jan 2022 18:24:23 +1100
Alexey Kardashevskiy wrote:
"PowerPC Processor binding to IEEE 1275" says in
"8.2.1. Initial Register
> -Original Message-
> From: Jason Wang [mailto:jasow...@redhat.com]
> Sent: Wednesday, January 5, 2022 2:15 PM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
>
> Cc: Stefan Hajnoczi ; mst ; Stefano
> Garzarella ; Cornelia Huck ; pbonzini
> ; Gonglei (Arei) ; Yechuan
>
From: Peter Foley
Match the other error handling in this function.
Fixes: e7b347d0bf6 ("net: detect errors from probing vnet hdr flag for TAP
devices")
Reviewed-by: Patrick Venture
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Foley
Signed-off-by: Jason Wang
---
net/tap.c | 1 +
The following changes since commit df722e33d5da26ea8604500ca8f509245a0ea524:
Merge tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu into staging
(2022-01-08 09:37:59 -0800)
are available in the git repository at:
https://github.com/jasowang/qemu.git tags/net-pull-request
for you t
From: Philippe Mathieu-Daudé
The "Interrupt Cause" register (VMXNET3_REG_ICR) is read-only.
Write accesses are ignored. Log them with as LOG_GUEST_ERROR
instead of aborting:
[R +0.239743] writeq 0xe0002031 0x46291a5a55460800
ERROR:hw/net/vmxnet3.c:1819:vmxnet3_io_bar1_write: code should not
From: Zhang Chen
Make the comments consistent with the REGULAR_PACKET_CHECK_MS.
Signed-off-by: Zhang Chen
Signed-off-by: Jason Wang
---
net/colo-compare.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index 216de5a..62554b5 100644
From: Peter Foley
e.g.
1109 15:16:20.151506 Uninitialized bytes in ioctl_common_pre at offset 0 inside
[0x7ffc516af9b8, 4)
1109 15:16:20.151659 ==588974==WARNING: MemorySanitizer:
use-of-uninitialized-value
1109 15:16:20.312923 #0 0x5639b88acb21 in tap_probe_vnet_hdr_len
third_party/qemu
From: Vladislav Yaroshchuk
Signed-off-by: Vladislav Yaroshchuk
Signed-off-by: Jason Wang
---
qemu-options.hx | 25 +
1 file changed, 25 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index ec90505..81dd34f 100644
--- a/qemu-options.hx
+++ b/qemu-options.h
From: Zhang Chen
COLO-compare use the glib function g_queue_find_custom to dump
another VM's networking packet to compare. But this function always
start find from the queue->head(here is the newest packet), It will
reduce the success rate of comparison. So this patch reversed
the order of the qu
From: Vladislav Yaroshchuk
Signed-off-by: Vladislav Yaroshchuk
Signed-off-by: Jason Wang
---
net/vmnet-host.c | 93
1 file changed, 87 insertions(+), 6 deletions(-)
diff --git a/net/vmnet-host.c b/net/vmnet-host.c
index 4a5ef99..9c2e760
From: Rao Lei
This patch is to improve the logic of QEMU main thread sleep code in
qemu_chr_write_buffer() where it can be blocked and can't run other
coroutines during COLO IO stress test.
Our approach is to put filter_send() in a coroutine. In this way,
filter_send() will call qemu_coroutine_y
On Mon, Jan 10, 2022 at 01:52:06PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 08/01/2022 00:39, Greg Kurz wrote:
> > On Fri, 7 Jan 2022 23:19:03 +1100
> > David Gibson wrote:
> >
> > > On Fri, Jan 07, 2022 at 12:57:47PM +0100, Greg Kurz wrote:
> > > > On Fri, 7 Jan 2022 18:24:23 +1100
> > > >
From: Vladislav Yaroshchuk
Interaction with vmnet.framework in different modes
differs only on configuration stage, so we can create
common `send`, `receive`, etc. procedures and reuse them.
vmnet.framework supports iov, but writing more than
one iov into vmnet interface fails with
'VMNET_INVALI
From: Vladislav Yaroshchuk
Signed-off-by: Vladislav Yaroshchuk
Signed-off-by: Jason Wang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c98a61c..638d129 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2641,6 +2641,11 @@ W: http://info.ie
From: Vladislav Yaroshchuk
Signed-off-by: Vladislav Yaroshchuk
Signed-off-by: Jason Wang
---
net/vmnet-bridged.m | 98 +
1 file changed, 92 insertions(+), 6 deletions(-)
diff --git a/net/vmnet-bridged.m b/net/vmnet-bridged.m
index 4e42a90..3
From: Vladislav Yaroshchuk
Signed-off-by: Vladislav Yaroshchuk
Signed-off-by: Jason Wang
---
meson.build | 4
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh | 3 +++
3 files changed, 9 insertions(+)
diff --git a/meson.build b/meson.build
index c1b1d
From: Vladislav Yaroshchuk
The vmnet framework is an API for virtual machines to read and write
packets.
The API allows a Guest OS interface to be in host mode or shared
mode. Interfaces in host mode can communicate with the native host
system and other interfaces running in host mode. In shared
The following changes since commit 0625c7760d5451d7436ef0738f763c6bb5141919:
target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()
(2022-01-04 07:55:35 +0100)
are available in the Git repository at:
g...@github.com:aik/qemu.git tags/qemu-slof-20220110
for you to fetch chang
From: Wilfred Mallawa
This change fixes a bug where a write only register is read.
As per https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
the 'INTR_TEST0' register is write only.
Signed-off-by: Wilfred Mallawa
---
hw/timer/ibex_timer.c | 14 +-
include/hw/time
On Wed, Jan 05, 2022 at 08:58:51AM +0800, Longpeng(Mike) wrote:
> From: Longpeng
>
> Add helpers to get the "Transitional PCI Device ID" and "class_id" of the
> deivce which is specificed by the "Virtio Device ID".
ton of typos here.
> These helpers will be used to build the generic vDPA device
On Mon, Jan 10, 2022 at 1:16 PM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> This change fixes a bug where a write only register is read.
> As per https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
> the 'INTR_TEST0' register is write only.
>
> Signed-off-by: Wilfred Mallawa
From: Wilfred Mallawa
The following changes:
1. Fixes the incorrectly set CTRL register address. As
per [1] https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
The CTRL register is @ 0x04.
This was found when attempting to fixup a bug where a timer_interrupt
was not serviced on TockOS
From: Wilfred Mallawa
The following change was made to rectify incorrectly set stride length
on the PLIC. Where it should be 32bit and not 24bit (0x18). This was
discovered whilst attempting to fix a bug where a timer_interrupt was
not serviced on TockOS-OpenTitan.
Signed-off-by: Wilfred Mallawa
On Mon, Jan 10, 2022 at 3:16 PM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> This change fixes a bug where a write only register is read.
> As per https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
> the 'INTR_TEST0' register is write only.
>
> Signed-off-by: Wilfred Mallawa
Hi, Peter & Daniel
Sorry about that I'm not clear enough to add a new subsystem into QEMU,
could you give me more hint?
On 1/6/22 4:53 PM, zhenwei pi wrote:
v1 -> v2:
[missing CC qemu-devel@nongnu.org, resend]
Separate v1 patch set into 2 parts:
Introduce camera subsystem (this one
On Mon, Jan 10, 2022 at 4:13 PM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> The following change was made to rectify incorrectly set stride length
> on the PLIC. Where it should be 32bit and not 24bit (0x18). This was
> discovered whilst attempting to fix a bug where a timer_interrupt w
On Mon, Jan 10, 2022 at 4:13 PM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> The following changes:
> 1. Fixes the incorrectly set CTRL register address. As
> per [1] https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
>
> The CTRL register is @ 0x04.
>
> This was found when at
> -Original Message-
> From: Michael S. Tsirkin [mailto:m...@redhat.com]
> Sent: Monday, January 10, 2022 1:43 PM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
>
> Cc: stefa...@redhat.com; jasow...@redhat.com; sgarz...@redhat.com;
> coh...@redhat.com; pbonz...@redhat
On Fri, Jan 7, 2022 at 11:41 PM Thomas Huth wrote:
>
> If I configure my build with --enable-sanitizers, my GCC (v8.5.0)
> complains:
>
> .../softmmu/device_tree.c: In function ‘qemu_fdt_add_path’:
> .../softmmu/device_tree.c:560:18: error: ‘retval’ may be used uninitialized
> in this function [-
On Fri, Jan 7, 2022 at 12:19 PM Atish Patra wrote:
>
> The RISC-V privilege specification provides flexibility to implement
> any number of counters from 29 programmable counters. However, the QEMU
> implements all the counters.
>
> Make it configurable through pmu config parameter which now will
On 1/10/22 06:04, Alexey Kardashevskiy wrote:
The following changes since commit 0625c7760d5451d7436ef0738f763c6bb5141919:
target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()
(2022-01-04 07:55:35 +0100)
are available in the Git repository at:
g...@github.com:aik/qemu.g
On Mon, Jan 10, 2022 at 11:49 AM Yifei Jiang via wrote:
>
> Use char-fe to handle console sbi call, which implement early
> console io while apply 'earlycon=sbi' into kernel parameters.
>
> Signed-off-by: Yifei Jiang
> Signed-off-by: Mingwang Li
> Reviewed-by: Anup Patel
Reviewed-by: Alistair
On Mon, Jan 10, 2022 at 11:54 AM Yifei Jiang via wrote:
>
> Add kvm_riscv_get/put_regs_timer to synchronize virtual time context
> from KVM.
>
> To set register of RISCV_TIMER_REG(state) will occur a error from KVM
> on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter
> tha
On Fri, Dec 31, 2021 at 12:32 AM liweiwei wrote:
>
> Signed-off-by: liweiwei
> Signed-off-by: wangjunqiang
> ---
> target/riscv/cpu.c | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 961c5f4334..6575ec8cfa 100644
> --- a/tar
On Mon, Jan 10, 2022 at 06:27:05AM +, Longpeng (Mike, Cloud Infrastructure
Service Product Dept.) wrote:
>
>
> > -Original Message-
> > From: Michael S. Tsirkin [mailto:m...@redhat.com]
> > Sent: Monday, January 10, 2022 1:43 PM
> > To: Longpeng (Mike, Cloud Infrastructure Service Pr
This reverts commit d48185f1a40d4e4ed2fa2873a42b2a5eb8748256.
---
hw/virtio/virtio-mmio.c | 27 ---
1 file changed, 27 deletions(-)
diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c
index 809132018b..72da12fea5 100644
--- a/hw/virtio/virtio-mmio.c
+++ b/hw/vir
The following changes since commit ca745d2277496464b54fd832c15c45d0227325bb:
tests: acpi: Add updated TPM related tables (2022-01-07 19:30:13 -0500)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up to ab
This reverts commit 497679d51087090d5a22fd265d1b96cf92d49d9d.
---
include/net/vhost_net.h | 2 --
hw/net/vhost_net-stub.c | 9 -
hw/net/vhost_net.c | 9 -
hw/net/virtio-net.c | 4 ++--
4 files changed, 2 insertions(+), 22 deletions(-)
diff --git a/include/net/vhost_net.h
This reverts commit 634f7c89fbd78f57d00d5d6b39c0ade9df1fe27f.
---
hw/virtio/vhost-vdpa.c | 7 ---
hw/virtio/trace-events | 1 -
2 files changed, 8 deletions(-)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index ac0cb575fb..04ea43704f 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/h
This reverts commit d5d24d859c3957ea1674d0e102f96439cdbfe93a.
---
hw/virtio/virtio-pci.h | 4 +-
hw/virtio/virtio-pci.c | 92 ++
2 files changed, 13 insertions(+), 83 deletions(-)
diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
index b704acc5a
This reverts commit 88062372340d33090b7f089ed3b1a00f530a8914.
---
include/hw/virtio/vhost-backend.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/hw/virtio/vhost-backend.h
b/include/hw/virtio/vhost-backend.h
index ff34eb7c8a..81bf3109f8 100644
--- a/include/hw/virtio/vhost-backend
This reverts commit f7220a7ce21604a4bc6260ccca4dc9068c1f27f2.
---
include/hw/virtio/vhost.h | 4 ---
hw/virtio/vhost.c | 76 ---
2 files changed, 80 deletions(-)
diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h
index b0f3b78987..58a73
This reverts commit 081f864f56307551f59c5e934e3f30a7290d0faa.
---
include/hw/virtio/virtio.h | 4
hw/virtio/virtio.c | 29 -
2 files changed, 33 deletions(-)
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index d78088d872..605ea79c90
On 1/9/22 18:49, Michael S. Tsirkin wrote:
Fixes a couple of issues with irqfd use by config interrupt:
- Rearrange initialization so cleanup happens in the reverse order
- Don't use irqfd for config when not in use for data path
I am not sure this is a complete fix though: I think we
are better
This reverts commit 316011b8a74e777eb3ba03171cd701a291c28867.
---
hw/virtio/virtio-pci.c | 163 +++--
1 file changed, 74 insertions(+), 89 deletions(-)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 7201cf3dc1..4bdb6e5694 100644
--- a/hw/vir
This reverts commit e3480ef81f6fb61cc9c04e3b5be8b7e84484fc05.
---
hw/virtio/virtio-pci.c | 88 +++---
1 file changed, 31 insertions(+), 57 deletions(-)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 4bdb6e5694..750aa47ec1 100644
--- a/hw/vir
This reverts commit bf1d85c166c19af95dbd27b1faba1d2909732323.
---
include/hw/virtio/virtio.h | 3 ---
hw/display/vhost-user-gpu.c| 6 --
hw/net/virtio-net.c| 10 ++
hw/virtio/vhost-user-fs.c | 6 --
hw/virtio/vhost-vsock-common.c | 6 --
hw/virtio/v
This series of patch introduce a dummy implemenation of aspeed i3c
model, and it provide just enough information for guest machine.
However, the driver probing is still failed, but it will not cause
kernel panic.
v2:
- Split i3c model into i3c and i3c_device
- Create 6x i3c devices
- Using registe
On Fri, Jan 7, 2022 at 10:14 AM Atish Patra wrote:
>
> From: Atish Patra
>
> mcycle/minstret are actually WARL registers and can be written with any
> given value. With SBI PMU extension, it will be used to store a initial
> value provided from supervisor OS. The Qemu also need prohibit the count
This patch includes i3c instance in ast2600 soc.
v2: Rebase to mainline QEMU
Signed-off-by: Troy Lee
---
hw/arm/aspeed_ast2600.c | 19 ++-
include/hw/arm/aspeed_soc.h | 3 +++
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/as
On Fri, Jan 7, 2022 at 10:27 AM Atish Patra wrote:
>
> Qemu virt machine can support few cache events and cycle/instret counters.
> It also supports counter overflow for these events.
>
> Add a DT node so that OpenSBI/Linux kernel is aware of the virt machine
> capabilities. There are some dummy n
On Mon, Jan 10, 2022 at 2:13 PM Alistair Francis
wrote:
>
> From: Wilfred Mallawa
>
> The following changes:
> 1. Fixes the incorrectly set CTRL register address. As
> per [1] https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
>
> The CTRL register is @ 0x04.
>
> This was found when at
While using SCSI passthrough, Following scenario makes qemu doesn't
realized the capacity change of remote scsi target:
1. online resize the scsi target.
2. issue 'rescan-scsi-bus.sh -s ...' in host.
3. issue 'rescan-scsi-bus.sh -s ...' in vm.
In above scenario I used to experienced errors while a
Introduce a dummy AST2600 I3C model.
Aspeed 2600 SDK enables I3C support by default. The I3C driver will try
to reset the device controller and setup through device address table
register. This dummy model response these register with default value
listed on ast2600v10 datasheet chapter 54.2. I
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