[PATCH v2 2/3] ui: Revert: "fix incorrect pointer position on highdpi with gtk"

This reverts commit f14aab420c58b57e07189d6d9e6d3fbfab4761a6. This commit was originally tested on gtk/gl which corrected behavior there. Turns out, the OpenGL texture representing the virtual console was being rendered in the incorrect place and not that the cursor was incorrectly being handled.

Re: [PATCH v3 00/15] KVM: mm: fd-based approach for supporting KVM guest private memory

On Tue, Dec 21, 2021 at 03:44:40PM +, Sean Christopherson wrote: > On Tue, Dec 21, 2021, Chao Peng wrote: > > This is the third version of this series which try to implement the > > fd-based KVM guest private memory. > > ... > > > Test > > > > This code has been tested with latest TDX co

[PATCH v2 1/5] ps2: Initial horizontal scroll support

v2: - Patch is split into a sequence - value is clamped to 31 for horizontal scroll This patch introduces horizontal scroll support for the ps/2 mouse. The patch is based on the previous work by Brad Jorsch done in 2010 but never merge, see https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=57

Re: [PATCH] ps2: Initial horizontal scroll support

Hi Marc-André, Thank you for the review! It's much clearer to me now. The odd thing about docs is that I wasn't able to find any specification that would describe intellimouse 4.0 protocol extension the way it's implemented in the linux kernel. For example here: https://isdaman.com/alsos/hardwar

[PATCH v2 2/5] ui/cocoa: pass horizontal scroll information to the device code

Signed-off-by: Dmitry Petrov --- ui/cocoa.m | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index 68a6302184..22a1f6776e 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -970,21 +970,27 @@ QemuCocoaView *cocoaView; */

[PATCH v2 5/5] ui/input-legacy: pass horizontal scroll information

This code seems to be used by vmport hack, passing these values allows to implement horizontal scroll support even when using vmport. In case it's not supported horizontal scroll will act as a vertical one. Signed-off-by: Dmitry Petrov --- ui/input-legacy.c | 16 1 file changed,

[PATCH v2 3/5] ui/gtk: pass horizontal scroll information to the device code

Signed-off-by: Dmitry Petrov --- ui/gtk.c | 54 ++ 1 file changed, 42 insertions(+), 12 deletions(-) diff --git a/ui/gtk.c b/ui/gtk.c index 428f02f2df..b52eec6fe9 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -963,33 +963,63 @@ static gboolean gd_scr

[PATCH v2 4/5] ui/sdl2: pass horizontal scroll information to the device code

Signed-off-by: Dmitry Petrov --- ui/sdl2.c | 5 + 1 file changed, 5 insertions(+) diff --git a/ui/sdl2.c b/ui/sdl2.c index 17c0ec30eb..19bbc1fdd4 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -33,6 +33,7 @@ #include "sysemu/runstate-action.h" #include "sysemu/sysemu.h" #include "ui/win32-kbd-

[PATCH] Supporting AST2600 HACE engine accumulative mode

Accumulative mode will supply a initial state and append padding bit at the end of hash stream. However, the crypto library will padding those bit automatically, so ripped it off from iov array. Signed-off-by: Troy Lee --- hw/misc/aspeed_hace.c | 30 -- inclu

Re: [RFC PATCH v3 18/27] hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)

Hi, Mark On 12/18/2021 08:33 AM, Mark Cave-Ayland wrote: > On 04/12/2021 12:07, Xiaojuan Yang wrote: > >> This patch realize the PCH-PIC interrupt controller. >> >> Signed-off-by: Xiaojuan Yang >> Signed-off-by: Song Gao >> --- >> hw/intc/Kconfig | 4 + >> hw/intc/loong

Re: [PATCH] vl: Add -set options to device opts dict when using JSON syntax for -device

On 2021/12/21 19:26, Markus Armbruster wrote:> Two issues, and only looks fixable. > > -device accepts either a QemuOpts or a JSON argument. > > It parses the former with qemu_opts_parse_noisily() into a QemuOpt > stored in @qemu_device_opts. > > It parses the latter with qobject_from_json() in

[PATCH 1/5] ppc/pnv: Change the maximum of PHB3 devices for Power8NVL

The POWER8 processors with a NVLink logic unit have 4 PHB3 devices per chip. Signed-off-by: Cédric Le Goater --- hw/ppc/pnv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 29ee0d0f08b4..9de8b8353014 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pn

[PATCH 4/5] ppc/pnv: Attach PHB3 root port device when defaults are enabled

This cleanups the PHB3 model a bit more since the root port is an independent device and it will ease our task when adding user created PHB3s. Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb3.h | 2 -- hw/pci-host/pnv_phb3.c | 8 hw/ppc/pnv.c

[PATCH 6/8] ppc/ppc405: Fix timer initialization

Timers are already initialized in ppc4xx_init(). No need to do it a second time with a wrong set. Fixes: d715ea961254 ("PPC: 405: Fix ppc405ep initialization") Signed-off-by: Cédric Le Goater --- hw/ppc/ppc405_uc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/

[PATCH 0/5] ppc/pnv: Preliminary cleanups before user created PHBs

Hello, There are the last cleanups preparing ground for PHBs created on the command line and possibly libvirt support. Thanks, C. Cédric Le Goater (5): ppc/pnv: Change the maximum of PHB3 devices for Power8NVL ppc/pnv: Remove PHB4 reset handler ppc/pnv: Remove the PHB4 "device-id" propert

[PATCH 2/5] ppc/pnv: Remove PHB4 reset handler

The PHB4 reset handler was preparing ground for PHB5 to set appropriately the device id. We don't need it for the PHB4 since the device id is already set in the root port complex. PH5 will introduce its own. "device-id" property is now useless. It should be removed. Signed-off-by: Cédric Le Goate

[PATCH 5/5] ppc/pnv: Attach PHB4 root port device when defaults are enabled

This cleanups the PHB4 model a bit more since the root port is an independent device and it will ease our task when adding user created PHB4s. Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb4.h | 2 -- hw/pci-host/pnv_phb4.c | 11 --- hw/ppc/pnv.c

[PATCH 3/8] ppc/ppc405: Activate MMU logs

There is no need to deactivate MMU logging at compile time. Signed-off-by: Cédric Le Goater --- target/ppc/mmu_common.c | 4 ++-- target/ppc/mmu_helper.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 4e278365ca55..c

[PATCH 2/8] ppc/ppc4xx: Convert printfs()

Use a QEMU log primitive for errors and trace events for debug. Signed-off-by: Cédric Le Goater --- hw/ppc/mpc8544_guts.c | 9 ++--- hw/ppc/ppc4xx_devs.c | 39 +++ hw/ppc/ppc4xx_pci.c | 11 +++ hw/ppc/trace-events | 5 + 4 files changed,

[PATCH 3/5] ppc/pnv: Remove the PHB4 "device-id" property

It's unused. Signed-off-by: Cédric Le Goater --- include/hw/pci-host/pnv_phb4.h | 2 -- hw/pci-host/pnv_phb4.c | 1 - hw/pci-host/pnv_phb4_pec.c | 3 --- 3 files changed, 6 deletions(-) diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 60de3031a622..

[PATCH 0/8] ppc/ppc405: Fixes

Hello, The series starts with a couple of cleanups helpping debug. It then adds back support for 405 timers which was broken 10 years ago. Thanks, C. Cédric Le Goater (8): target/ppc: Print out literal exception names in logs ppc/ppc4xx: Convert printfs() ppc/ppc405: Activate MMU logs

Re: [PATCH 2/4] dma: Let ld*_dma() take MemTxAttrs argument

On 12/18/21 15:51, Philippe Mathieu-Daudé wrote: Let devices specify transaction attributes when calling ld*_dma(). Keep the default MEMTXATTRS_UNSPECIFIED in the few callers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/hw/pci/pci.h

[PATCH] intel-iommu: correctly check passthrough during translation

When scsalable mode is enabled, the passthrough more is not determined by the context entry but PASID entry, so switch to use the logic of vtd_dev_pt_enabled() to determine the passthrough mode in vtd_do_iommu_translate(). Signed-off-by: Jason Wang --- hw/i386/intel_iommu.c | 38

[PATCH 8/8] ppc/ppc405: Dump specific registers

Signed-off-by: Cédric Le Goater --- target/ppc/cpu_init.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 9ef9a1a5ddd5..8f6a58e82483 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -8689,6 +8689,17 @@ void ppc_

[PATCH 4/8] ppc/ppc405: Restore TCR and STR write handlers

The 405 timers were broken when booke support was added. Assumption was made that the register numbers were the same but it's not : SPR_BOOKE_TSR (0x150) SPR_BOOKE_TCR (0x154) SPR_40x_TSR (0x3D8) SPR_40x_TCR (0x3DA) Cc: Christophe Leroy Fixes:

Re: [PATCH 4/4] dma: Let ld*_dma() propagate MemTxResult

On 12/18/21 15:51, Philippe Mathieu-Daudé wrote: dma_memory_read() returns a MemTxResult type. Do not discard it, return it to the caller. Good ! We should be using it in XIVE. Update the few callers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C.

Re: [PATCH 3/4] dma: Let st*_dma() propagate MemTxResult

On 12/18/21 15:51, Philippe Mathieu-Daudé wrote: dma_memory_write() returns a MemTxResult type. Do not discard it, return it to the caller. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/sysemu/dma.h | 20 ++-- 1 file ch

[PATCH 1/8] target/ppc: Print out literal exception names in logs

It facilitates reading the logs when mask CPU_LOG_INT is activated. We should do the same for error codes. Cc: Fabiano Rosas Signed-off-by: Cédric Le Goater --- target/ppc/excp_helper.c | 75 +++- 1 file changed, 74 insertions(+), 1 deletion(-) diff --git a/

[PATCH 7/8] ppc/ppc405: Introduce a store helper for SPR_40x_PID

The PID SPR of the 405 CPU contains the translation ID of the TLB which is a 8-bit field. Enforce the mask with a store helper. Cc: Christophe Leroy Signed-off-by: Cédric Le Goater --- target/ppc/spr_tcg.h | 1 + target/ppc/cpu_init.c | 2 +- target/ppc/translate.c | 8 3 files chan

[PATCH 5/8] ppc/ppc405: Rework ppc_40x_timers_init() to use a PowerPCCPU

This is a small cleanup to ease reading. Signed-off-by: Cédric Le Goater --- hw/ppc/ppc.c | 42 +++--- 1 file changed, 19 insertions(+), 23 deletions(-) diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index cca99cb86f81..bb5bee9a3382 100644 --- a/hw/ppc/ppc.c +++ b/

Re: [PATCH 1/4] dma: Let st*_dma() take MemTxAttrs argument

On 12/18/21 15:51, Philippe Mathieu-Daudé wrote: Let devices specify transaction attributes when calling st*_dma(). Keep the default MEMTXATTRS_UNSPECIFIED in the few callers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/hw/pci/pci.h

Re: [RFC v2 02/12] target/ppc: powerpc_excp: Set vector earlier

Adding Nicholas. On 12/20/21 19:18, Fabiano Rosas wrote: None of the interrupt setup code touches 'vector', so we can move it earlier in the function. This will allow us to later move the System Call Vectored setup that is on the top level into the POWERPC_EXCP_SYSCALL_VECTORED code block. This

Re: [RFC v2 01/12] target/ppc: powerpc_excp: Set alternate SRRs directly

On 12/20/21 19:18, Fabiano Rosas wrote: There are currently only two interrupts that use alternate SRRs, so let them write to them directly during the setup code. No functional change intented. intended. Signed-off-by: Fabiano Rosas Reviewed-by: Cédric Le Goater Thanks, C. ---

Re: [RFC v2 03/12] target/ppc: powerpc_excp: Move system call vectored code together

Adding Nicholas. On 12/20/21 19:18, Fabiano Rosas wrote: Now that 'vector' is known before calling the interrupt-specific setup code, we can move all of the scv setup into one place. No functional change intended. Signed-off-by: Fabiano Rosas Reviewed-by: Cédric Le Goater Thanks, C.

Re: [RFC v2 04/12] target/ppc: powerpc_excp: Stop passing excp_model around

On 12/20/21 19:18, Fabiano Rosas wrote: We can just access it directly in powerpc_excp. Signed-off-by: Fabiano Rosas Reviewed-by: Cédric Le Goater Thanks, C. --- target/ppc/excp_helper.c | 43 1 file changed, 21 insertions(+), 22 deletions(-)

Re: [PATCH 2/2] qapi/block: Restrict vhost-user-blk to CONFIG_VHOST_USER_BLK_SERVER

Philippe Mathieu-Daudé writes: > Do not list vhost-user-blk in BlockExportType > when CONFIG_VHOST_USER_BLK_SERVER is disabled. > > Fixes: 90fc91d50b7 ("convert vhost-user-blk server to block export API") My immediate reaction was "what exactly is broken before this patch?" I think it's introsp

Re: [PATCH] tests/qtest/virtio-net-failover: Use g_random_int() instead of g_test_rand_int()

On 21/12/2021 20.32, Richard Henderson wrote: On 12/21/21 2:32 AM, Thomas Huth wrote: Using g_file_open_tmp is certainly better ... but the tests are currently written in a way where they require the file name of the temporary file - so switching to g_file_open_tmp() (which only provides a file

[PATCH] target/ppc: Improve logging in Radix MMU

Signed-off-by: Cédric Le Goater --- target/ppc/mmu-radix64.c | 55 +--- 1 file changed, 52 insertions(+), 3 deletions(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 5b0e62e676dc..abfa13f303bb 100644 --- a/target/ppc/mmu-radix64.c +++

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