在2021年12月2日十二月 下午6:01，Philippe Mathieu-Daudé写道：
> On 12/2/21 11:51, Jiaxun Yang wrote:
>> 在2021年11月30日十一月 下午9:52，Philippe Mathieu-Daudé写道：
>>> On 11/30/21 22:17, Jiaxun Yang wrote:
bl_gen_write_ulong uses sd for both 32 and 64 bit CPU,
while sd is illegal on 32 bit CPUs.
Repl
Fuzzer is supposed to stop when first bug is found and report failure.
Present fuzzers fork new child at each iteration to isolate side-effects.
But child's exit code is ignored, i.e. libfuzzer does not see any crashes.
Right now virtio-net fuzzer instantly falls on assert in iov_copy and
dumps cr
TYPE_AVR_CPU inherits TYPE_CPU, which itself inherits TYPE_DEVICE.
TYPE_DEVICE instances are realized using qdev_realize(), we don't
need to access QOM internal values.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/avr/atmega.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/h
HI,
On 2021/12/5 上午1:26, Philippe Mathieu-Daudé wrote:
+
+env->fcsr0_mask = 0x1f1f031f;
Is this for all CPUs or only the 3A5000?
Yes, env->fcsr0_mask = FCSR0_M1 | FCSR0_M2 | FCSR0_M3 = 0x1f1f031f;
Thanks
Song Gao
Hi, Xiaojuan,
On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote:
>
> Emulate a 3A5000 board use the new loongarch instruction.
> 3A5000 belongs to the Loongson3 series processors.
> The board consists of a 3A5000 cpu model and the 7A1000
> bridge. The host 3A5000 board is really complicated and
Hi, Xiaojuan,
Maybe it is better to use "constant timer" instead of "stable timer",
which is more "native" in English.
Huacai
On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote:
>
> Signed-off-by: Xiaojuan Yang
> Signed-off-by: Song Gao
> ---
> target/loongarch/cpu.c | 9 +
> ta
On Fri, Dec 3, 2021 at 8:14 PM Peter Xu wrote:
>
> On Fri, Dec 03, 2021 at 10:46:46AM +, David Woodhouse wrote:
> > On Fri, 2021-12-03 at 15:38 +0800, Peter Xu wrote:
> > > On Thu, Dec 02, 2021 at 11:49:25AM +0800, Jason Wang wrote:
> > > > On Thu, Dec 2, 2021 at 4:55 AM David Woodhouse
> >
Hi,
On 12/05/2021 01:54 AM, Philippe Mathieu-Daudé wrote:
> On 12/4/21 13:07, Xiaojuan Yang wrote:
>> 1.Add uart,virtio-net,vga and usb for 3A5000.
>> 2.Add irq set and map for the pci host. Non pci device
>> use irq 0-16, pci device use 16-64.
>> 3.Add some unimplented device to emulate guest unu
Hi, Huacai
On 12/06/2021 12:36 PM, chen huacai wrote:
> Hi, Xiaojuan,
>
> On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote:
>>
>> Emulate a 3A5000 board use the new loongarch instruction.
>> 3A5000 belongs to the Loongson3 series processors.
>> The board consists of a 3A5000 cpu model and the
