Signed-off-by: LIU Zhiwei
---
target/riscv/cpu.c| 1 +
target/riscv/cpu.h| 3 +++
target/riscv/cpu_helper.c | 3 ++-
target/riscv/csr.c| 2 ++
target/riscv/machine.c| 5 +++--
5 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/r
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/csr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index d4ee897be2..bfafd3bd96 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 17ee3
Signed-off-by: LIU Zhiwei
Acked-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index ef1d87af38..347428ffdc 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -106,7 +
Replace the array of pm_mask/pm_base with scalar variables.
Remove the cached array value in DisasContext.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/translate.c | 32
1 file changed, 8 insertions(+),
The mask comes from the pointer masking extension, or the max value
corresponding to XLEN bits.
Signed-off-by: LIU Zhiwei
Acked-by: Alistair Francis
---
target/riscv/vector_helper.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/target/riscv/vector_
Use cached cur_pmmask and cur_pmbase to infer the
current PM mode.
This may decrease the TCG IR by one when pm_enabled
is true and pm_base_enabled is false.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h| 3 ++-
target/ri
We need not specially process vtype when XLEN changes.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 1 +
target/riscv/cpu_helper.c| 3 +--
target/riscv/csr.c | 13 -
target/riscv/machine.c
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu_bits.h | 2 ++
target/riscv/csr.c | 8 +---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 9913fa9f77..510
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 5 +
target/riscv/vector_helper.c | 7 +--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 2cee98f152..
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 1e56405243..2cee98f152 100644
--- a/target/riscv/cpu.h
+++ b/target/ris
Only check the range that has passed the address translation.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/vector_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/ri
When sew <= 32bits, not need to extend scalar reg.
When sew > 32bits, if xlen is less that sew, we should sign extend
the scalar register, except explicitly specified by the spec.
Signed-off-by: LIU Zhiwei
---
target/riscv/insn_trans/trans_rvv.c.inc | 44 ++---
1 file changed
On 11/25/21 01:45, BALATON Zoltan wrote:
On Wed, 24 Nov 2021, Fabiano Rosas wrote:
Fabiano Rosas writes:
Hi all,
We have this bug in QEMU which indicates that we haven't been able to
run openbios on a 7450 cpu for quite a long time:
https://gitlab.com/qemu-project/qemu/-/issues/86
OK:
$
Hi Mark,
On 11/11/2021 10:49 PM, Mark Cave-Ayland wrote:
> On 11/11/2021 01:35, Xiaojuan Yang wrote:
>
>> This patch realize the EIOINTC interrupt controller.
>>
>> Signed-off-by: Xiaojuan Yang
>> Signed-off-by: Song Gao
>> ---
>> hw/intc/Kconfig| 3 +
>> hw/intc/loonga
On 25.11.21 03:20, Jason Wang wrote:
> We only process the first in sg which may lead to the bitmap of the
> pages belongs to following sgs were not cleared. This may result more
> pages to be migrated. Fixing this by process all in sgs for
> free_page_vq.
>
> Signed-off-by: Jason Wang
> ---
> h
On 11/25/21 03:20, Jason Wang wrote:
> We only process the first in sg which may lead to the bitmap of the
> pages belongs to following sgs were not cleared. This may result more
> pages to be migrated. Fixing this by process all in sgs for
> free_page_vq.
>
> Signed-off-by: Jason Wang
> ---
> h
Jean-Philippe Brucker writes:
> Hi Markus,
>
> On Thu, Nov 25, 2021 at 08:11:04AM +0100, Markus Armbruster wrote:
>> Peter, this patch fixes a bug that became a regression when the fix
>> missed 6.1. It's been stuck on the list since August. Please have a
>> look, and if it's good, get it merge
No code change
Suggested-by: Richard Henderson
Signed-off-by: Song Gao
---
linux-user/aarch64/target_signal.h| 18 --
linux-user/arm/target_signal.h| 18 --
linux-user/cris/target_signal.h | 18 --
linux-user/generic/signal.h
"Michael S. Tsirkin" writes:
> On Thu, Nov 25, 2021 at 08:12:25AM +0100, Markus Armbruster wrote:
>> Michael & Marcel, this patch fixes a bug that became a regression when
>> the fix missed 6.1. It's been stuck on the list since August. Please
>> have a look, and if it's good, get it merged.
>
TARGET_MINSIGSTKSZ has been defined in generic/signal.h
or target_signal.h, We don't need to define it again.
Signed-off-by: Song Gao
---
linux-user/aarch64/target_syscall.h| 1 -
linux-user/alpha/target_syscall.h | 1 -
linux-user/arm/target_syscall.h| 1 -
linux-user/cris/targ
Denis Plotnikov writes:
> This is needed to keep sending DEVICE_DELETED events on qemu cleanup.
> The event may happen in the rcu thread and we're going to flush the rcu queue
> explicitly before qemu exiting in the next patch. So move the monitor
> destruction to the very end of qemu cleanup to
Hi!
On Thu, Nov 25, 2021 at 01:45:00AM +0100, BALATON Zoltan wrote:
> As for guests, those running on the said PowerMac G4 should have support
> for these CPUs so maybe you can try some Mac OS X versions (or maybe
OSX uses hardware pagetables.
> MorphOS but that is not the best for debugging a
Le 25/11/2021 à 09:55, Song Gao a écrit :
No code change
Suggested-by: Richard Henderson
Signed-off-by: Song Gao
---
linux-user/aarch64/target_signal.h| 18 --
linux-user/arm/target_signal.h| 18 --
linux-user/cris/target_signal.h | 18
Le 25/11/2021 à 09:58, Song Gao a écrit :
TARGET_MINSIGSTKSZ has been defined in generic/signal.h
or target_signal.h, We don't need to define it again.
Signed-off-by: Song Gao
---
linux-user/aarch64/target_syscall.h| 1 -
linux-user/alpha/target_syscall.h | 1 -
linux-user/arm/targ
On Wed, Nov 24, 2021 at 08:35:35PM +0100, Paolo Bonzini wrote:
> On 11/19/21 11:15, Kashyap Chamarthy wrote:
> > Noted; so these two pages:
> >
> > -https://www.qemu.org/contribute/security-process/
> > -https://www.qemu.org/contribute/report-a-bug/
I posted a series for above two here:
http
Hi,
On 2021/11/25 16:55, Song Gao wrote:
> diff --git a/linux-user/generic/signal.h b/linux-user/generic/signal.h
> index 943bc1a..ceaf8a8 100644
> --- a/linux-user/generic/signal.h
> +++ b/linux-user/generic/signal.h
> @@ -55,6 +55,22 @@
> #define TARGET_SIG_UNBLOCK1/* for unblocking
On 11/25/21 4:03 AM, gaosong wrote:
I also see that TARGET_SIGSTKSZ is not used. I think we should delete it.
Agreed. This constant will have been baked into the guest executable.
r~
On 11/25/21 09:58, Song Gao wrote:
> TARGET_MINSIGSTKSZ has been defined in generic/signal.h
> or target_signal.h, We don't need to define it again.
>
> Signed-off-by: Song Gao
> ---
> linux-user/aarch64/target_syscall.h| 1 -
> linux-user/alpha/target_syscall.h | 1 -
> linux-user/arm/
Qemu falls back on userland handlers even if vhost-user and vhost-vdpa
cases. These assumes a tap device can handle the packets.
If a vdpa device fail to start, it can trigger a sigsegv because of
that. Add dummy receivers that return no progress so it can keep
running.
Tested with a modified ver
The message has never been true in the case of non tap networking, so
only tell that userland networking will be used if possible.
Signed-off-by: Eugenio Pérez
---
hw/net/virtio-net.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/vir
On 11/24/21 6:25 PM, Lucas Mateus Castro (alqotel) wrote:
mtfsf, mtfsfi and mtfsb1 instructions call helper_float_check_status
after updating the value of FPSCR, but helper_float_check_status
checks fp_status and fp_status isn't updated based on FPSCR and
since the value of fp_status is reset ear
On Tue, Nov 23, 2021 at 10:38 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> Suggested-by: Peter Maydell
> Signed-off-by: Richard Henderson
> ---
> linux-user/host/aarch64/safe-syscall.inc.S | 110 +++---
> linux-user/host/arm/safe-syscall.inc.S | 134
Qemu falls back on userland handlers even if vhost-user and vhost-vdpa
cases. These assumes a tap device can handle the packets.
If a vdpa device fail to start, it can trigger a sigsegv because of
that. Add dummy receiver that returns no progress so it can keep
running.
Fixes: 1e0a84ea49 ("vhost-
On 11/24/21 6:25 PM, Lucas Mateus Castro (alqotel) wrote:
Added tests for the mtfsf to check if FI bit of FPSCR is being set
and if exception calls are being made correctly.
Signed-off-by: Lucas Mateus Castro (alqotel)
---
tests/tcg/ppc64/Makefile.target | 1 +
tests/tcg/ppc64le/Makefile.
On Tue, Nov 23, 2021 at 10:38 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> Signed-off-by: Richard Henderson
> ---
> linux-user/host/mips/hostdep.h | 3 +
> linux-user/host/mips/safe-syscall.inc.S | 123
> 2 files changed, 126 insertions(+)
>
On Tue, Nov 23, 2021 at 10:38 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> The current api from safe_syscall_base() is to return -errno, which is
> the interface provided by *some* linux kernel abis. The wrapper macro,
> safe_syscall(), detects error, stores into errno, and retur
On Wed, Nov 24, 2021 at 7:56 AM Philippe Mathieu-Daudé
wrote:
> On 11/24/21 15:16, Cleber Rosa wrote:
> > Hi,
> >
> > Fosshost.org was kind enough to supply the QEMU project with a public
> > VM hosted by them. The original use case we anticipated was to set up
> > a GitLab CI runner, because we
On Wed, Nov 24, 2021 at 03:55:55PM +0100, Philippe Mathieu-Daudé wrote:
> On 11/24/21 15:16, Cleber Rosa wrote:
> > Hi,
> >
> > Fosshost.org was kind enough to supply the QEMU project with a public
> > VM hosted by them. The original use case we anticipated was to set up
> > a GitLab CI runner, b
On 24.11.21 17:15, Philippe Mathieu-Daudé wrote:
We are going to re-use this code in the next commit,
so extract it as a new blk_create_empty_drive() function.
Inspired-by: Hanna Reitz
:)
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/fdc.c | 9 +++--
1 file changed, 7 insertion
On Wed, Nov 24, 2021 at 5:33 PM Philippe Mathieu-Daudé wrote:
>
> Hi Frédéric,
>
> On 11/24/21 07:55, Frédéric Pétrot wrote:
> > On 24/11/2021 07:12, Alistair Francis wrote:
> >> On Sat, Nov 13, 2021 at 1:16 AM Frédéric Pétrot
> >> wrote:
> >>>
> >>> This patch is kind of a mess because several f
On 24.11.21 17:15, Philippe Mathieu-Daudé wrote:
Without the previous commit, when running 'make check-qtest-i386'
with QEMU configured with '--enable-sanitizers' we get:
AddressSanitizer:DEADLYSIGNAL
=
==287878==ERROR: Add
On Wed, Nov 24, 2021 at 03:26:30PM +0100, Łukasz Gieryk wrote:
> On Wed, Nov 24, 2021 at 09:04:31AM +0100, Klaus Jensen wrote:
> > On Nov 16 16:34, Łukasz Gieryk wrote:
> > > With four new properties:
> > > - sriov_v{i,q}_flexible,
> > > - sriov_max_v{i,q}_per_vf,
> > > one can configure the numb
x-native-hotplug property, when used in order to disable HPC bit on the PCIE
root ports, can lead to unexpected results from the guest operating system.
Users are strongly advised not to touch this property in order to manipulte the
HPC bit. Add a word of caution in the pcie.txt doc file to documen
On 11/25/21 12:57, Hanna Reitz wrote:
> On 24.11.21 17:15, Philippe Mathieu-Daudé wrote:
>> Without the previous commit, when running 'make check-qtest-i386'
>> with QEMU configured with '--enable-sanitizers' we get:
>>
>> AddressSanitizer:DEADLYSIGNAL
>> =
在 2021/11/24 23:33, Markus Armbruster 写道:
huang...@chinatelecom.cn writes:
From: Hyman Huang(黄勇)
Implement dirtyrate calculation periodically basing on
dirty-ring and throttle vCPU until it reachs the quota
dirtyrate given by user.
Introduce qmp commands set-dirty-limit/cancel-dirty-limit
[+cc jejb, tobin, jim, hubertus]
On 25/11/2021 9:14, Sergio Lopez wrote:
> On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
>> * Daniel P. Berrangé (berra...@redhat.com) wrote:
>>> On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote:
Hi,
We recently
On 11/24/21 15:51, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Wed, Nov 24, 2021 at 02:50:11PM +0100, Markus Armbruster wrote:
Damien Hedde writes:
The biggest difference is the fw_cfg option I think: it is related
with the rom_set_order_override()/rom_reset_order_override()
Hi,
On 2021/11/25 下午6:08, WANG Xuerui wrote:
+
+#define TARGET_MINSIGSTKSZ 2048
While all the architectures you de-duplicated here have
TARGET_MINSIGSTACKSZ as 2048, some others specify a different value
(mostly 4096, e.g. alpha), as can be seen in your next patch (which
should belong to thi
On Wed, Nov 24, 2021 at 03:51:23PM +0100, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > On Wed, Nov 24, 2021 at 02:50:11PM +0100, Markus Armbruster wrote:
> >> Damien Hedde writes:
> >>
> >> > The biggest difference is the fw_cfg option I think: it is related
> >> > with the rom_s
On 24.11.21 13:56, Peng Liang via wrote:
Hi folks,
When we test migration with raw-format disk, we found that the QEMU
process in the dst will lose the write lock after migration. However,
the QEMU process in the dst will still hold the write lock for
qcow2-format disk.
After reading some bloc
Hello Paolo,
Our customer used the Libvirt XML to start a SGX VM, but failed.
libvirt.libvirtError: internal error: unable to execute QEMU command 'qom-get':
Property 'sgx-epc.unavailable-features' not found
The XML file,
The new compound property command shou
* Sergio Lopez (s...@redhat.com) wrote:
> On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > > On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote:
> > > > Hi,
> > > >
> > > > We recently discussed a way for r
On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote:
> > > Hi,
> > >
> > > We recently discussed a way for remote SEV guest attestation through QEMU.
> > > My i
On Thu, Nov 25, 2021 at 08:14:28AM +0100, Sergio Lopez wrote:
> On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > > On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote:
> > > > Hi,
> > > >
> > > > We recently
On Thu, Nov 25, 2021 at 02:44:51PM +0200, Dov Murik wrote:
> [+cc jejb, tobin, jim, hubertus]
>
>
> On 25/11/2021 9:14, Sergio Lopez wrote:
> > On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> >> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> >>> On Wed, Nov 24, 2021
On 25/11/2021 15:27, Daniel P. Berrangé wrote:
> On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
>> * Daniel P. Berrangé (berra...@redhat.com) wrote:
>>> On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote:
Hi,
We recently discussed a way for remo
On Thu, Nov 25, 2021 at 08:14:28AM +0100, Sergio Lopez wrote:
> For SEV-SNP, this is pretty much the end of the story, because the
> attestation exchange is driven by an agent inside the guest. Well,
> there's also the need to have in the VM a well-known vNIC bridged to a
> network that's routed to
Hi,
Peng Liang has reported an issue regarding migration of raw images here:
https://lists.nongnu.org/archive/html/qemu-block/2021-11/msg00673.html
It turns out that after migrating, all permissions are shared when they
weren’t before. The cause of the problem is that we deliberately delay
restr
This test checks that a raw image in use by a virtio-blk device does not
share the WRITE permission both before and after migration.
Signed-off-by: Hanna Reitz
---
.../qemu-iotests/tests/migration-permissions | 101 ++
.../tests/migration-permissions.out | 5 +
2 fil
After migration, the permissions the guest device wants to impose on its
BlockBackend are stored in blk->perm and blk->shared_perm. In
blk_root_activate(), we take our permissions, but keep all shared
permissions open by calling `blk_set_perm(blk->perm, BLK_PERM_ALL)`.
Only afterwards (immediatel
Hyman Huang writes:
> 在 2021/11/24 23:33, Markus Armbruster 写道:
>> huang...@chinatelecom.cn writes:
>>
>>> From: Hyman Huang(黄勇)
>>>
>>> Implement dirtyrate calculation periodically basing on
>>> dirty-ring and throttle vCPU until it reachs the quota
>>> dirtyrate given by user.
>>>
>>> Introdu
On 25/11/2021 15:52, Daniel P. Berrangé wrote:
> On Thu, Nov 25, 2021 at 08:14:28AM +0100, Sergio Lopez wrote:
>> For SEV-SNP, this is pretty much the end of the story, because the
>> attestation exchange is driven by an agent inside the guest. Well,
>> there's also the need to have in the VM a
[+cc Tom, Brijesh]
On 25/11/2021 15:42, Daniel P. Berrangé wrote:
> On Thu, Nov 25, 2021 at 02:44:51PM +0200, Dov Murik wrote:
>> [+cc jejb, tobin, jim, hubertus]
>>
>>
>> On 25/11/2021 9:14, Sergio Lopez wrote:
>>> On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
* Dan
On Thu, Nov 25, 2021 at 03:50:46PM +0200, Dov Murik wrote:
>
>
> On 25/11/2021 15:27, Daniel P. Berrangé wrote:
> > On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> >> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> >>> On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler
On Thu, 25 Nov 2021, Cédric Le Goater wrote:
On 11/25/21 01:45, BALATON Zoltan wrote:
On Wed, 24 Nov 2021, Fabiano Rosas wrote:
Fabiano Rosas writes:
Hi all,
We have this bug in QEMU which indicates that we haven't been able to
run openbios on a 7450 cpu for quite a long time:
https://gitl
On Thu, 25 Nov 2021, David Gibson wrote:
On Thu, Nov 25, 2021 at 01:49:46AM +0100, BALATON Zoltan wrote:
On Wed, 24 Nov 2021, Lucas Mateus Castro (alqotel) wrote:
mtfsf, mtfsfi and mtfsb1 instructions call helper_float_check_status
after updating the value of FPSCR, but helper_float_check_statu
On 11/25/21 14:53, Hanna Reitz wrote:
> After migration, the permissions the guest device wants to impose on its
> BlockBackend are stored in blk->perm and blk->shared_perm. In
> blk_root_activate(), we take our permissions, but keep all shared
> permissions open by calling `blk_set_perm(blk->perm
On Wed, Nov 24, 2021 at 09:03:06AM +0100, Klaus Jensen wrote:
> Hi Lukasz,
>
> I've been through this. I have a couple of review comments, but overall
> looks good for inclusion in nvme-next. Would be nice to get this in
> early in the cycle so it can mature there for 7.0.
We (I’m speaking on beh
https://qemu.readthedocs.io/en/latest/system/target-ppc.html
Yes, I thought about that but haven't got to it yet. I'm also not sure what
should I put in that doc so if you have time feel free to copy from the above
URLs what you think is better to have in the docs. Otherwise I'll do it
somet
On 25/11/2021 12:47, Alistair Francis wrote:
On Wed, Nov 24, 2021 at 5:33 PM Philippe Mathieu-Daudé wrote:
Hi Frédéric,
On 11/24/21 07:55, Frédéric Pétrot wrote:
On 24/11/2021 07:12, Alistair Francis wrote:
On Sat, Nov 13, 2021 at 1:16 AM Frédéric Pétrot
wrote:
This patch is kind of a me
** Changed in: ubuntu
Status: New => Invalid
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1603636
Title:
Guest has not initialized the display yet on ubuntu 16.10 PPC
Status in QEMU:
Fix
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Thu, Nov 25, 2021 at 08:14:28AM +0100, Sergio Lopez wrote:
> > For SEV-SNP, this is pretty much the end of the story, because the
> > attestation exchange is driven by an agent inside the guest. Well,
> > there's also the need to have in the VM
Hi,
In this new version considerable changes were made based on David's
feedback of the previous version. All the counter frozen logic was
moved from the body of helper_store_mmcr0 to pmc_get_event() via a
new PMUEventType called PMU_EVENT_INACTIVE. The function
pmu_update_cycles() is now called i
This patch starts an IBM Power8+ compatible PMU implementation by adding
the representation of PMU events that we are going to sample,
PMUEventType. This enum represents a Perf event that is being sampled by
a specific counter 'sprn'. Events that aren't available (i.e. no event
was set in MMCR1) wi
This patch adds the barebones of the PMU logic by enabling cycle
counting. The overall logic goes as follows:
- MMCR0 reg initial value is set to 0x8000 (MMCR0_FC set) to avoid
having to spin the PMU right at system init;
- to retrieve the events that are being profiled, pmc_get_event() will
MMCR1 determines the events to be sampled by the PMU. Updating the
counters at every MMCR1 write ensures that we're not sampling more
or less events by looking only at MMCR0 and the PMCs.
It is worth noticing that both the Book3S PowerPC PMU, and this IBM
Power8+ PMU that we're modeling, also uses
The PMU is already counting cycles by calculating time elapsed in
nanoseconds. Counting instructions is a different matter and requires
another approach.
This patch adds the capability of counting completed instructions
(Perf event PM_INST_CMPL) by counting the amount of instructions
translated in
Calling pmu_update_cycles() on every PMC read/write operation ensures
that the values being fetched are up to date with the current PMU state.
In theory we can get away by just trapping PMCs reads, but we're going
to trap PMC writes to deal with counter overflow logic later on. Let's
put the requ
An Event-Based Branch (EBB) allows applications to change the NIA when a
event-based exception occurs. Event-based exceptions are enabled by
setting the Branch Event Status and Control Register (BESCR). If the
event-based exception is enabled when the exception occurs, an EBB
happens.
The followin
From: Gustavo Romero
Following up the rfebb implementation, this patch adds the EBB exception
support that are triggered by Performance Monitor alerts. This exception
occurs when an enabled PMU condition or event happens and both MMCR0_EBE
and BESCR_PME are set.
The supported PM alerts will cons
PM_RUN_INST_CMPL, instructions completed with the run latch set, is
the architected PowerISA v3.1 event defined with PMC4SEL = 0xFA.
Implement it by checking for the CTRL RUN bit before incrementing the
counter. To make this work properly we also need to force a new
translation block each time SPR
The PowerISA v3.1 defines that if the proper bits are set (MMCR0_PMC1CE
for PMC1 and MMCR0_PMCjCE for the remaining PMCs), counter negative
conditions are enabled. This means that if the counter value overflows
(i.e. exceeds 0x8000) a performance monitor alert will occur. This alert
can trigger
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > > On Wed, Nov 24, 2021 at 11:34:16AM -0500, Tyler Fanelli wrote:
> > > > Hi,
> > > >
> > > > We recently discussed a
The current logic is only considering event-based exceptions triggered
by the performance monitor. This is true now, but we might want to add
support for external event-based exceptions in the future.
Let's make it a bit easier to do so by adding the bit logic that would
happen in case we were dea
Shashi Mallela writes:
> When Enabled bit is cleared in GITS_CTLR,ITS feature continues
> to be enabled.This patch fixes the issue.
>
> Signed-off-by: Shashi Mallela
Tested-by: Alex Bennée
in so far as it doesn't break the kvm-unit-tests but it also doesn't
solve the:
irq 55: nobody car
On Thu, Nov 25, 2021 at 02:44:51PM +0200, Dov Murik wrote:
> [+cc jejb, tobin, jim, hubertus]
>
>
> On 25/11/2021 9:14, Sergio Lopez wrote:
> > On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> >> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> >>> On Wed, Nov 24, 2021
* Sergio Lopez (s...@redhat.com) wrote:
> On Thu, Nov 25, 2021 at 02:44:51PM +0200, Dov Murik wrote:
> > [+cc jejb, tobin, jim, hubertus]
> >
> >
> > On 25/11/2021 9:14, Sergio Lopez wrote:
> > > On Wed, Nov 24, 2021 at 06:29:07PM +, Dr. David Alan Gilbert wrote:
> > >> * Daniel P. Berrangé (
Here we introduce a new compiler flag to disable the checking of exit
request (icount_decr.u32). This is useful when we want to ensure the
next block cannot be preempted by an asynchronous event.
Suggested-by: Richard Henderson
Signed-off-by: Alex Bennée
---
v2
- split from larger patch
- r
From: Willian Rampazzo
Remove me as a reviewer for the Build and test automation and the
Integration Testing with the Avocado Framework and add Beraldo
Leal.
Signed-off-by: Willian Rampazzo
Reviewed-by: Beraldo Leal
Message-Id: <20211122191124.31620-1-willi...@redhat.com>
Signed-off-by: Alex B
Hi,
As the release process rolls on here if the current state of my
for-6.2 tree. There are fixes for TCG, plugins, build and test.
For v2 I split the CF_NOIRQ patches and simplified a little bit. I
tested with a custom trace point while using watchpoints on the x86_64
memory TCG test. A proper t
When we cleaned up argument handling the test was missed.
Fixes: 5ae589faad ("tests/plugins/mem: introduce "track" arg and make args not
positional")
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211123205729.2205806-4-alex.ben...@
When we set cpu->cflags_next_tb it is because we want to carefully
control the execution of the next TB. Currently there is a race that
causes the second stage of watchpoint handling to get ignored if an
IRQ is processed before we finish executing the instruction that
triggers the watchpoint. Use t
Signed-off-by: Alex Bennée
Tested-by: Stefan Weil
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/712
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211123205729.2205806-5-alex.ben...@linaro.org>
---
plugins/meson.build | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --
From: Philippe Mathieu-Daudé
Add a MAINTAINERS section to cover the GitLab YAML config file
containing the jobs run on the custom runner sponsored by the
Works On Arm project [*].
[*] https://developer.arm.com/solutions/infrastructure/works-on-arm
Suggested-by: Thomas Huth
Signed-off-by: Phili
On Wed, 24 Nov 2021 at 18:22, Shashi Mallela wrote:
>
> When Enabled bit is cleared in GITS_CTLR,ITS feature continues
> to be enabled.This patch fixes the issue.
>
> Signed-off-by: Shashi Mallela
> ---
> hw/intc/arm_gicv3_its.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
>
On Thu, 25 Nov 2021 at 15:19, Alex Bennée wrote:
>
>
> Shashi Mallela writes:
>
> > When Enabled bit is cleared in GITS_CTLR,ITS feature continues
> > to be enabled.This patch fixes the issue.
> >
> > Signed-off-by: Shashi Mallela
>
>
> Tested-by: Alex Bennée
>
> in so far as it doesn't break t
When dealing with multi-threaded userspace programs there is a race
condition with the addition of cpu->opaque (aka TaskState). This is
due to cpu_copy calling cpu_create which updates the global vCPU list.
However the task state isn't set until later. This shouldn't be a
problem because the new th
On Thu, Nov 25, 2021 at 03:40:36PM +, Dr. David Alan Gilbert wrote:
> * Sergio Lopez (s...@redhat.com) wrote:
> > On Thu, Nov 25, 2021 at 02:44:51PM +0200, Dov Murik wrote:
> > >
> > > SEV-ES has pre-launch measurement and secret injection, just like SEV
> > > (except that the measurement incl
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Thu, Nov 25, 2021 at 03:40:36PM +, Dr. David Alan Gilbert wrote:
> > * Sergio Lopez (s...@redhat.com) wrote:
> > > On Thu, Nov 25, 2021 at 02:44:51PM +0200, Dov Murik wrote:
> > > >
> > > > SEV-ES has pre-launch measurement and secret inje
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