On Thu, Nov 11, 2021 at 03:14:56PM -0500, Michael S. Tsirkin wrote:
> On Thu, Nov 11, 2021 at 06:33:44PM +0300, Roman Kagan wrote:
> > Error propagation between the generic vhost code and the specific backends
> > is
> > not quite consistent: some places follow "return -1 and set errno"
> > conve
чт, 11 нояб. 2021 г., 11:49 PM Eric Blake :
> On Thu, Nov 11, 2021 at 06:21:28PM +0300, Vladislav Yaroshchuk wrote:
> >
> > > +#
> > > > +# Since: 6.2
> > >
> > > Missed 6.2, please adjust. More of the same below.
> > >
> > >
> > The next one is 6.3, isn't it?
>
> 7.0, actually, as it will be the
Hi
On Thu, Nov 11, 2021 at 7:44 PM Roman Kagan wrote:
> As its name suggests, ChardevClass.chr_sync_read is supposed to do a
> blocking read. The only implementation of it, tcp_chr_sync_read, does
> set the underlying io channel to the blocking mode indeed.
>
> Therefore a failure return with E
On 14:11 Thu 11 Nov , Jamie Iles wrote:
> Various loader functions return an int which limits images to 2GB which
> is fine for things like a BIOS/kernel image, but if we want to be able
> to load memory images or large ramdisks then any file over 2GB would
> silently fail to load.
>
> Cc: Luc
On Thu, Nov 11, 2021 at 7:36 PM Roman Kagan wrote:
> After the return from tcp_chr_recv, tcp_chr_sync_read calls into a
> function which eventually makes a system call and may clobber errno.
>
> Make a copy of errno right after tcp_chr_recv and restore the errno on
> return from tcp_chr_sync_read
On Thu, Nov 11, 2021 at 7:38 PM Roman Kagan wrote:
> tcp_chr_recv communicates the specific error condition to the caller via
> errno. However, after setting it, it may call into some system calls or
> library functions which can clobber the errno.
>
> Avoid this by moving the errno assignment t
On Thu, 11 Nov 2021, Ani Sinha wrote:
>
>
> On Thu, 11 Nov 2021, Ani Sinha wrote:
>
> >
> >
> > On Thu, 11 Nov 2021, Michael S. Tsirkin wrote:
> >
> > > On Wed, Nov 10, 2021 at 04:11:40PM -0500, Igor Mammedov wrote:
> > > > From: Julia Suvorova
> > > >
> > > > The changes are the result of
> >
Signed-off-by: Vladislav Yaroshchuk
---
meson.build | 4
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh | 3 +++
3 files changed, 9 insertions(+)
diff --git a/meson.build b/meson.build
index 2ece4fe088..202e04af31 100644
--- a/meson.build
+++ b/meson.b
macOS provides networking API for VMs called 'vmnet.framework':
https://developer.apple.com/documentation/vmnet
We can provide its support as the new QEMU network backends which
represent three different vmnet.framework interface usage modes:
* `vmnet-shared`:
allows the guest to communicat
Create separate netdevs for each vmnet operating mode:
- vmnet-host
- vmnet-shared
- vmnet-bridged
Signed-off-by: Vladislav Yaroshchuk
---
net/clients.h | 11
net/meson.build | 7 +++
net/net.c | 10
net/vmnet-bridged.m | 25 +
net/vmnet-common.m | 20
Signed-off-by: Vladislav Yaroshchuk
---
net/vmnet-host.c | 99 +---
1 file changed, 93 insertions(+), 6 deletions(-)
diff --git a/net/vmnet-host.c b/net/vmnet-host.c
index 4a5ef99dc7..f7dbd3f9bf 100644
--- a/net/vmnet-host.c
+++ b/net/vmnet-host.c
@@ -
Signed-off-by: Phillip Tennen
Signed-off-by: Vladislav Yaroshchuk
---
net/vmnet-common.m | 305 +
net/vmnet-shared.c | 75 ++-
net/vmnet_int.h| 23
3 files changed, 399 insertions(+), 4 deletions(-)
diff --git a/net/vmnet-common.m b
Signed-off-by: Vladislav Yaroshchuk
---
net/vmnet-bridged.m | 98 ++---
1 file changed, 92 insertions(+), 6 deletions(-)
diff --git a/net/vmnet-bridged.m b/net/vmnet-bridged.m
index 4e42a90391..3c9da9dc8b 100644
--- a/net/vmnet-bridged.m
+++ b/net/vmnet-br
Signed-off-by: Vladislav Yaroshchuk
---
qemu-options.hx | 25 +
1 file changed, 25 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index 7749f59300..350d43bbc0 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -2677,6 +2677,25 @@ DEF("netdev", HAS_ARG, QE
On 11/3/21 09:16, Longpeng(Mike) wrote:
Extract a common helper that add MSI route for specific vector
but does not commit immediately.
Signed-off-by: Longpeng(Mike)
I think adding the new function is not necessary; I have no problem
moving the call to kvm_irqchip_commit_routes to the caller
On Wed, Nov 10, 2021 at 04:11:35PM -0500, Igor Mammedov wrote:
> Changelog:
> v2:
> * simplify [1/5] and rename property to x-native-hotplug (CC stable)
> * [4/5]
>- rename function parameter to reflect actual action
>- drop local 'hotplug' variable and opencode statement
On Fri, Nov 12, 2021 at 10:46:46AM +0300, Roman Kagan wrote:
> On Thu, Nov 11, 2021 at 06:59:43PM +0100, Philippe Mathieu-Daudé wrote:
> > On 11/11/21 16:33, Roman Kagan wrote:
> > > Fix the (hypothetical) potential problem when the value parsed out of
> > > the vhost module parameter in sysfs over
Hi Richard,
On 2021/11/12 下午3:39, Richard Henderson wrote:
On 11/12/21 7:53 AM, Song Gao wrote:
+const char * const fccregnames[8] = {
+ "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5", "$fcc6",
"$fcc7",
+};
static.
OK.
+static void output_fcsrdrj(DisasContext *ctx, arg_fmt_fcsrdrj
On Fri, Nov 12, 2021 at 10:23:12AM +0800, Jason Wang wrote:
> On Thu, Nov 11, 2021 at 4:27 PM Michael S. Tsirkin wrote:
> >
> > On Thu, Nov 11, 2021 at 02:38:53PM +0800, Jason Wang wrote:
> > > We used to access packed descriptor flags via
> > > address_space_{write|read}_cached(). When we hit the
On 11.11.21 10:55, Pavel Dovgalyuk wrote:
> Watchpoint may be processed in two phases. First one is detecting
> the instruction with target memory access. And the second one is
> executing only one instruction and setting the debug interrupt flag.
> Hardware interrupts can break this sequence when
On Fri, Nov 12, 2021 at 02:10:36AM -0300, Leonardo Bras wrote:
> Adds io_writev_zerocopy and io_flush_zerocopy as optional callback to
> QIOChannelClass,
> allowing the implementation of zerocopy writes by subclasses.
>
> How to use them:
> - Write data using qio_channel_writev_zerocopy(),
> - Wa
On Fri, Nov 12, 2021 at 02:10:37AM -0300, Leonardo Bras wrote:
> Change qio_channel_socket_writev() in order to accept flags, so its possible
> to selectively make use of sendmsg() flags.
>
> qio_channel_socket_writev() contents were moved to a helper function
> qio_channel_socket_writev_flags() w
Hi,
> involved, but I think it's more a question of luck. This until these
> specific patches, but they are only in v2 out of rfc status just today.
Never posted a formal non-rfc version because I had no pending changes.
Maybe I should have done that ...
v2 has no functional changes, it only
On Fri, 12 Nov 2021 04:47:05 -0500
"Michael S. Tsirkin" wrote:
> On Wed, Nov 10, 2021 at 04:11:35PM -0500, Igor Mammedov wrote:
> > Changelog:
> > v2:
> > * simplify [1/5] and rename property to x-native-hotplug (CC stable)
> > * [4/5]
> >- rename function parameter to reflect a
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Similarly to the previous patches, split block-backend.h
in block-backend-io.h and block-backend-global-state.h
In addition, remove "block/block.h" include as it seems
it is not necessary anymore, together with "qemu/iov.h"
block-backend-comm
On Fri, Nov 12, 2021 at 10:13:01AM +, Daniel P. Berrangé wrote:
> On Fri, Nov 12, 2021 at 02:10:36AM -0300, Leonardo Bras wrote:
> > Adds io_writev_zerocopy and io_flush_zerocopy as optional callback to
> > QIOChannelClass,
> > allowing the implementation of zerocopy writes by subclasses.
> >
Cleber Rosa writes:
> This adds a new custom runner, showing an example of how other
> entities can add their own custom jobs to the GitLab CI pipeline.
>
>
> One example of a job introduced here, running on the host reserved for
> this purpose can be seen at:
>
> - https://gitlab.com/cleber.
On Thu, 11 Nov 2021 08:55:24 +0530 (IST)
Ani Sinha wrote:
> On Wed, 10 Nov 2021, Igor Mammedov wrote:
>
> > Mark property as experimental/internal adding 'x-' prefix.
> >
> > Property was introduced in 6.1 and it should have provided
> > ability to turn on native PCIE hotplug on port even when
>
On Thu, 11 Nov 2021 11:19:30 +0530 (IST)
Ani Sinha wrote:
> On Wed, 10 Nov 2021, Igor Mammedov wrote:
>
> > From: Julia Suvorova
> >
> > There are two ways to enable ACPI PCI Hot-plug:
> >
> > * Disable the Hot-plug Capable bit on PCIe slots.
> >
> > This was the first approach which le
On Fri, Nov 12, 2021 at 02:10:38AM -0300, Leonardo Bras wrote:
> For CONFIG_LINUX, implement the new optional callbacks io_write_zerocopy and
> io_flush_zerocopy on QIOChannelSocket, but enables it only when MSG_ZEROCOPY
> feature is available in the host kernel, which is checked on
> qio_channel_s
On Fri, Nov 12, 2021 at 02:10:36AM -0300, Leonardo Bras wrote:
> Adds io_writev_zerocopy and io_flush_zerocopy as optional callback to
> QIOChannelClass,
> allowing the implementation of zerocopy writes by subclasses.
>
> How to use them:
> - Write data using qio_channel_writev_zerocopy(),
> - Wa
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
All the global state (GS) API functions will check that
qemu_in_main_thread() returns true. If not, it means
that the safety of BQL cannot be guaranteed, and
they need to be moved to I/O.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by:
Leonardo Bras wrote:
> A lot of places check parameters.tls_creds in order to evaluate if TLS is
> in use, and sometimes call migrate_get_current() just for that test.
>
> Add new helper function migrate_use_tls() in order to simplify testing
> for TLS usage.
>
> Signed-off-by: Leonardo Bras
Rev
Leonardo Bras wrote:
> Add property that allows zerocopy migration of memory pages,
> and also includes a helper function migrate_use_zerocopy() to check
> if it's enabled.
>
> No code is introduced to actually do the migration, but it allow
> future implementations to enable/disable this feature.
On Fri, Nov 12, 2021 at 02:10:39AM -0300, Leonardo Bras wrote:
> Add property that allows zerocopy migration of memory pages,
> and also includes a helper function migrate_use_zerocopy() to check
> if it's enabled.
>
> No code is introduced to actually do the migration, but it allow
> future imple
On Fri, Nov 12, 2021 at 12:04:33PM +0100, Juan Quintela wrote:
> Leonardo Bras wrote:
> > Add property that allows zerocopy migration of memory pages,
> > and also includes a helper function migrate_use_zerocopy() to check
> > if it's enabled.
> >
> > No code is introduced to actually do the migra
Changelog:
v3:
* drop unnecessary expected blobs
v2:
*
Mark property as experimental/internal adding 'x-' prefix.
Property was introduced in 6.1 and it should have provided
ability to turn on native PCIE hotplug on port even when
ACPI PCI hotplug is in use is user explicitly sets property
on CLI. However that never worked since slot is wired to
ACPI h
From: Julia Suvorova
To solve issues [1-2] the Hot Plug Capable bit in PCIe Slots will be
turned on, while the switch to ACPI Hot-plug will be done in the
DSDT table.
Introducing 'x-keep-native-hpc' property disables the HPC bit only
in 6.1 and as a result keeps the forced 'reserve-io' on
pcie-r
From: Julia Suvorova
There are two ways to enable ACPI PCI Hot-plug:
* Disable the Hot-plug Capable bit on PCIe slots.
This was the first approach which led to regression [1-2], as
I/O space for a port is allocated only when it is hot-pluggable,
which is determined by HPC bit.
On Fri, Nov 12, 2021 at 09:56:17AM +, Daniel P. Berrangé wrote:
> On Fri, Nov 12, 2021 at 10:46:46AM +0300, Roman Kagan wrote:
> > On Thu, Nov 11, 2021 at 06:59:43PM +0100, Philippe Mathieu-Daudé wrote:
> > > On 11/11/21 16:33, Roman Kagan wrote:
> > > > Fix the (hypothetical) potential problem
From: Julia Suvorova
Prepare for changing the _OSC method in q35 DSDT.
Signed-off-by: Julia Suvorova
Signed-off-by: Igor Mammedov
Acked-by: Ani Sinha
---
tests/qtest/bios-tables-test-allowed-diff.h | 16
1 file changed, 16 insertions(+)
diff --git a/tests/qtest/bios-tables-
From: Daniel Henrique Barboza
'tlbivax' is implemented by gen_tlbivax_booke206() via
gen_helper_booke206_tlbivax(). In case the TLB needs to be flushed,
booke206_invalidate_ea_tlb() is called. All these functions, but
booke206_invalidate_ea_tlb(), uses a 64-bit effective address 'ea'.
booke206_i
On Thu, Nov 11, 2021 at 10:39:59AM -0500, Michael S. Tsirkin wrote:
> On Thu, Nov 11, 2021 at 01:09:05PM +0100, Gerd Hoffmann wrote:
> > Hi,
> >
> > > When the acpihp driver is used the linux kernel will just call the aml
> > > methods and I suspect the pci device will stay invisible then becaus
From: Matheus Ferst
These instructions should update the GPR indicated by the field RA
instead of RT. This error caused a regression on Mac OS 9 boot and some
graphical glitches in OS X.
Fixes: a39a106634a9 ("target/ppc: Move load and store floating point
instructions to decodetree")
Reported-b
The changes are the result of
'hw/i386/acpi-build: Deny control on PCIe Native Hot-Plug in _OSC'
which hides PCIE hotplug bit in host-bridge _OSC
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
The following changes since commit 0a70bcf18caf7a61d480f8448723c15209d128ef:
Update version for v6.2.0-rc0 release (2021-11-09 18:22:57 +0100)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-ppc-2022
for you to fetch changes up to
From: Daniel Henrique Barboza
Commit 71e6fae3a99 fixed an issue with FORM2 affinity guests with NUMA
nodes in which the distance info is absent in
machine_state->numa_state->nodes. This happens when QEMU adds a default
NUMA node and when the user adds NUMA nodes without specifying the
distances.
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
All the global state (GS) API functions will check that
qemu_in_main_thread() returns true. If not, it means
that the safety of BQL cannot be guaranteed, and
they need to be moved to I/O.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by:
Am 12.11.2021 um 08:39 hat Roman Kagan geschrieben:
> On Thu, Nov 11, 2021 at 06:52:30PM +0100, Kevin Wolf wrote:
> > Am 11.11.2021 um 16:33 hat Roman Kagan geschrieben:
> > > vhost-user-blk realize only attempts to reconnect if the previous
> > > connection attempt failed on "a problem with the co
Paolo Bonzini writes:
> On 11/11/21 15:37, Markus Armbruster wrote:
>>> 1) PHASE_NO_MACHINE - backends can already be created here, but no
>>> machine exists yet
>>>
>>> 2) PHASE_MACHINE_CREATED - the machine object has been created. It's
>>> not initialized, but it's there.
>>>
>>> 3) PHASE_ACC
Daniel P. Berrangé writes:
> On Fri, Nov 12, 2021 at 12:04:33PM +0100, Juan Quintela wrote:
>> Leonardo Bras wrote:
[...]
>> > diff --git a/migration/migration.c b/migration/migration.c
>> > index abaf6f9e3d..add3dabc56 100644
>> > --- a/migration/migration.c
>> > +++ b/migration/migration.c
>
Juan Quintela writes:
> Leonardo Bras wrote:
>> Add property that allows zerocopy migration of memory pages,
>> and also includes a helper function migrate_use_zerocopy() to check
>> if it's enabled.
>>
>> No code is introduced to actually do the migration, but it allow
>> future implementations
11.11.2021 15:08, Hanna Reitz wrote:
bdrv_replace_child_noperm() modifies BdrvChild.bs, and can potentially
set it to NULL. That is dangerous, because BDS parents generally assume
that their children's .bs pointer is never NULL. We therefore want to
let bdrv_replace_child_noperm() set the corre
11.11.2021 15:08, Hanna Reitz wrote:
As of a future patch, bdrv_replace_child_tran() will take a BdrvChild **
pointer. Prepare for that by getting such a pointer and using it where
applicable, and (dereferenced) as a parameter for
bdrv_replace_child_tran().
Signed-off-by: Hanna Reitz
Reviewed
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Similarly to the previous patch, split block_int.h
in block_int-io.h and block_int-global-state.h
block_int-common.h contains the structures shared between
the two headers, and the functions that can't be categorized as
I/O or global state.
A
On Fri, 12 Nov 2021 12:15:28 +0100
Gerd Hoffmann wrote:
> On Thu, Nov 11, 2021 at 10:39:59AM -0500, Michael S. Tsirkin wrote:
> > On Thu, Nov 11, 2021 at 01:09:05PM +0100, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > When the acpihp driver is used the linux kernel will just call the aml
>
11.11.2021 15:08, Hanna Reitz wrote:
Invoke the transaction drivers' .clean() methods only after all
.commit() or .abort() handlers are done.
This makes it easier to have nested transactions where the top-level
transactions pass objects to lower transactions that the latter can
still use through
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
block.h currently contains a mix of functions:
some of them run under the BQL and modify the block layer graph,
others are instead thread-safe and perform I/O in iothreads.
It is not easy to understand which function is part of which
group (I/O
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Similarly to the previous patches, split block-backend.h
in block-backend-io.h and block-backend-global-state.h
In addition, remove "block/block.h" include as it seems
it is not necessary anymore, together with "qemu/iov.h"
block-backend-comm
On Fri, Nov 12, 2021 at 4:41 PM Igor Mammedov wrote:
>
> From: Julia Suvorova
>
> There are two ways to enable ACPI PCI Hot-plug:
>
> * Disable the Hot-plug Capable bit on PCIe slots.
>
> This was the first approach which led to regression [1-2], as
> I/O space for a port is allocated onl
On Wed, 10 Nov 2021 12:01:11 +0100
David Hildenbrand wrote:
> On 10.11.21 11:33, Igor Mammedov wrote:
> > On Fri, 5 Nov 2021 23:47:37 +1100
> > Gavin Shan wrote:
> >
> >> Hi Drew and Igor,
> >>
> >> On 11/2/21 6:39 PM, Andrew Jones wrote:
> >>> On Tue, Nov 02, 2021 at 10:44:08AM +1100, Gavi
On 11/12/21 12:15 PM, Cédric Le Goater wrote:
The following changes since commit 0a70bcf18caf7a61d480f8448723c15209d128ef:
Update version for v6.2.0-rc0 release (2021-11-09 18:22:57 +0100)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-ppc-2022
Thomas Huth writes:
> On 03/11/2021 09.41, Markus Armbruster wrote:
>> Peter Maydell writes:
>>
>>> Does it make sense for a device/board to do drive_get_next(IF_NONE) ?
>> Short answer: hell, no! ;)
>
> Would it make sense to add an "assert(type != IF_NONE)" to drive_get()
> to avoid such mis
On 11/10/21 18:04, Laurent Vivier wrote:
On 10/11/2021 17:56, Cédric Le Goater wrote:
On 11/10/21 17:33, Laurent Vivier wrote:
On 09/11/2021 06:51, David Gibson wrote:
From: Fernando Eckhardt Valle
Move load floating point instructions (lfs, lfsu, lfsx, lfsux, lfd, lfdu, lfdx,
lfdux)
and st
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block.c | 17 +
block/backup.c | 1 +
block/block-backend.c | 3 +++
block/commit.c
On 11/12/21 7:53 AM, Song Gao wrote:
+#
+# Fields
+#
+%rd 0:5
+%rj 5:5
+%rk 10:5
+%sa2 15:2
+%si1210:s12
+%ui1210:12
+%si1610:s16
+%si205:s20
You should only create separate field definitions like this when they are complex: e.g.
the logical field is disjoint
From: Matheus Ferst
Implement the following PowerISA v3.1 instructions:
vexpandbm: Vector Expand Byte Mask
vexpandhm: Vector Expand Halfword Mask
vexpandwm: Vector Expand Word Mask
vexpanddm: Vector Expand Doubleword Mask
vexpandqm: Vector Expand Quadword Mask
Reviewed-by: Richard Henderson
Sig
From: Matheus Ferst
This is a small patch series just to allow Ubuntu 21.10 to boot with
-cpu POWER10. Glibc 2.34 is using vextractbm, so the init is killed by
SIGILL without the second patch of this series. The other two insns. are
included as they are somewhat close to Vector Extract Mask (at l
From: Matheus Ferst
Implement the following PowerISA v3.1 instructions:
mtvsrbm: Move to VSR Byte Mask
mtvsrhm: Move to VSR Halfword Mask
mtvsrwm: Move to VSR Word Mask
mtvsrdm: Move to VSR Doubleword Mask
mtvsrqm: Move to VSR Quadword Mask
mtvsrbmi: Move to VSR Byte Mask Immediate
Suggested-by:
From: Matheus Ferst
Implement the following PowerISA v3.1 instructions:
vextractbm: Vector Extract Byte Mask
vextracthm: Vector Extract Halfword Mask
vextractwm: Vector Extract Word Mask
vextractdm: Vector Extract Doubleword Mask
vextractqm: Vector Extract Quadword Mask
Suggested-by: Richard Hen
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
We want to be sure that the functions that write the child and
parent list of a bs are under BQL and drain.
BQL prevents from concurrent writings from the GS API, while
drains protect from I/O.
TODO: drains are missing in some functions using
This is an early RFC for a transport specific early detecton of
modern virtio, which is most relevant for transitional devices on big
endian platforms, when drivers access the config space before
FEATURES_OK is set.
The most important part that is missing here is fixing all the problems
that arise
Let us detect usage via the modern interface by tapping into the place
that implements the 'modern' reset.
Signed-off-by: Halil Pasic
---
hw/virtio/virtio-pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 6e16e2705c..8dd862da21 100644
The fact that revision > 0 was negotiated implies that VIRTIO_VERSION_1
aka modern must be used. This negotiation is done before the obligatory
reset. Let us call virtio_force_modern() after the reset if revision > 0
was negotiated, so that the VIRTIO_VERSION_1 feature can be set, and
endianness st
Signed-off-by: Halil Pasic
---
Inspired by virtio_net_set_features() which I don't quite understand.
Why do we have to do vhost_net_ack_features() for each possible queue?
---
hw/net/virtio-net.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/n
In vhost we don't push the features to the vhost device when the
features are set, but when the vhost device is started. This can
lead to problems when config space is implemented in the vhost
device, and the driver does some early config space reading (early in a
sense that it precedes setting FEA
This series of patches provides partial 128-bit support for the riscv
target architecture, namely RVI and RVM, with minimal csr support.
First of all thanks for the feedback on v4 and guidance for v5.
This v5 mainly corrects flaws in the implementation pointed out by Richard
and Philippe:
- split
Legacy vs modern should be detected via transport specific means. We
can't wait till feature negotiation is done. Let us introduce
virtio_force_modern() as a means for the transport code to signal
that the device should operate in modern mode (because a modern driver
was detected).
A new callback
Addition of div and rem on 128-bit integers, using the 128/64->128 divu and
64x64->128 mulu in host-utils.
These operations will be used within div/rem helpers in the 128-bit riscv
target.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
---
include/qemu/int128.h | 6 ++
util/int1
The upper 64-bit of the 128-bit registers have now a place inside
the cpu state structure, and are created as globals for future use.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
---
target/riscv/cpu.h | 2 ++
target/riscv/cpu.c | 9 +
target/riscv/machine.
Given that the 128-bit version of the riscv spec adds new instructions, and
that some instructions that were previously only available in 64-bit mode
are now available for both 64-bit and 128-bit, we added new macros to check
for the processor mode during translation.
Although RV128 is a superset o
As opposed to the gen_arith and gen_shift generation helpers, the csr insns
do not have a common prototype, so the choice to generate 32/64 or 128-bit
helper calls is done in the trans_csrxx functions.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
Reviewed-by: Richard Henderson
-
Introduction of a gen_logic function for bitwise logic to implement
instructions in which not propagation of information occurs between bits and
use of this function on the bitwise instructions.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
Reviewed-by: Richard Henderson
---
tar
The csrs are accessed through function pointers: we add 128-bit read
operations in the table for three csrs (writes fallback to the
64-bit version as the upper 64-bit information is handled elsewhere):
- misa, as mxl is needed for proper operation,
- mstatus and sstatus, to return sd
In addition, w
Renaming defines for quad in their various forms so that their signedness is
now explicit.
Done using git grep as suggested by Philippe, with a bit of hand edition to
keep assignments aligned.
Signed-off-by: Frédéric Pétrot
Reviewed-by: Philippe Mathieu-Daudé
---
include/exec/memop.h
Adding the 128-bit version of lui and auipc, and introducing to that end
a "set register with immediate" function to handle extension on 128 bits.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
Reviewed-by: Richard Henderson
---
target/riscv/translate.c| 21 ++
Adding defines to handle signed 64-bit and unsigned 128-bit quantities in
memory accesses.
Signed-off-by: Frédéric Pétrot
---
include/exec/memop.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/exec/memop.h b/include/exec/memop.h
index 72c2f0ff3d..2a885f3917 100644
--- a/incl
Addition of 128-bit adds and subs in their various sizes,
"set if less than"s and branches.
Refactored the code to have a comparison function used for both stls and
branches.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
---
target/riscv/insn32.decode | 3 +
target
Handling shifts for 32, 64 and 128 operation length for RV128, following the
general framework for handling various olens proposed by Richard.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
---
target/riscv/insn32.decode | 10 ++
target/riscv/translate.c
Get function to retrieve the 64 top bits of a register, stored in the gprh
field of the cpu state. Set function that writes the 128-bit value at once.
The access to the gprh field can not be protected at compile time to make
sure it is accessed only in the 128-bit version of the processor because w
This patch is kind of a mess because several files have to be slightly
modified to allow for a new target. In the current status, we have done
our best to have RV64 and RV128 under the same RV64 umbrella, but there
is still work to do to have a single executable for both.
In particular, we have no
Given the side effects they have, the csr instructions are realized as
helpers. We extend this existing infrastructure for 128-bit sized csr.
We return 128-bit values using the same approach as for div/rem.
Theses helpers all call a unique function that is currently a fallback
on the 64-bit version
lwu and ld are functionally close to the other loads, but were after the
stores in the source file.
Similarly, xor was away from or and and by two arithmetic functions, while
the immediate versions were nicely put together.
This patch moves the aforementioned loads after lhu, and xor above or,
wher
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
blockjob.c | 4
1 file changed, 4 insertions(+)
diff --git a/blockjob.c b/blockjob.c
index 4bad1408cb..fbd6c7d873 100644
--- a/blockjob.c
+++ b/blockjob.c
@@
Adding the high part of a very minimal set of csr.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
Reviewed-by: Richard Henderson
---
target/riscv/cpu.h | 4
target/riscv/machine.c | 2 ++
2 files changed, 6 insertions(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cp
Mult are generated inline (using a cool trick pointed out by Richard), but
for div and rem, given the complexity of the implementation of these
instructions, we call helpers to produce their behavior. From an
implementation standpoint, the helpers return the low part of the results,
while the high
The 128-bit bitwise instructions do not need any function prototype change
as the functions can be applied independently on the lower and upper part of
the registers.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
---
target/riscv/translate.c | 21 +++--
1 file cha
Subject: s/blockob.h/blockjob.h/
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
blockjob.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/blockjob.c b/blockjob.c
index fbd6c7d873..4982f6a2b5 10
11.11.2021 15:08, Hanna Reitz wrote:
As of a future commit, bdrv_replace_child_noperm() will clear the
indirect BdrvChild pointer passed to it if the new child BDS is NULL.
bdrv_replace_child_tran() will want to let it do that, but revert this
change in its abort handler. For that, we need to ha
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