If guest fb is backed by dmabuf (blob-resource), the texture bound to the
old context needs to be recreated in case the egl is re-initialized (e.g.
new window for vc is created in case of detaching/reattaching of the tab)
v2: call egl_dmabuf_release_texutre instead of putting 0 to dmabuf->texture
In order to help license clearing report tools, add
SPDX license identifier to the linux-user/ files.
Supersedes: <20211103203146.3630550-1-f4...@amsat.org>
Philippe Mathieu-Daudé (2):
linux-user: Move the SPDX license identifier to first line
linux-user: Add GPL-2.0-or-later SPDX license ide
Tools consuming SPDX license identifiers benefit from having
the SPDX tag in its own comment, not embedded with the license
text. Move the tag to the first line.
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/semihost.c | 3 +--
linux-user/errnos.c.inc | 3 +--
2 files changed, 2 inserti
Making the vc->gfx.ectx current before handling texture
associated with it
Cc: Gerd Hoffmann
Signed-off-by: Dongwon Kim
---
ui/gtk-egl.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c
index e912b20075..2164995098 100644
--- a/ui/gtk-egl.c
+++ b/ui/gtk-egl.
eb_fb_blit should be able to blit partial image of guest display (blob res)
in case multiple displays are configured for the guest and they are set as
extended-
desktop mode.
v2: egl_fb includes dmabuf info then make egl_fb_blit position and size
parameters programmed in dmabuf structure (pre
An old esurface should be destroyed and set to be NULL when doing
un-tab and re-tab so that a new esurface an context can be created
for the window widget that those will be bound to.
v2: enabling opengl specific routines only when CONFIG_OPENGL is set
Cc: Gerd Hoffmann
Signed-off-by: Dongwon Ki
In order to help license compliance tools (following [1] guidance),
use Qualcomm License Identifier tool [*] to classify linux-user/
files per license type, filtering those matching at least 60% the
"GPLv2 or later" type, and manually add the GPL-2.0-or-later SPDX
comment.
Full, abbreviated, oddly
gd_draw_event shouldn't try to repaint if surface does not exist
for the VC.
Cc: Gerd Hoffmann
Signed-off-by: Dongwon Kim
---
ui/gtk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/ui/gtk.c b/ui/gtk.c
index 8da673c18c..d2892ea6b4 100644
--- a/ui/gtk.c
+++ b/ui/gtk.c
@@ -778,6 +778,9 @@
I found the virtio-gpu-splitting-one-extended-mode-guest-fb-into.patch
didn't include the func interface change in one of stubs. I believe
that was the reason for win32/64 build failure (verified it with gitlab
CI). I updated that patch then I combined all 6 (4 for untabifying issue
and 2 for multi
When guest is running Linux/X11 with extended multiple displays mode enabled,
the guest shares one scanout resource each time containing whole surface
rather than sharing individual display output separately. This extended frame
is properly splited and rendered on the corresponding scanout surfaces
Hi Michael,
On Mon, Nov 01, 2021 at 07:35:04PM -0400, Michael S. Tsirkin wrote:
> On Tue, Oct 26, 2021 at 07:20:25PM +0100, Jean-Philippe Brucker wrote:
> > Add a test case for VIOT on the q35 machine. To test complex topologies
> > it has two PCIe buses that bypass the IOMMU (and are therefore no
On Thu, Nov 04, 2021 at 07:49:37AM +, Jean-Philippe Brucker wrote:
> Hi Michael,
>
> On Mon, Nov 01, 2021 at 07:35:04PM -0400, Michael S. Tsirkin wrote:
> > On Tue, Oct 26, 2021 at 07:20:25PM +0100, Jean-Philippe Brucker wrote:
> > > Add a test case for VIOT on the q35 machine. To test complex
On Thu, Nov 04, 2021 at 03:56:38AM -0400, Michael S. Tsirkin wrote:
> On Thu, Nov 04, 2021 at 07:49:37AM +, Jean-Philippe Brucker wrote:
> > Hi Michael,
> >
> > On Mon, Nov 01, 2021 at 07:35:04PM -0400, Michael S. Tsirkin wrote:
> > > On Tue, Oct 26, 2021 at 07:20:25PM +0100, Jean-Philippe Bru
On 02.11.21 21:11, Eric Farman wrote:
> With the USER_SIGP capability, the kernel will pass most (but not all)
> SIGP orders to userspace for processing. But that means that the kernel
> is unable to determine if/when the order has been completed by userspace,
> and could potentially return an inco
On Thu, Nov 04, 2021 at 06:43:23AM +0100, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > On Thu, Oct 28, 2021 at 04:24:31PM +0100, Daniel P. Berrangé wrote:
> >> On Thu, Oct 28, 2021 at 04:31:40PM +0200, Markus Armbruster wrote:
> >> > This clashes with my "[PATCH v2 0/9] Configurabl
The -1 assumes that cvq device model is accounted in data_queue_pairs,
if cvq does not exists, but it's actually the opposite: Devices with
!cvq are ok but devices with cvq does not add the last queue to
data_queue_pairs.
This is not a problem to vhost-net, but it is to vhost-vdpa:
* Devices with
The doc of this field pointed out that last_index is the last vq index.
This is misleading, since it's actually one past the end of the vqs.
Renaming and modifying comment.
Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
---
include/hw/virtio/vhost.h | 4 ++--
hw/net/vhost_net.c| 4 +
From: Vladimir Sementsov-Ogievskiy
Modern way is using blockdev-add + blockdev-backup, which provides a
lot more control on how target is opened.
As example of drive-backup problems consider the following:
User of drive-backup expects that target will be opened in the same
cache and aio mode as
The -1 assumes that cvq device model is accounted in data_queue_pairs,
if cvq does not exists, but it's actually the opposite: Devices with
!cvq are ok but devices with cvq does not add the last queue to
data_queue_pairs.
This is not a problem to vhost-net, but it is to vhost-vdpa:
* Devices with
From: Vladimir Sementsov-Ogievskiy
We are going to deprecate drive-backup, so use modern interface here.
In examples where target image creation is shown, show blockdev-add as
well. If target creation omitted, omit blockdev-add as well.
Reviewed-by: Kashyap Chamarthy
Signed-off-by: Vladimir Sem
Markus Armbruster writes:
> Paolo Bonzini writes:
>
>> Acked-by: Paolo Bonzini
>>
>> Thanks for the quick fix!
>
> Who's going to do the pull request?
Ping!
From: Vladimir Sementsov-Ogievskiy
We are going to deprecate drive-backup, so don't mention it here.
Moreover, blockdev-backup seems more correct in the context.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
Signed-off-by: Markus Armbruster
---
docs/block-replication.txt
See 03 commit message for details. 01-02 are preparation docs update.
v4: deprecate drive-backup transaction by squashing
[PATCH v4 5/5] block: Deprecate transaction type drive-backup
Message-Id: <20211025042405.3762351-6-arm...@redhat.com>
into PATCH 3
v3: wording fix-ups and
On Wed, Nov 03, 2021 at 09:31:46PM +0100, Philippe Mathieu-Daudé wrote:
> Use Qualcomm License Identifier tool [*] to classify linux-user/
> files per license type, filtering those matching at least 60% the
> "GPLv2 or later" type, and manually add the GPL-2.0-or-later SPDX
> comment.
When you say
Am 03.11.2021 um 22:26 hat Paolo Bonzini geschrieben:
> On 11/3/21 18:29, Kevin Wolf wrote:
> > This series adds QOM class definitions to the QAPI schema, introduces
> > a new TypeInfo.instance_config() callback that configures the object at
> > creation time (instead of setting properties individu
On Thu, Nov 04, 2021 at 08:15:40AM +0100, Philippe Mathieu-Daudé wrote:
> Tools consuming SPDX license identifiers benefit from having
> the SPDX tag in its own comment, not embedded with the license
> text. Move the tag to the first line.
Do you have an example of such a tool which has problems ?
On Thu, Nov 04, 2021 at 12:19:37AM -0700, Dongwon Kim wrote:
> I found the virtio-gpu-splitting-one-extended-mode-guest-fb-into.patch
> didn't include the func interface change in one of stubs. I believe
> that was the reason for win32/64 build failure (verified it with gitlab
> CI). I updated that
On Wed, Nov 03, 2021 at 12:21:55PM -0400, Emanuele Giuseppe Esposito wrote:
> It seems that on_idle list is not properly initialized like
> the other notifiers.
>
> Signed-off-by: Emanuele Giuseppe Esposito
> ---
> job.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Stefan Hajnoczi
si
On 11/4/21 10:06, Daniel P. Berrangé wrote:
> On Wed, Nov 03, 2021 at 09:31:46PM +0100, Philippe Mathieu-Daudé wrote:
>> Use Qualcomm License Identifier tool [*] to classify linux-user/
>> files per license type, filtering those matching at least 60% the
>> "GPLv2 or later" type, and manually add t
On 11/3/21 4:45 AM, Juan Quintela wrote:
The following changes since commit 741bdeb1d5a4024a2c54c6abb2de493a27b61953:
Merge remote-tracking branch 'remotes/kwolf/tags/for-upstream' into staging
(2021-11-03 00:32:56 -0400)
are available in the Git repository at:
https://github.com/juanqu
Hi,
I’ve tried to investigate what causes the iotest 030 to fail. Here’s
what I found:
(1) stream_prepare() gets the base node by looking up the node below
above_base. It then invokes bdrv_cor_filter_drop(), before we
actually use the base node.
bdrv_cor_filter_drop() modifies the b
The children list is specific to BDS parents. We should not modify it
in the general children modification code, but let BDS parents deal with
it in their .attach() and .detach() methods.
This also has the advantage that a BdrvChild is removed from the
children list before its .bs pointer can bec
Now that bdrv_remove_empty_child() no longer removes the child from the
parent's children list but only checks that it is not in such a list, it
is only a wrapper around bdrv_child_free() that checks that the child is
empty and unused. That should apply to all children that we free, so
put those c
bdrv_cor_filter_drop() modifies the block graph. That means that other
parties can also modify the block graph before it returns. Therefore,
we cannot assume that the result of a graph traversal we did before
remains valid afterwards.
We should thus fetch `base` and `unfiltered_base` afterwards
bdrv_replace_child_noperm() modifies BdrvChild.bs, and can potentially
set it to NULL. That is dangerous, because BDS parents generally assume
that their children's .bs pointer is never NULL. We therefore want to
let bdrv_replace_child_noperm() set the corresponding BdrvChild pointer
to NULL, too
bdrv_attach_child_common_abort() restores the parent's AioContext. To
do so, the child (which was supposed to be attached, but is now detached
again by this abort handler) is added to the ignore list for the
AioContext changing functions.
However, since we modify a BDS's children list in the Bdrv
In most of the block layer, especially when traversing down from other
BlockDriverStates, we assume that BdrvChild.bs can never be NULL. When
it becomes NULL, it is expected that the corresponding BdrvChild pointer
also becomes NULL and the BdrvChild object is freed.
Therefore, once bdrv_replace_
See the comment for why this is necessary.
Signed-off-by: Hanna Reitz
---
tests/qemu-iotests/030 | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/tests/qemu-iotests/030 b/tests/qemu-iotests/030
index 5fb65b4bef..567bf1da67 100755
--- a/tests/qemu-iotests/030
+++ b/
On Tue, Oct 26, 2021 at 4:39 AM Atish Patra wrote:
>
> The predicate function calculates the counter index incorrectly for
> hpmcounterx. Fix the counter index to reflect correct CSR number.
>
Fixes: e39a8320b088 ("target/riscv: Support the Virtual Instruction fault")
> Signed-off-by: Atish Patr
On Wed, 3 Nov 2021 at 13:38, Paolo Bonzini wrote:
> On 11/3/21 13:19, Peter Maydell wrote:
> > They're two tests under the hood, but they both need to pass
> > for us to be able to use the feature. If they don't both pass,
> > then meson should just quietly say "OK, we don't have this thing"
> > (
On Tue, Oct 26, 2021 at 3:56 AM Atish Patra wrote:
>
The commit title is incomplete
> Currently, the predicate function for PMU related CSRs only works if
> virtualization is enabled. It also does not check mcounteren bits before
> before cycle/minstret/hpmcounterx access.
>
> Support superviso
On Wed, 3 Nov 2021 at 14:41, Tom Rini wrote:
>
> On Wed, Nov 03, 2021 at 06:29:20AM +0100, François Ozog wrote:
> [snip]
> > > 3. Anything else?
> > >
> > > For qemu_arm_spl, it *does not boot* unless the U-Boot SPL properties
> > > are present. There is no easy way to fix this.
> >
> > one clean
On Tue, Oct 26, 2021 at 4:02 AM Atish Patra wrote:
>
> The PMU counters are supported via cpu config "Counters" which doesn't
> indicate the correct purpose of those counters.
>
> Rename the config property to pmu to indicate that these counters
> are performance monitoring counters. This aligns w
On Wed, 3 Nov 2021 at 13:27, Jean-Christophe DUBOIS
wrote:
> I have a little application that is designed to work on the i.MX6UL processor.
>
> I developed it and tested it on the mcimx6ul-evk platform emulated by Qemu.
>
> This application used to work "flawlessly" on Qemu 5.0.50 and is working
hi Peter
Le jeu. 4 nov. 2021 à 12:09, Peter Maydell a
écrit :
> On Wed, 3 Nov 2021 at 14:41, Tom Rini wrote:
> >
> > On Wed, Nov 03, 2021 at 06:29:20AM +0100, François Ozog wrote:
> > [snip]
> > > > 3. Anything else?
> > > >
> > > > For qemu_arm_spl, it *does not boot* unless the U-Boot SPL pro
At the end of a reopen, we already call bdrv_refresh_limits(), which
should update bs->request_alignment according to the new file
descriptor. However, raw_probe_alignment() relies on s->needs_alignment
and just uses 1 if it isn't set. We neglected to update this field, so
starting with cache=write
On 30/10/2021 18:17, Richard Henderson wrote:
On 10/29/21 1:23 PM, matheus.fe...@eldorado.org.br wrote:
From: Luis Pires
Implement the following PowerISA v3.1 instruction:
cntlzdm: Count Leading Zeros Doubleword Under Bit Mask
Suggested-by: Richard Henderson
Signed-off-by: Luis Pires
Signed
On Thu, 4 Nov 2021 at 11:22, François Ozog wrote:
> Le jeu. 4 nov. 2021 à 12:09, Peter Maydell a écrit
> :
>>
>> Well, our recommendation really was that the ideal thing would
>> be "you take the dtb that QEMU passes you at runtime, and at
>> runtime combine that with whatever extra information
On Tue, Oct 26, 2021 at 4:41 AM Atish Patra wrote:
>
> The RISC-V privilege specification provides flexibility to implement
> any number of counters from 29 programmable counters. However, the QEMU
> implements all the counters.
>
> Make it configurable through pmu config parameter which now will
On Wed, Nov 3, 2021 at 6:13 PM Viktor Prutyanov
wrote:
>
> Since its inception elf2dmp has checked MZ signatures within an
> address space above IDT[0] interrupt vector and took first PE image
> found as Windows Kernel.
> But in Windows Server 2022 memory dump this address space range is
> full of
Hi Peter
Le jeu. 4 nov. 2021 à 12:41, Peter Maydell a
écrit :
> On Thu, 4 Nov 2021 at 11:22, François Ozog
> wrote:
> > Le jeu. 4 nov. 2021 à 12:09, Peter Maydell a
> écrit :
> >>
> >> Well, our recommendation really was that the ideal thing would
> >> be "you take the dtb that QEMU passes you
On Tue, Oct 26, 2021 at 4:05 AM Atish Patra wrote:
>
> As per the privilege specification v1.11, mcountinhibit allows to start/stop
> a pmu counter selectively.
>
> Signed-off-by: Atish Patra
> ---
> target/riscv/cpu.h | 2 ++
> target/riscv/cpu_bits.h | 4
> target/riscv/csr.c
Am 04.11.2021 um 11:38 hat Hanna Reitz geschrieben:
> (2A) bdrv_replace_child_noperm() should immediately set bs->file or
> bs->backing to NULL when it sets bs->{file,backing}->bs to NULL.
> It should also immediately remove any BdrvChild with .bs == NULL
> from the parent’s BDS.chil
On 11/3/21 5:16 PM, Taylor Simpson wrote:
The following changes since commit 91e8394415f9bc9cd81c02bfafe02012855d4f98:
Merge remote-tracking branch
'remotes/juanquintela/tags/migration-20211031-pull-request' into staging
(2021-11-02 10:07:27 -0400)
are available in the git repository at:
Stefan Hajnoczi writes:
> On Fri, Oct 29, 2021 at 02:42:49PM +, Jag Raman wrote:
>> > On Oct 27, 2021, at 11:40 AM, Stefan Hajnoczi wrote:
>> > On Mon, Oct 11, 2021 at 01:31:08AM -0400, Jagannathan Raman wrote:
>> >> diff --git a/hw/remote/vfio-user-obj.c b/hw/remote/vfio-user-obj.c
>> >> ne
v2, dropped the hexagon toolchain updates which seem to be busted.
The following changes since commit b1fd92137e4d485adeec8e9f292f928ff335b76c:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2021-11-03 13:07:30 -0400)
are available in the Git repository at:
* Juan Quintela (quint...@redhat.com) wrote:
> "Dr. David Alan Gilbert" wrote:
> > * Juan Quintela (quint...@redhat.com) wrote:
> >> If postcopy has finished, it frees the array.
> >> But vhost-user unregister it at cleanup time.
> >
> > I must admit to being confused as the double migrate case vs
On 11/4/21 10:07, Kevin Wolf wrote:
Also, for the obligatory bikeshedding remark, do you have any other plans or
ideas for the colon-separated auto generated typenames? Having both the
"namespace" (qom) and the more specific use (config) before the classname is
a bit weird, compared to the exist
From: Matheus Ferst
This patch series implements 56 new instructions for POWER10, moving 28
"old" instructions to decodetree along the way. The series is divided by
facility as follows:
- From patch 1 to 9: Vector
- From patch 10 to 24: Vector-Scalar Extensions
- From patch 25: Fixed-Point
Base
From: Matheus Ferst
pdepd and pextd helpers are moved out of #ifdef (TARGET_PPC64) to allow
them to be reused as GVecGen3.fni8.
Reviewed-by: Richard Henderson
Signed-off-by: Luis Pires
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 2 +-
target/ppc/insn32.decode
From: Matheus Ferst
Implements the following PowerISA v3.1 instructions:
vinsbvlx: Vector Insert Byte from VSR using GPR-specified Left-Index
vinshvlx: Vector Insert Halfword from VSR using GPR-specified
Left-Index
vinswvlx: Vector Insert Word from VSR using GPR-specified Left-Index
vin
From: Matheus Ferst
There's no reason to keep vector-impl.c.inc separate from
vmx-impl.c.inc. Additionally, let GVec handle the multiple calls to
helper_cfuged for us.
Reviewed-by: Richard Henderson
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h| 2 +-
target/pp
From: Matheus Ferst
Reviewed-by: Richard Henderson
Suggested-by: Richard Henderson
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 8
target/ppc/translate/vmx-impl.c.inc | 66 +
2 files changed, 74 insertions(+)
diff --git a/target/ppc
From: Matheus Ferst
The signature of do_cntzdm is changed to allow reuse as GVecGen3i.fni8.
The method is also moved out of #ifdef TARGET_PPC64, as PowerISA doesn't
say vclzdm and vctzdm are 64-bit only.
Reviewed-by: Richard Henderson
Signed-off-by: Luis Pires
Signed-off-by: Matheus Ferst
---
From: "Bruno Larsen (billionai)"
Implemented the instruction XXSPLTIDP using decodetree.
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Matheus Ferst
---
target/ppc/insn64.decode| 2 ++
target/ppc/translate/vsx-impl.c.inc | 10 ++
2
From: "Bruno Larsen (billionai)"
Introduce the macro to centralize checking if the VSX facility is
enabled and handle it correctly.
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Luis Pires
Signed-off-by: Matheus Ferst
---
target/ppc/translate.c | 8 ++
From: Matheus Ferst
Reviewed-by: Richard Henderson
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 4
target/ppc/insn32.decode| 5 +
target/ppc/int_helper.c | 21 ---
target/ppc/translate/vmx-impl.c.inc | 32
From: Matheus Ferst
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Matheus Ferst
---
target/ppc/helper.h | 4 +++
target/ppc/insn64.decode| 19 ++
target/ppc/int_helper.c | 15
target/ppc/translat
From: Matheus Ferst
Changes get_cpu_vsr to receive a new argument indicating whether the
high or low part of the register is being accessed. This change improves
consistency between the interfaces used to access Vector and VSX
registers and helps to handle endianness in some cases.
Reviewed-by:
From: Matheus Ferst
Implements the following PowerISA v3.1 instructions:
vinsblx: Vector Insert Byte from GPR using GPR-specified Left-Index
vinshlx: Vector Insert Halfword from GPR using GPR-specified Left-Index
vinswlx: Vector Insert Word from GPR using GPR-specified Left-Index
vinsdlx: Vector
From: "Lucas Mateus Castro (alqotel)"
Moved stxv and lxv implementation from the legacy system to
decodetree.
Reviewed-by: Richard Henderson
Signed-off-by: Luis Pires
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 8 +
From: Matheus Ferst
Implement the following PowerISA v3.1 instructions:
vextdubvlx: Vector Extract Double Unsigned Byte to VSR using
GPR-specified Left-Index
vextduhvlx: Vector Extract Double Unsigned Halfword to VSR using
GPR-specified Left-Index
vextduwvlx: Vector Extrac
On 11/3/21 22:14, Willian Rampazzo wrote:
> In the discussion about renaming the `tests/acceptance` [1], the
> conclusion was that the folders inside `tests` are related to the
> framework running the tests and not directly related to the type of
> the tests.
>
> This changes the folder to `tests/
From: Matheus Ferst
Implements the following PowerISA v3.1 instructions:
vinsw: Vector Insert Word from GPR using immediate-specified index
vinsd: Vector Insert Doubleword from GPR using immediate-specified
index
Reviewed-by: Richard Henderson
Signed-off-by: Matheus Ferst
---
target/pp
From: "Lucas Mateus Castro (alqotel)"
Implemented the instructions plxvp and pstxvp using decodetree
Reviewed-by: Richard Henderson
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn64.decode| 9 +
target/ppc/translate/vsx-impl.c
From: "Bruno Larsen (billionai)"
Implemented the XXSPLTIW instruction, using decodetree.
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Matheus Ferst
---
target/ppc/insn64.decode| 6 ++
target/ppc/translate/vsx-impl.c.inc | 10 +
From: "Lucas Mateus Castro (alqotel)"
Moved stxvx and lxvx implementation from the legacy system to
decodetree.
Reviewed-by: Richard Henderson
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 5 ++
target/ppc/translate/vsx-
From: "Bruno Larsen (billionai)"
Changed the function that handles XXSPLTW emulation to using decodetree,
but still using the same logic.
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 9 +
From: Matheus Ferst
Suggested-by: Richard Henderson
Signed-off-by: Matheus Ferst
---
target/ppc/translate/fixedpoint-impl.c.inc | 31 +++---
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
b/target/ppc/translate/fixedp
From: "Lucas Mateus Castro (alqotel)"
Implemented the instructions lxvpx and stxvpx using decodetree
Reviewed-by: Richard Henderson
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 3 +++
target/ppc/translate/vsx-impl.c.inc
From: "Bruno Larsen (billionai)"
Changed the function that handles XXSPLTIB emulation to using
decodetree, but still use the same logic as before
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 5 +
From: "Lucas Mateus Castro (alqotel)"
Implemented the instructions lxvp and stxvp using decodetree
Reviewed-by: Richard Henderson
Signed-off-by: Luis Pires
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 5 +++
target/ppc/
From: "Bruno Larsen (billionai)"
Implemented XXSPLTI32DX emulation using decodetree
Reviewed-by: Richard Henderson
Signed-off-by: Bruno Larsen (billionai)
Signed-off-by: Matheus Ferst
---
target/ppc/insn64.decode| 11 +++
target/ppc/translate/vsx-impl.c.inc | 17 +
From: "Lucas Mateus Castro (alqotel)"
Implemented the instructions plxv and pstxv using decodetree
Reviewed-by: Richard Henderson
Signed-off-by: Lucas Mateus Castro (alqotel)
Signed-off-by: Matheus Ferst
---
target/ppc/insn64.decode| 10 ++
target/ppc/translate/vsx-impl.c
On 11/4/21 12:02, Peter Maydell wrote:
The link of the test program against libsnappy.a fails because
it is being linked with cc and nothing is putting the C++ stdlib
that libsnappy needs on the link line, so you get errors like:
/usr/lib/gcc/x86_64-linux-gnu/7/../../../x86_64-linux-gnu/libsn
From: Matheus Ferst
Reviewed-by: Richard Henderson
Signed-off-by: Luis Pires
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode| 7 +
target/ppc/translate/vsx-impl.c.inc | 43 +
2 files changed, 50 insertions(+)
diff --git a/target/ppc/insn
On Thu, Nov 4, 2021 at 9:50 AM Philippe Mathieu-Daudé wrote:
>
> On 11/3/21 22:14, Willian Rampazzo wrote:
> > In the discussion about renaming the `tests/acceptance` [1], the
> > conclusion was that the folders inside `tests` are related to the
> > framework running the tests and not directly rel
On 04.11.21 12:31, Kevin Wolf wrote:
At the end of a reopen, we already call bdrv_refresh_limits(), which
should update bs->request_alignment according to the new file
descriptor. However, raw_probe_alignment() relies on s->needs_alignment
and just uses 1 if it isn't set. We neglected to update t
On 04.11.21 12:58, Kevin Wolf wrote:
Am 04.11.2021 um 11:38 hat Hanna Reitz geschrieben:
(2A) bdrv_replace_child_noperm() should immediately set bs->file or
bs->backing to NULL when it sets bs->{file,backing}->bs to NULL.
It should also immediately remove any BdrvChild with .bs == NU
This series of patches brings in 32-bit arm support for bsd-user. It implements
all the bits needed to do image activation, signal handling, stack management
and threading. This allows us to get to the "Hello World" level. The arm and x86
code are now the same as in the bsd-user fork. For full con
The preferred name for the 32-bit arm is now armv7. Update the name to
reflect that. In addition, add Stacey's copyright to this file and
update the include guards to the new convention.
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
Target specific TLS routines to get and set the TLS values.
Signed-off-by: Kyle Evans
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch.h | 28
bsd-user/arm/target_arch_cpu.c |
Defines for registers and stack layout related to signals.
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch_signal.h | 57 +++
1 file changed, 57 insertions(+)
create mode 1006
As part of upstreaming, the include guards have been made more
consistent. Update this file to use the new guards.
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch_sysarch.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-
target_arch_cpu.h is for CPU loop definitions. Create the file and
define target_cpu_init and target_cpu_reset for arm.
Signed-off-by: Olivier Houchard
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch_cpu
Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.
Signed-off-by: Stacey Son
Signed-off-by: Mikaël Urankar
Signed-off-by: Kyle Evans
Signed-off-
Add a boiler plate CPU loop that does nothing except return an error for
all traps.
Signed-off-by: Sean Bruno
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch_cpu.h | 22 ++
1 file cha
Implement EXCP_PREFETCH_ABORT AND EXCP_DATA_ABORT. Both of these data
exceptions cause a SIGSEGV.
Signed-off-by: Kyle Evans
Signed-off-by: Olivier Houchard
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arc
Arm specific user context structures for signal handling and the closely
related trap frame.
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch_signal.h | 8
1 file changed, 8 insertions(+)
diff --git a/bsd-user/arm/target
Implement target_cpu_clone_regs to clone the resister state on a fork.
Signed-off-by: Stacey Son
Signed-off-by: Warner Losh
Reviewed-by: Kyle Evans
Reviewed-by: Richard Henderson
---
bsd-user/arm/target_arch_cpu.h | 8
1 file changed, 8 insertions(+)
diff --git a/bsd-user/arm/target
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