[PATCH v7 22/60] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup

2021-11-01 Thread Richard Henderson
Use the new os interface for raising the exception, rather than calling arm_cpu_tlb_fill directly. Reviewed-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/mte_helper.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a

[PATCH v7 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE

2021-11-01 Thread Richard Henderson
QEMU does not allow the system control bits for either exception to be enabled in linux-user, therefore both exceptions are dead code. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/openrisc/cpu_loop.c | 17 + 1 file changed, 9 insertions(+),

[PATCH v7 38/60] target/sh4: Make sh4_cpu_tlb_fill sysemu only

2021-11-01 Thread Richard Henderson
The fallback code in cpu_loop_exit_sigsegv is sufficient for sh4 linux-user. Remove the code from cpu_loop that raised SIGSEGV. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sh4/cpu.h | 6 +++--- linux-user/sh4/cpu_loop.c | 8 target/sh4/cpu.

[PATCH v7 29/60] target/microblaze: Make mb_cpu_tlb_fill sysemu only

2021-11-01 Thread Richard Henderson
The fallback code in cpu_loop_exit_sigsegv is sufficient for microblaze linux-user. Remove the code from cpu_loop that handled the unnamed 0xaa exception. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/cpu.h |

[PATCH v7 42/60] hw/core: Add TCGCPUOps.record_sigbus

2021-11-01 Thread Richard Henderson
Add a new user-only interface for updating cpu state before raising a signal. This will take the place of do_unaligned_access for user-only and should result in less boilerplate for each guest. Reviewed-by: Warner Losh Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 23 +++

[PATCH v7 34/60] target/ppc: Implement ppc_cpu_record_sigsegv

2021-11-01 Thread Richard Henderson
Record DAR, DSISR, and exception_index. That last means that we must exit to cpu_loop ourselves, instead of letting exception_index being overwritten. This is exactly what the user-mode ppc_cpu_tlb_fill does, so simply rename it as ppc_cpu_record_sigsegv. Reviewed-by: Warner Losh Reviewed-by: P

[PATCH v7 31/60] target/nios2: Implement nios2_cpu_record_sigsegv

2021-11-01 Thread Richard Henderson
Because the linux-user kuser page handling is currently implemented by detecting magic addresses in the unnamed 0xaa trap, we cannot simply remove nios2_cpu_tlb_fill and rely on the fallback code. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/nios2/cpu.h| 6

[PATCH v7 36/60] target/s390x: Use probe_access_flags in s390_probe_access

2021-11-01 Thread Richard Henderson
Not sure why the user-only code wasn't rewritten to use probe_access_flags at the same time that the sysemu code was converted. For the purpose of user-only, this is an exact replacement. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/tcg/mem_helper.c | 1

[PATCH v7 37/60] target/s390x: Implement s390_cpu_record_sigsegv

2021-11-01 Thread Richard Henderson
Move the masking of the address from cpu_loop into s390_cpu_record_sigsegv -- this is governed by hw, not linux. This does mean we have to raise our own exception, rather than return to the fallback. Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING. Use the appropriate si_code for ea

[PATCH v7 40/60] target/xtensa: Make xtensa_cpu_tlb_fill sysemu only

2021-11-01 Thread Richard Henderson
The fallback code in cpu_loop_exit_sigsegv is sufficient for xtensa linux-user. Remove the code from cpu_loop that raised SIGSEGV. Acked-by: Max Filippov Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/xtensa/cpu.h | 2 +- linux-user/xtensa/cpu_loop.c

[PATCH v7 33/60] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only

2021-11-01 Thread Richard Henderson
The fallback code in cpu_loop_exit_sigsegv is sufficient for openrisc linux-user. This makes all of the code in mmu.c sysemu only, so remove the ifdefs and move the file to openrisc_softmmu_ss. Remove the code from cpu_loop that handled EXCP_DPF. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by

[PATCH v7 44/60] target/alpha: Implement alpha_cpu_record_sigbus

2021-11-01 Thread Richard Henderson
Record trap_arg{0,1,2} for the linux-user signal frame. Raise SIGBUS directly from cpu_loop_exit_sigbus, which means we can remove the code for EXCP_UNALIGN in cpu_loop. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/alpha/cpu.h | 8 +--- linux-us

[PATCH v7 43/60] linux-user: Add cpu_loop_exit_sigbus

2021-11-01 Thread Richard Henderson
This is a new interface to be provided by the os emulator for raising SIGBUS on fault. Use the new record_sigbus target hook. Reviewed-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 14 ++ linux-user/signal.c

[PATCH v7 35/60] target/riscv: Make riscv_cpu_tlb_fill sysemu only

2021-11-01 Thread Richard Henderson
The fallback code in cpu_loop_exit_sigsegv is sufficient for riscv linux-user. Remove the code from cpu_loop that raised SIGSEGV. Reviewed-by: Warner Losh Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/riscv/cpu_loop.c | 7 -

[PATCH v7 45/60] target/arm: Implement arm_cpu_record_sigbus

2021-11-01 Thread Richard Henderson
Because of the complexity of setting ESR, re-use the existing arm_cpu_do_unaligned_access function. This means we have to handle the exception ourselves in cpu_loop, transforming it to the appropriate signal. Reviewed-by: Warner Losh Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson

Re: [PATCH v6 23/66] target/arm: Implement arm_cpu_record_sigsegv

2021-11-01 Thread Richard Henderson
On 11/1/21 1:25 PM, Peter Maydell wrote: On Mon, 1 Nov 2021 at 17:09, Richard Henderson wrote: On 11/1/21 12:30 PM, Peter Maydell wrote: We seem to be restricting tlb_fill to sysemu already. Not true: -#endif /* !defined(CONFIG_USER_ONLY) */ - bool arm_cpu_tlb_fill(CPUState *cs, vaddr a

[PULL 00/22] Python patches

2021-11-01 Thread John Snow
The following changes since commit af531756d25541a1b3b3d9a14e72e7fedd941a2e: Merge remote-tracking branch 'remotes/philmd/tags/renesas-20211030' into staging (2021-10-30 11:31:41 -0700) are available in the Git repository at: https://gitlab.com/jsnow/qemu.git tags/python-pull-request for y

[PATCH v7 51/60] linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling

2021-11-01 Thread Richard Henderson
We will raise SIGBUS directly from cpu_loop_exit_sigbus. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/ppc/cpu_loop.c | 8 1 file changed, 8 deletions(-) diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c index 840b23736b..483e6693

[PATCH v7 46/60] linux-user/hppa: Remove EXCP_UNALIGN handling

2021-11-01 Thread Richard Henderson
We will raise SIGBUS directly from cpu_loop_exit_sigbus. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/hppa/cpu_loop.c | 7 --- 1 file changed, 7 deletions(-) diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c index e0a62deeb9..375576

[PATCH v7 41/60] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu

2021-11-01 Thread Richard Henderson
We have replaced tlb_fill with record_sigsegv for user mode. Move the declaration to restrict it to system emulation. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 22 ++ linux-user/signal.c | 3 --- 2 fil

[PATCH v7 49/60] target/ppc: Set fault address in ppc_cpu_do_unaligned_access

2021-11-01 Thread Richard Henderson
We ought to have been recording the virtual address for reporting to the guest trap handler. Cc: qemu-...@nongnu.org Reviewed-by: Warner Losh Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/ppc/excp_helper.c | 14 ++ 1 file changed, 14 insertions(+) diff --g

[PATCH v7 50/60] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu

2021-11-01 Thread Richard Henderson
This is not used by, nor required by, user-only. Reviewed-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/ppc/internal.h| 8 +++- target/ppc/excp_helper.c | 8 +++- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/targe

[PULL 01/22] iotests/297: Move pylint config into pylintrc

2021-11-01 Thread John Snow
Move --score=n and --notes=XXX,FIXME into pylintrc. This pulls configuration out of code, which I think is probably a good thing in general. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-2-js...@redhat.com Signed-off-by: John Snow --- tests/qemu-iotests/2

[PATCH v7 54/60] target/sparc: Remove DEBUG_UNALIGNED

2021-11-01 Thread Richard Henderson
The printf should have been qemu_log_mask, the parameters themselves no longer compile, and because this is placed before unwinding the PC is actively wrong. We get better (and correct) logging on the other side of raising the exception, in sparc_cpu_do_interrupt. Reviewed-by: Mark Cave-Ayland R

[PATCH v7 47/60] target/microblaze: Do not set MO_ALIGN for user-only

2021-11-01 Thread Richard Henderson
The kernel will fix up unaligned accesses, so emulate that by allowing unaligned accesses to succeed. Reviewed-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 16 1 file changed, 16 insertions(+) diff --git a/target/microblaze/transla

[PATCH v7 55/60] target/sparc: Split out build_sfsr

2021-11-01 Thread Richard Henderson
Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- target/sparc/mmu_helper.c | 72 +-- 1 file changed, 46 insertions(+), 26 deletions(-) diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 2ad47391d0..014601e701 100644 ---

[PATCH v7 56/60] target/sparc: Set fault address in sparc_cpu_do_unaligned_access

2021-11-01 Thread Richard Henderson
We ought to have been recording the virtual address for reporting to the guest trap handler. Move the function to mmu_helper.c, so that we can re-use code shared with get_physical_address_data. Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- target/sparc/ldst_helper.c | 13 -

[PATCH v7 58/60] accel/tcg: Report unaligned load/store for user-only

2021-11-01 Thread Richard Henderson
Use the new cpu_loop_exit_sigbus for cpu_mmu_lookup. Reviewed-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/user-exec.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/accel/tcg/user-exec

[PATCH v7 48/60] target/ppc: Move SPR_DSISR setting to powerpc_excp

2021-11-01 Thread Richard Henderson
By doing this while sending the exception, we will have already done the unwinding, which makes the ppc_cpu_do_unaligned_access code a bit cleaner. Update the comment about the expected instruction format. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/ppc/excp_helper.c

[PATCH v7 53/60] target/sh4: Set fault address in superh_cpu_do_unaligned_access

2021-11-01 Thread Richard Henderson
We ought to have been recording the virtual address for reporting to the guest trap handler. Cc: Yoshinori Sato Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sh4/op_helper.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/sh4/op_helper.c b/targ

[PULL 03/22] iotests/297: Add get_files() function

2021-11-01 Thread John Snow
Split out file discovery into its own method to begin separating out configuration/setup and test execution. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-4-js...@redhat.com Signed-off-by: John Snow --- tests/qemu-iotests/297 | 9 +++-- 1 file changed

[PATCH v7 57/60] accel/tcg: Report unaligned atomics for user-only

2021-11-01 Thread Richard Henderson
Use the new cpu_loop_exit_sigbus for atomic_mmu_lookup, which has access to complete alignment info from the TCGMemOpIdx arg. Reviewed-by: Warner Losh Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- accel/tcg/user-exec.c | 13 - 1 file changed, 12 insertions(+), 1 del

Re: [PATCH v2 0/5] hw/arm: Add NPCM7XX Tachometer Device

2021-11-01 Thread Richard Henderson
On Thu, 11 Mar 2021 at 13:11, Hao Wu wrote: > > This patch set implements the Tachometer (a.k.a Multi Functional Timer/MFT) > device in NPCM7XX SoC. This device is used by NPCM7XX boards to measure > the RPM of PWM fans. > > To provide the RPM of a certain fan, since RPM = MAX_RPM * duty_percentag

[PULL 05/22] iotests/297: Don't rely on distro-specific linter binaries

2021-11-01 Thread John Snow
'pylint-3' is another Fedora-ism. Use "python3 -m pylint" or "python3 -m mypy" to access these scripts instead. This style of invocation will prefer the "correct" tool when run in a virtual environment. Note that we still check for "pylint-3" before the test begins -- this check is now "overly str

[PULL 07/22] iotests/297: refactor run_[mypy|pylint] as generic execution shim

2021-11-01 Thread John Snow
There's virtually nothing special here anymore; we can combine these into a single, rather generic function. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-8-js...@redhat.com Signed-off-by: John Snow --- tests/qemu-iotests/297 | 42 ++--

[PULL 09/22] iotests/297: update tool availability checks

2021-11-01 Thread John Snow
As mentioned in 'iotests/297: Don't rely on distro-specific linter binaries', these checks are overly strict. Update them to be in-line with how we actually invoke the linters themselves. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-10-js...@redhat.com Sig

[PATCH v7 52/60] target/s390x: Implement s390x_cpu_record_sigbus

2021-11-01 Thread Richard Henderson
For s390x, the only unaligned accesses that are signaled are atomic, and we don't actually want to raise SIGBUS for those, but instead raise a SPECIFICATION error, which the kernel will report as SIGILL. Split out a do_unaligned_access function to share between the user-only s390x_cpu_record_sigbu

[PULL 06/22] iotests/297: Split run_linters apart into run_pylint and run_mypy

2021-11-01 Thread John Snow
Move environment setup into main(), and split the actual linter execution into run_pylint and run_mypy, respectively. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-7-js...@redhat.com Signed-off-by: John Snow --- tests/qemu-iotests/297 | 38 +++

[PULL 10/22] iotests/297: split test into sub-cases

2021-11-01 Thread John Snow
Take iotest 297's main() test function and split it into two sub-cases that can be skipped individually. We can also drop custom environment setup from the pylint test as it isn't needed. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-11-js...@redhat.com Sig

Re: [PATCH v5 06/26] arm: qemu: Add a devicetree file for qemu_arm64

2021-11-01 Thread François Ozog
Hi Simon Le lun. 1 nov. 2021 à 17:58, Simon Glass a écrit : > Hi Peter, > > On Mon, 1 Nov 2021 at 04:48, Peter Maydell > wrote: > > > > On Tue, 26 Oct 2021 at 01:33, Simon Glass wrote: > > > > > > Add this file, generated from qemu, so there is a reference devicetree > > > in the U-Boot tree.

[PATCH v7 59/60] tcg: Add helper_unaligned_{ld, st} for user-only sigbus

2021-11-01 Thread Richard Henderson
To be called from tcg generated code on hosts that support unaligned accesses natively, in response to an access that is supposed to be aligned. Reviewed-by: Warner Losh Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg-ldst.h

[PULL 16/22] python/machine: Handle QMP errors on close more meticulously

2021-11-01 Thread John Snow
To use the AQMP backend, Machine just needs to be a little more diligent about what happens when closing a QMP connection. The operation is no longer a freebie in the async world; it may return errors encountered in the async bottom half on incoming message receipt, etc. (AQMP's disconnect, ultima

[PULL 02/22] iotests/297: Split mypy configuration out into mypy.ini

2021-11-01 Thread John Snow
More separation of code and configuration. Signed-off-by: John Snow Reviewed-by: Hanna Reitz Message-id: 20211019144918.3159078-3-js...@redhat.com Signed-off-by: John Snow --- tests/qemu-iotests/297 | 14 +- tests/qemu-iotests/mypy.ini | 12 2 files changed, 13 in

[PULL 20/22] iotests/300: avoid abnormal shutdown race condition

2021-11-01 Thread John Snow
Wait for the destination VM to close itself instead of racing to shut it down first, which produces different error log messages from AQMP depending on precisely when we tried to shut it down. (For example: We may try to issue 'quit' immediately prior to the target VM closing its QMP socket, which

[PULL 11/22] iotests: split linters.py out from 297

2021-11-01 Thread John Snow
Now, 297 is just the iotests-specific incantations and linters.py is as minimal as I can think to make it. The only remaining element in here that ought to be configuration and not code is the list of skip files, but they're still numerous enough that repeating them for mypy and pylint configuratio

[PULL 17/22] python/aqmp: Remove scary message

2021-11-01 Thread John Snow
The scary message interferes with the iotests output. Coincidentally, if iotests works by removing this, then it's good evidence that we don't really need to scare people away from using it. Signed-off-by: John Snow Acked-by: Hanna Reitz Reviewed-by: Kevin Wolf Reviewed-by: Hanna Reitz Message

[PATCH v7 60/60] linux-user: Handle BUS_ADRALN in host_signal_handler

2021-11-01 Thread Richard Henderson
Handle BUS_ADRALN via cpu_loop_exit_sigbus, but allow other SIGBUS si_codes to continue into the host-to-guest signal conversion code. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/signal.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/linux-user/s

[PULL 12/22] iotests/linters: Add entry point for linting via Python CI

2021-11-01 Thread John Snow
We need at least a tiny little shim here to join test file discovery with test invocation. This logic could conceivably be hosted somewhere in python/, but I felt it was strictly the least-rude thing to keep the test logic here in iotests/, even if this small function isn't itself an iotest. Note

[PULL 19/22] iotests: Conditionally silence certain AQMP errors

2021-11-01 Thread John Snow
AQMP likes to be very chatty about errors it encounters. In general, this is good because it allows us to get good diagnostic information for otherwise complex async failures. For example, during a failed QMP connection attempt, we might see: +ERROR:qemu.aqmp.qmp_client.qemub-2536319:Negotiation

[PULL 04/22] iotests/297: Create main() function

2021-11-01 Thread John Snow
Instead of running "run_linters" directly, create a main() function that will be responsible for environment setup, leaving run_linters() responsible only for execution of the linters. (That environment setup will be moved over in forthcoming commits.) Signed-off-by: John Snow Reviewed-by: Vladi

[PULL 13/22] iotests/linters: Add workaround for mypy bug #9852

2021-11-01 Thread John Snow
This one is insidious: if you write an import as "from {namespace} import {subpackage}" as mirror-top-perms (now) does, mypy will fail on every-other invocation *if* the package being imported is a typed, installed, namespace-scoped package. Upsettingly, that's exactly what 'qemu.[aqmp|qmp|machine

Re: [PATCH v2 4/7] hw/adc: Make adci[*] R/W in NPCM7XX ADC

2021-11-01 Thread Peter Maydell
On Thu, 21 Oct 2021 at 19:40, Hao Wu wrote: > > Our sensor test requires both reading and writing from a sensor's > QOM property. So we need to make the input of ADC module R/W instead > of read only for that to work. "instead of write only", I think ? Otherwise Reviewed-by: Peter Maydell than

[PULL 08/22] iotests/297: Change run_linter() to raise an exception on failure

2021-11-01 Thread John Snow
Instead of using a process return code as the python function return value (or just not returning anything at all), allow run_linter() to raise an exception instead. The responsibility for printing output on error shifts from the function itself to the caller, who will know best how to present/for

Re: [PATCH 1/3] sev/i386: Allow launching with -kernel if no OVMF hashes table found

2021-11-01 Thread Dov Murik
On 01/11/2021 16:25, Tom Lendacky wrote: > On 11/1/21 5:21 AM, Dov Murik wrote: >> Commit cff03145ed3c ("sev/i386: Introduce sev_add_kernel_loader_hashes >> for measured linux boot", 2021-09-30) introduced measured direct boot >> with -kernel, using an OVMF-designated hashes table which QEMU fil

Re: [PATCH v2 for-6.2] target/arm: Advertise MVE to gdb when present

2021-11-01 Thread Richard Henderson
On 11/1/21 12:08 PM, Peter Maydell wrote: Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about

Re: [PATCH v2] hw/arm/virt: Rename default_bus_bypass_iommu

2021-11-01 Thread Richard Henderson
On 10/26/21 5:37 AM, Jean-Philippe Brucker wrote: Since commit d8fb7d0969d5 ("vl: switch -M parsing to keyval"), machine parameter definitions cannot use underscores, because keyval_dashify() transforms them to dashes and the parser doesn't find the parameter. This affects option default_bus_byp

Re: [PATCH v2 7/7] hw/arm: Add ID for NPCM7XX SMBus

2021-11-01 Thread Peter Maydell
On Thu, 21 Oct 2021 at 19:40, Hao Wu wrote: > > The ID can be used to indicate SMBus modules when adding > dynamic devices to them. > > Signed-off-by: Hao Wu > --- > hw/arm/npcm7xx.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c > index 2ab0080e0b..

[PULL 22/22] python, iotests: replace qmp with aqmp

2021-11-01 Thread John Snow
Swap out the synchronous QEMUMonitorProtocol from qemu.qmp with the sync wrapper from qemu.aqmp instead. Add an escape hatch in the form of the environment variable QEMU_PYTHON_LEGACY_QMP which allows you to cajole QEMUMachine into using the old implementation, proving that both implementations wo

Re: [PATCH v2 1/7] hw/i2c: Clear ACK bit in NPCM7xx SMBus module

2021-11-01 Thread Peter Maydell
On Thu, 21 Oct 2021 at 19:40, Hao Wu wrote: > > The ACK bit in NPCM7XX SMBus module should be cleared each time it > sends out a NACK signal. This patch fixes the bug that it fails to > do so. > > Signed-off-by: Hao Wu > Reviewed-by: Titus Rwantare Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v2] hvf: arm: Ignore cache operations on MMIO

2021-11-01 Thread Peter Maydell
On Tue, 26 Oct 2021 at 18:46, Richard Henderson wrote: > Ah hah. From 0487G.a, page D13-3191: > > # For other faults reported in ESR_EL2, ISV is 0 except > # for the following stage 2 aborts... > > (which incidentally sounds like documenting around a historic chip bug, since > both EL1 and > EL3

Re: [PATCH v2 0/5] hw/arm: Add NPCM7XX Tachometer Device

2021-11-01 Thread Hao Wu
Is this reply to a wrong thread? I thought it was applied a long time ago. Thanks, On Mon, Nov 1, 2021 at 10:33 AM Richard Henderson < richard.hender...@linaro.org> wrote: > On Thu, 11 Mar 2021 at 13:11, Hao Wu wrote: > > > > This patch set implements the Tachometer (a.k.a Multi Functional > Ti

Re: [PATCH v2 3/7] hw/adc: Fix CONV bit in NPCM7XX ADC CON register

2021-11-01 Thread Peter Maydell
On Thu, 21 Oct 2021 at 19:40, Hao Wu wrote: > > The correct bit for the CONV bit in NPCM7XX ADC is bit 13. This patch > fixes that in the module, and also lower the IRQ when the guest > is done handling an interrupt event from the ADC module. > > Signed-off-by: Hao Wu > Reviewed-by: Patrick Ventu

Re: [PATCH v1 4/9] migration/ram: Handle RAMBlocks with a RamDiscardManager on the migration source

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > We don't want to migrate memory that corresponds to discarded ranges as > managed by a RamDiscardManager responsible for the mapped memory region of > the RAMBlock. The content of these pages is essentially stale and > without any guarantees for the VM ("logically unplug

Re: [PATCH v4 5/6] tests/acceptance: Add bFLT loader linux-user test

2021-11-01 Thread Willian Rampazzo
Hi, Phill, On Mon, Sep 27, 2021 at 1:31 PM Philippe Mathieu-Daudé wrote: > > Add a very quick test that runs a busybox binary in bFLT format: > > $ AVOCADO_ALLOW_UNTRUSTED_CODE=1 \ > avocado --show=app run -t linux_user tests/acceptance/load_bflt.py > JOB ID : db94d5960ce564c50904d666

Re: [PATCH v2] hvf: arm: Ignore cache operations on MMIO

2021-11-01 Thread Peter Maydell
On Tue, 26 Oct 2021 at 17:22, Richard Henderson wrote: > > On 10/26/21 12:12 AM, Alexander Graf wrote: > > +if (cm) { > > +/* We don't cache MMIO regions */ > > +advance_pc = true; > > +break; > > +} > > + > > assert(isv); > > The asser

[PULL 14/22] python: Add iotest linters to test suite

2021-11-01 Thread John Snow
Run mypy and pylint on the iotests files directly from the Python CI test infrastructure. This ensures that any accidental breakages to the qemu.[qmp|aqmp|machine|utils] packages will be caught by that test suite. It also ensures that these linters are run with well-known versions and test against

Re: [PATCH v1 5/9] virtio-mem: Drop precopy notifier

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > Migration code now properly handles RAMBlocks which are indirectly managed > by a RamDiscardManager. No need for manual handling via the free page > optimization interface, let's get rid of it. > > Acked-by: Michael S. Tsirkin > Acked-by: Peter Xu > Signed-off-by: Davi

[PULL 15/22] python/machine: remove has_quit argument

2021-11-01 Thread John Snow
If we spy on the QMP commands instead, we don't need callers to remember to pass it. Seems like a fair trade-off. The one slightly weird bit is overloading this instance variable for wait(), where we use it to mean "don't issue the qmp 'quit' command". This means that wait() will "fail" if the QEM

Re: [PATCH v2 1/5] hw/sd: add nuvoton MMC

2021-11-01 Thread Richard Henderson
On 11/1/21 1:18 PM, Peter Maydell wrote: On Fri, 8 Oct 2021 at 01:26, Hao Wu wrote: From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Hao Wu Reviewed-by: Chris Rauer Reviewed-by: Tyrone Ting Signed-off-by: Hao Wu --- +default: +qemu_log_mask(LOG_GUEST_ERROR, "S

Re: gitlab-ci: clang-user job failed with run-tcg-tests-sh4-linux-user

2021-11-01 Thread Richard Henderson
On 11/1/21 6:27 AM, Philippe Mathieu-Daudé wrote: Build failed running the 'clang-user' job: TESTlinux-test on sh4 ../linux-user/syscall.c:10373:34: runtime error: member access within misaligned address 0x0048af34 for type 'struct linux_dirent64', which requires 8 byte alignment 0x00

Re: [Qemu-devel] [PATCH 0/4] Remove some qdev_get_machine() calls from CONFIG_USER_ONLY

2021-11-01 Thread Philippe Mathieu-Daudé
On 4/25/19 22:00, Eduardo Habkost wrote: > Eduardo Habkost (4): > machine: Move gpio code to hw/core/gpio.c > move qdev hotplug code to qdev-hotplug.c > qdev: Don't compile hotplug code in user-mode emulation > qdev-hotplug: Don't check type of qdev_get_machine() Patch 1 queued to machine

Re: [Qemu-devel] [PATCH 4/4] qdev-hotplug: Don't check type of qdev_get_machine()

2021-11-01 Thread Philippe Mathieu-Daudé
On 4/25/19 22:00, Eduardo Habkost wrote: > Now that qdev_get_machine_hotplug_handler() is only compiled in > softmmu mode, we don't need to check if qdev_gt_machine() is > really of type TYPE_MACHINE. > > Signed-off-by: Eduardo Habkost > --- > hw/core/qdev-hotplug.c | 13 - > 1 file

Re: [PATCH v1 7/9] migration: Simplify alignment and alignment checks

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > Let's use QEMU_ALIGN_DOWN() and friends to make the code a bit easier to > read. > > Reviewed-by: Peter Xu > Signed-off-by: David Hildenbrand Reviewed-by: Juan Quintela u

Re: [PATCH v4 1/6] tests/acceptance: Extract QemuBaseTest from Test

2021-11-01 Thread Willian Rampazzo
On Mon, Sep 27, 2021 at 1:31 PM Philippe Mathieu-Daudé wrote: > > The Avocado Test::fetch_asset() is handy to download artifacts > before running tests. The current class is named Test but only > tests system emulation. As we want to test user emulation, > refactor the common code as QemuBaseTest.

[PULL 18/22] iotests: Accommodate async QMP Exception classes

2021-11-01 Thread John Snow
(But continue to support the old ones for now, too.) There are very few cases of any user of QEMUMachine or a subclass thereof relying on a QMP Exception type. If you'd like to check for yourself, you want to grep for all of the derivatives of QMPError, excluding 'AQMPError' and its derivatives. T

Re: [PATCH v1 2/9] virtio-mem: Implement replay_discarded RamDiscardManager callback

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > Implement it similar to the replay_populated callback. > > Acked-by: Peter Xu > Signed-off-by: David Hildenbrand Reviewed-by: Juan Quintela

Re: [PATCH v2] hvf: arm: Ignore cache operations on MMIO

2021-11-01 Thread Richard Henderson
On 10/26/21 3:12 AM, Alexander Graf wrote: Apple's Hypervisor.Framework forwards cache operations as MMIO traps into user space. For MMIO however, these have no meaning: There is no cache attached to them. So let's just treat cache data exits as nops. This fixes OpenBSD booting as guest. Signe

Re: [PATCH 0/4] hw/core: Restrict qdev-hotplug to sysemu

2021-11-01 Thread Philippe Mathieu-Daudé
On 10/28/21 17:05, Philippe Mathieu-Daudé wrote: > Restrict various hw/core/ files to sysemu, > add stubs for qdev-hotplug. > > Philippe Mathieu-Daudé (4): > hw/core: Restrict sysemu specific files > hw/core: Declare meson source set > hw/core: Extract hotplug-related functions to qdev-hotpl

[PULL 21/22] python/aqmp: Create sync QMP wrapper for iotests

2021-11-01 Thread John Snow
This is a wrapper around the async QMPClient that mimics the old, synchronous QEMUMonitorProtocol class. It is designed to be interchangeable with the old implementation. It does not, however, attempt to mimic Exception compatibility. Signed-off-by: John Snow Acked-by: Hanna Reitz Reviewed-by:

Re: [PATCH v4 0/2] hw/core/machine: Add an unit test for smp_parse

2021-11-01 Thread Philippe Mathieu-Daudé
On 10/28/21 17:09, Philippe Mathieu-Daudé wrote: > Respin of Yanan Wang v3, based on > "hw/core: Restrict qdev-hotplug to sysemu" > > Based-on: 20211028150521.1973821-1-phi...@redhat.com > https://lore.kernel.org/qemu-devel/20211028150521.1973821-1-phi...@redhat.com > > git-backport-diff: > Key:

Re: [PATCH v3 0/5] target/arm: Use tcg_constant_*

2021-11-01 Thread Richard Henderson
On 10/29/21 7:18 PM, Philippe Mathieu-Daudé wrote: Missing review: patches #2 & #5 (new) Introduce store_cpu_field_constant() helper to avoid using temporary when the value is constant (and read-only). Since v2: - Simplify store_cpu_field_constant(), do not modify store_cpu_field() - Added anot

Re: [PATCH v1 6/9] migration/postcopy: Handle RAMBlocks with a RamDiscardManager on the destination

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > Currently, when someone (i.e., the VM) accesses discarded parts inside a > RAMBlock with a RamDiscardManager managing the corresponding mapped memory > region, postcopy will request migration of the corresponding page from the > source. The source, however, will never an

Re: [PATCH v1 8/9] migration/ram: Factor out populating pages readable in ram_block_populate_pages()

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > Let's factor out prefaulting/populating to make further changes easier to > review and add a comment what we are actually expecting to happen. While at > it, use the actual page size of the ramblock, which defaults to > qemu_real_host_page_size for anonymous memory. Furt

Re: [PATCH v3 0/3] Dynamic sysbus device check error report

2021-11-01 Thread Philippe Mathieu-Daudé
On 10/29/21 16:22, Damien Hedde wrote: > Hi, > > Dynamic sysbus devices are allowed by a per-machine basis. > Right now, the allowance check is done during an machine_init_done > notifier, well after such devices are created. > > This series move the check at the right place (during the handling

Re: [PATCH v2 5/7] hw/nvram: Update at24c EEPROM init function in NPCM7xx boards

2021-11-01 Thread Peter Maydell
On Thu, 21 Oct 2021 at 19:40, Hao Wu wrote: > > We made 3 changes to the at24c_eeprom_init function in > npcm7xx_boards.c: > > 1. We allow the function to take a I2CBus* as parameter. This allows >us to attach an EEPROM device behind an I2C mux which is not >possible with the old method. >

[PULL 09/10] qdev-monitor: Check sysbus device type before creating it

2021-11-01 Thread Philippe Mathieu-Daudé
From: Damien Hedde Add an early check to test if the requested sysbus device type is allowed by the current machine before creating the device. This impacts both -device cli option and device_add qmp command. Before this patch, the check was done well after the device has been created (in a mach

[PATCH 2/2] qtest/am53c974-test: add test for cancelling in-flight requests

2021-11-01 Thread Mark Cave-Ayland
Based upon the qtest reproducer posted to Gitlab issue #663 at https://gitlab.com/qemu-project/qemu/-/issues/663. Signed-off-by: Mark Cave-Ayland --- tests/qtest/am53c974-test.c | 36 1 file changed, 36 insertions(+) diff --git a/tests/qtest/am53c974-test.c

Re: [PATCH v2 5/7] hw/nvram: Update at24c EEPROM init function in NPCM7xx boards

2021-11-01 Thread Hao Wu
On Mon, Nov 1, 2021 at 10:41 AM Peter Maydell wrote: > On Thu, 21 Oct 2021 at 19:40, Hao Wu wrote: > > > > We made 3 changes to the at24c_eeprom_init function in > > npcm7xx_boards.c: > > > > 1. We allow the function to take a I2CBus* as parameter. This allows > >us to attach an EEPROM devic

[PATCH 1/2] esp: ensure in-flight SCSI requests are always cancelled

2021-11-01 Thread Mark Cave-Ayland
There is currently a check in esp_select() to cancel any in-flight SCSI requests to ensure that issuing multiple select commands without continuing through the rest of the ESP state machine ignores all but the last SCSI request. This is also enforced through the addition of assert()s in esp_transfe

Re: [PATCH v1 9/9] migration/ram: Handle RAMBlocks with a RamDiscardManager on background snapshots

2021-11-01 Thread Juan Quintela
David Hildenbrand wrote: > We already don't ever migrate memory that corresponds to discarded ranges > as managed by a RamDiscardManager responsible for the mapped memory region > of the RAMBlock. > > virtio-mem uses this mechanism to logically unplug parts of a RAMBlock. > Right now, we still pop

[PATCH 0/2] esp: fix for fuzzer issues on gitlab

2021-11-01 Thread Mark Cave-Ayland
This patchset contains a simple fix for 2 ESP fuzzer issues reported on gitlab as https://gitlab.com/qemu-project/qemu/-/issues/662 and https://gitlab.com/qemu-project/qemu/-/issues/663. The first patch contains the fix itself, whilst the second patch contains a qtest based upon issue 663 (the qte

Re: [PATCH v4 3/6] tests/acceptance: Introduce QemuUserTest base class

2021-11-01 Thread Willian Rampazzo
On Mon, Sep 27, 2021 at 1:31 PM Philippe Mathieu-Daudé wrote: > > Similarly to the 'System' Test base class with methods for testing > system emulation, the QemuUserTest class contains methods useful to > test user-mode emulation. > > Reviewed-by: Wainer dos Santos Moschetta > Signed-off-by: Phil

[PULL 01/10] machine: Move gpio code to hw/core/gpio.c

2021-11-01 Thread Philippe Mathieu-Daudé
From: Eduardo Habkost Only softmmu code uses gpio, so move gpio code from qdev.c to gpio.c and compile it only on softmmu mode. Signed-off-by: Eduardo Habkost Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-Id: <20190425200051.19906-2-ehabk...@redhat.com> Signed-

Re: [PATCH] Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"

2021-11-01 Thread Richard Henderson
On 11/1/21 7:48 AM, Philippe Mathieu-Daudé wrote: Per the "P32 Porting Guide" (rev 1.2) [1], chapter 2: p32 ABI Overview The Application Binary Interface, or ABI, is the set of rules that all binaries must follow in order to run on a nanoMIPS system. This include

Re: [PATCH v4 6/6] tests/acceptance: Rename avocado_qemu.Test -> QemuSystemTest

2021-11-01 Thread Willian Rampazzo
On Mon, Sep 27, 2021 at 1:32 PM Philippe Mathieu-Daudé wrote: > > To run user-mode emulation tests, we introduced the > avocado_qemu.QemuUserTest which inherits from avocado_qemu.QemuBaseTest. > System-mode emulation tests are based on the avocado_qemu.Test class, > which also inherits avocado_qem

[PULL 00/10] Machine-next patches for 2021-11-01

2021-11-01 Thread Philippe Mathieu-Daudé
0700) are available in the Git repository at: https://github.com/philmd/qemu.git tags/machine-20211101 for you to fetch changes up to 84436ec4b2b4c6c62f0ae8c911f8b982fedc0f4e: machine: remove the done notifier for dynamic sysbus device type check (2021-11-01 19:3

[PULL 02/10] hw/core: Restrict sysemu specific files

2021-11-01 Thread Philippe Mathieu-Daudé
All these files don't make sense for tools and user emulation, restrict them to system emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yanan Wang Tested-by: Yanan Wang Acked-by: Eduardo Habkost Message-Id: <20211028150521.1973821-2-phi...@redhat.com> --- hw/core/meson.build | 18

[PULL 05/10] hw/core: Restrict hotplug to system emulation

2021-11-01 Thread Philippe Mathieu-Daudé
Restrict hotplug to system emulation, add stubs for the other uses. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yanan Wang Acked-by: Eduardo Habkost Message-Id: <20211028150521.1973821-5-phi...@redhat.com> --- hw/core/hotplug-stubs.c | 34 ++ hw/core/meso

Re: [PATCH] ppc/pegasos2: Suppress warning when qtest enabled

2021-11-01 Thread Richard Henderson
On 11/1/21 11:08 AM, BALATON Zoltan wrote: Suggested-by: Peter Maydell Signed-off-by: BALATON Zoltan --- hw/ppc/pegasos2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

[PULL 08/10] machine: add device_type_is_dynamic_sysbus function

2021-11-01 Thread Philippe Mathieu-Daudé
From: Damien Hedde Right now the allowance check for adding a sysbus device using -device cli option (or device_add qmp command) is done well after the device has been created. It is done during the machine init done notifier: machine_init_notify() in hw/core/machine.c This new function will all

<    1   2   3   4   5   >