From: Vladimir Sementsov-Ogievskiy
We convert blk_do_pwritev_part() and some wrappers:
blk_co_pwritev_part(), blk_co_pwritev(), blk_co_pwrite_zeroes().
All functions are converted so that the parameter type becomes wider, so
all callers should be OK with it.
Look at blk_do_pwritev_part() body:
From: Vladimir Sementsov-Ogievskiy
This is a preparation to the following commit, to use automatic
coroutine wrapper generation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20211006131718.214235-6-vsement...@virtuozzo.com>
Reviewed-by: Eric Blake
Signed-off-by: Eric Blake
---
bl
On 10/15/21 12:03 AM, frank.ch...@sifive.com wrote:
From: Frank Chang
Zfhmin extension is a subset of Zfh extension, consisting only of data
transfer and conversion instructions.
If enabled, only the following instructions from Zfh extension are
included:
* flh, fsh, fmv.x.h, fmv.h.x, fcvt.s
From: Vladimir Sementsov-Ogievskiy
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20211006131718.214235-7-vsement...@virtuozzo.com>
Reviewed-by: Eric Blake
Signed-off-by: Eric Blake
---
scripts/block-coroutine-wrapper.py | 12 ++--
block/coroutines.h | 3 +++
From: Hanna Reitz
With -m32, size_t is generally only a uint32_t. That makes clang
complain that in the assertion
assert(qiov->size <= INT64_MAX);
the range of the type of qiov->size (size_t) is too small for any of its
values to ever exceed INT64_MAX.
Cast qiov->size to uint64_t to silence
From: Vladimir Sementsov-Ogievskiy
Convert blk_pdiscard, blk_pwrite_compressed, blk_pwrite_zeroes.
These are just wrappers for functions with int64_t argument, so allow
passing int64_t as well. Parameter type becomes wider so all callers
should be OK with it.
Note that requests exceeding INT_MAX
From: Vladimir Sementsov-Ogievskiy
We already have this marker for the blk_co_flush function declaration in
block/block-backend.c. Add it in the header too.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Message-Id: <20211007175243.642516-1-vsement...@virtuozzo.com>
Reviewed-by: Eric Blake
[eblak
On 10/15/21 12:03 AM, frank.ch...@sifive.com wrote:
From: Kito Cheng
Signed-off-by: Kito Cheng
Signed-off-by: Chih-Min Chao
Signed-off-by: Frank Chang
---
target/riscv/fpu_helper.c | 6 ++
target/riscv/helper.h | 1 +
target/riscv/insn32.decode
From: Vladimir Sementsov-Ogievskiy
Let's drop hand-made coroutine wrappers and use coroutine wrapper
generation like in block/io.c.
Now, blk_foo() functions are written in same way as blk_co_foo() ones,
but wrap blk_do_foo() instead of blk_co_do_foo().
Signed-off-by: Vladimir Sementsov-Ogievski
From: Vladimir Sementsov-Ogievskiy
Make bytes argument int64_t to be consistent with modern block-layer.
Callers should be OK with it as type becomes wider.
What is inside functions?
- Conversion from int64_t to size_t. Still, we
can't have a buffer larger than SIZE_MAX, therefore bytes should
From: Vladimir Sementsov-Ogievskiy
1. Convert bytes in BlkAioEmAIOCB:
aio->bytes is only passed to already int64_t interfaces, and set in
blk_aio_prwv, which is updated here.
2. For all updated functions the parameter type becomes wider so callers
are safe.
3. In blk_aio_prwv we only sto
From: Vladimir Sementsov-Ogievskiy
blk_check_bytes_request is called from blk_co_do_preadv,
blk_co_do_pwritev_part, blk_co_do_pdiscard and blk_co_copy_range
before (maybe) calling throttle_group_co_io_limits_intercept() (which
has int64_t argument) and then calling corresponding bdrv_co_ function
在2021年10月15日十月 上午9:49，Philippe Mathieu-Daudé写道：
> On 10/11/21 15:58, Jiaxun Yang wrote:
>> ping?
>>
>> 在 2021/10/2 19:45, Jiaxun Yang 写道:
>>> Jiaxun Yang (3):
>>> hw/mips/boston: Massage memory map information
>>> hw/mips/boston: Allow loading elf kernel and dtb
>>> hw/mips/boston: Add
在2021年10月15日十月 上午2:06，BALATON Zoltan写道：
> The vt82c686b_realize and vt8231_realize methods are almost identical,
> factor out the common parts to a via_isa_realize function to avoid
> code duplication.
>
> Signed-off-by: BALATON Zoltan
Reviewed-by: Jiaxun Yang
> ---
> hw/isa/vt82c686.c | 67
在2021年10月15日十月 上午2:06，BALATON Zoltan写道：
> Other functions in the VT82xx chips need to raise ISA interrupts. Keep
> a reference to them in the device state and add via_isa_set_irq() to
> allow setting their state.
>
> Signed-off-by: BALATON Zoltan
Reviewed-by: Jiaxun Yang
> ---
--
- Jiaxun
On Fri, 15 Oct 2021, BALATON Zoltan wrote:
On Fri, 15 Oct 2021, David Gibson wrote:
On Thu, Oct 14, 2021 at 09:50:19PM +0200, BALATON Zoltan wrote:
This is needed for Linux to access RTC time.
Signed-off-by: BALATON Zoltan
---
hw/ppc/pegasos2.c | 25 +
1 file changed,
On 10/15/21 2:09 PM, Eric Blake wrote:
The following changes since commit 253e399bab7c83b3411f8eac01840283a9304cb3:
Merge remote-tracking branch 'remotes/kwolf/tags/for-upstream' into staging
(2021-10-15 12:08:54 -0700)
are available in the Git repository at:
https://repo.or.cz/qemu/eri
On 10/15/21 5:42 AM, Gavin Shan wrote:
The empty NUMA node, where no memory resides, are allowed. For
example, the following command line specifies two empty NUMA nodes.
With this, QEMU fails to boot because of the conflicting device-tree
node names, as the following error message indicates.
Ping.
On 10/7/21 12:54 PM, Richard Henderson wrote:
Currently, we have support for optimizing redundant zero extensions,
which I think was done with x86 and aarch64 in mind, which zero-extend
all 32-bit operations into the 64-bit register.
But targets like Alpha, MIPS, and RISC-V do sign-extens
On 10/15/21 12:29 PM, Alexey Baturo wrote:
Signed-off-by: Alexey Baturo
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/riscv/insn_trans/trans_rva.c.inc | 3 +++
target/riscv/insn_trans/trans_rvd.c.inc | 2 ++
target/riscv/insn_trans/trans_rvf.c.inc | 2 ++
targ
On 10/15/21 12:29 PM, Alexey Baturo wrote:
FIELD(TB_FLAGS, MSTATUS_HS_FS, 10, 2)
+/* If PointerMasking should be applied */
+FIELD(TB_FLAGS, PM_ENABLED, 10, 1)
Merge error.
+if (riscv_has_ext(env, RVJ)) {
+int priv = cpu_mmu_index(env, false) & TB_FLAGS_PRIV_MMU_MASK;
cpu_mmu_
On 10/15/21 12:29 PM, Alexey Baturo wrote:
+
+/*
+ * CSRs for PointerMasking extension
+ */
+target_ulong mmte;
+target_ulong mpmmask;
+target_ulong mpmbase;
+target_ulong spmmask;
+target_ulong spmbase;
+target_ulong upmmask;
+target_ulong upmbase;
You n
On 10/15/21 12:29 PM, Alexey Baturo wrote:
Signed-off-by: Alexey Baturo
---
target/riscv/cpu.c | 4
1 file changed, 4 insertions(+)
Reviewed-by: Richard Henderson
r~
I've seen a lot of failures on this job recently, and they're all timeouts cloning the git
submodules. Would it be better to mirror these to gitlab?
r~
On 10/15/21 12:45 AM, frank.ch...@sifive.com wrote:
From: Frank Chang
TB_FLAGS mem_idx bits was extended from 2 bits to 3 bits in
commit: c445593, but other TB_FLAGS bits for rvv and rvh were
not shift as well so these bits may overlap with each other when
rvv is enabled.
Signed-off-by: Frank C
From: Mingwang Li
If default main_mem is used to be registered as the system memory,
other memory cannot be initialized. Therefore, the system memory
should be initialized to the machine->ram, which consists of the
default main_mem and other possible memory required by applications,
such as share
Never mind, found the answers in kvm_set_user_memory :)
On Fri, Oct 15, 2021 at 9:36 PM Ajay Garg wrote:
>
> Hello everyone.
>
> I have a x86_64 L1 guest, running on a x86_64 host, with a
> host-pci-device attached to the guest.
> The host runs with IOMMU enabled, and passthrough enabled.
>
> Fol
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