Re: [PATCH v5 04/20] nubus: use bitmap to manage available slots

2021-09-24 Thread Mark Cave-Ayland
On 23/09/2021 10:42, Philippe Mathieu-Daudé wrote: On 9/23/21 11:12, Mark Cave-Ayland wrote: Convert nubus_device_realize() to use a bitmap to manage available slots to allow for future Nubus devices to be plugged into arbitrary slots from the command line using a new qdev "slot" parameter for

Re: [PATCH v5 05/20] nubus: move slot bitmap checks from NubusDevice realize() to BusClass check_address()

2021-09-24 Thread Mark Cave-Ayland
On 23/09/2021 10:45, Philippe Mathieu-Daudé wrote: On 9/23/21 11:12, Mark Cave-Ayland wrote: Allow Nubus to manage the slot allocations itself using the BusClass check_address() virtual function rather than managing this during NubusDevice realize(). Signed-off-by: Mark Cave-Ayland Reviewed-

Re: [PATCH v5 18/20] nubus: add support for slot IRQs

2021-09-24 Thread Mark Cave-Ayland
On 23/09/2021 10:49, Philippe Mathieu-Daudé wrote: On 9/23/21 11:13, Mark Cave-Ayland wrote: Each Nubus slot has an IRQ line that can be used to request service from the CPU. Connect the IRQs to the Nubus bridge so that they can be wired up using qdev gpios accordingly, and introduce a new nub

[PULL 2/3] hw/nvme: fix verification of select field in namespace attachment

2021-09-24 Thread Klaus Jensen
From: Naveen Nagar Fix is added to check for reserved value in select field for namespace attachment CC: Minwoo Im Signed-off-by: Naveen Nagar Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 15 --- include/block/nvme.h | 5 + 2 files changed, 17 insertions(+), 3 dele

Re: [PATCH v5 17/20] nubus-bridge: make slot_available_mask a qdev property

2021-09-24 Thread Mark Cave-Ayland
On 23/09/2021 10:52, Philippe Mathieu-Daudé wrote: On 9/23/21 11:13, Mark Cave-Ayland wrote: This is to allow Macintosh machines to further specify which slots are available since the number of addressable slots may not match the number of physical slots present in the machine. Signed-off-by:

Re: [PATCH v5 04/20] nubus: use bitmap to manage available slots

2021-09-24 Thread Mark Cave-Ayland
On 23/09/2021 15:16, BALATON Zoltan wrote: On Thu, 23 Sep 2021, Mark Cave-Ayland wrote: Convert nubus_device_realize() to use a bitmap to manage available slots to allow for future Nubus devices to be plugged into arbitrary slots from the command line using a new qdev "slot" parameter for nub

[PATCH 2/2] hw/nvme: change nvme-ns 'shared' default

2021-09-24 Thread Klaus Jensen
From: Klaus Jensen Change namespaces to be shared namespaces by default (parameter shared=on). Keep shared=off for older machine types. Signed-off-by: Klaus Jensen --- docs/system/devices/nvme.rst | 24 ++-- hw/core/machine.c| 4 +++- hw/nvme/ns.c

[PATCH 1/2] hw/nvme: reattach subsystem namespaces on hotplug

2021-09-24 Thread Klaus Jensen
From: Hannes Reinecke With commit 5ffbaeed16 ("hw/nvme: fix controller hot unplugging") namespaces get moved from the controller to the subsystem if one is specified. That keeps the namespaces alive after a controller hot-unplug, but after a controller hotplug we have to reconnect the namespaces

[PATCH 0/2] hw/nvme: fix namespace attachment on controller hotplug

2021-09-24 Thread Klaus Jensen
From: Klaus Jensen First patch from Hannes fixes the subsystem registration process such that shared (but non-detached) namespaces are automatically attached to hotplugged controllers. The second patch changes the default for 'shared' such that namespaces are shared by default and will thus by d

[PATCH v6 01/20] nubus: add comment indicating reference documents

2021-09-24 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/nubus/nubus-bus.c | 8 1 file changed, 8 insertions(+) diff --git a/hw/nubus/nubus-bus.c b/hw/nubus/nubus-bus.c index 5c13452308..f4410803ff 100644

[PATCH v6 05/20] nubus: move slot bitmap checks from NubusDevice realize() to BusClass check_address()

2021-09-24 Thread Mark Cave-Ayland
Allow Nubus to manage the slot allocations itself using the BusClass check_address() virtual function rather than managing this during NubusDevice realize(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/nubus/nubus-bus.c| 29 + hw/nubus/nub

[PATCH v6 00/20] nubus: bus, device, bridge, IRQ and address space improvements

2021-09-24 Thread Mark Cave-Ayland
This patchset is the next set of changes required to boot MacOS on the q800 machine. The main aim of these patches is to improve the Nubus support so that devices can be plugged into the Nubus from the command line i.e. -device nubus-macfb[,slot=num][,romfile=decl.rom] At the moment the onl

[PATCH v6 07/20] nubus: add trace-events for empty slot accesses

2021-09-24 Thread Mark Cave-Ayland
Increase the max_access_size to 4 bytes for empty Nubus slot and super slot accesses to allow tracing of the Nubus enumeration process by the guest OS. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/nubus/nubus-bus.c | 10 +++--- hw/

[PATCH v6 06/20] nubus: implement BusClass get_dev_path()

2021-09-24 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/nubus/nubus-bus.c | 16 1 file changed, 16 insertions(+) diff --git a/hw/nubus/nubus-bus.c b/hw/nubus/nubus-bus.c index 96ef027bad..04f11edd24 100644 --- a/hw/nubus/nubus-bus

[PATCH v6 02/20] nubus-device: rename slot_nb variable to slot

2021-09-24 Thread Mark Cave-Ayland
This is in preparation for creating a qdev property of the same name. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/nubus/nubus-device.c | 14 +++--- include/hw/nubus/nubus.h | 2 +- 2 files changed, 8 insertions(+), 8 deletion

[PATCH v6 03/20] nubus-device: expose separate super slot memory region

2021-09-24 Thread Mark Cave-Ayland
According to "Designing Cards and Drivers for the Macintosh Family" each physical nubus slot can access 2 separate address ranges: a super slot memory region which is 256MB and a standard slot memory region which is 16MB. Currently a Nubus device uses the physical slot number to determine whethe

[PATCH v6 12/20] nubus: move nubus to its own 32-bit address space

2021-09-24 Thread Mark Cave-Ayland
According to "Designing Cards and Drivers for the Macintosh Family" the Nubus has its own 32-bit address space based upon physical slot addressing. Move Nubus to its own 32-bit address space and then use memory region aliases to map available slot and super slot ranges into the q800 system address

[PATCH v6 08/20] nubus: generate bus error when attempting to access empty slots

2021-09-24 Thread Mark Cave-Ayland
According to "Designing Cards and Drivers for the Macintosh Family" any attempt to access an unimplemented address location on Nubus generates a bus error. MacOS uses a custom bus error handler to detect empty Nubus slots, and with the current implementation assumes that all slots are occupied as

[PATCH v6 10/20] nubus-device: remove nubus_register_rom() and nubus_register_format_block()

2021-09-24 Thread Mark Cave-Ayland
Since there is no need to generate a dummy declaration ROM, remove both nubus_register_rom() and nubus_register_format_block(). These will shortly be replaced with a mechanism to optionally load a declaration ROM from disk to allow real images to be used within QEMU. Signed-off-by: Mark Cave-Aylan

[PATCH v6 14/20] mac-nubus-bridge: rename MacNubusState to MacNubusBridge

2021-09-24 Thread Mark Cave-Ayland
This better reflects that the mac-nubus-bridge device is derived from the nubus-bridge device, and that the structure represents the state of the bridge device and not the Nubus itself. Also update the comment in the file header to reflect that mac-nubus-bridge is specific to the Macintosh. Signed

[PATCH v6 09/20] macfb: don't register declaration ROM

2021-09-24 Thread Mark Cave-Ayland
The macfb device is an on-board framebuffer and so is initialised by the system declaration ROM included within the MacOS toolbox ROM. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/display/macfb.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/hw/display/macfb.c b

[PATCH v6 17/20] nubus-bridge: make slot_available_mask a qdev property

2021-09-24 Thread Mark Cave-Ayland
This is to allow Macintosh machines to further specify which slots are available since the number of addressable slots may not match the number of physical slots present in the machine. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé --- hw/nubus

[PATCH v6 15/20] nubus: move NubusBus from mac-nubus-bridge to nubus-bridge

2021-09-24 Thread Mark Cave-Ayland
Now that Nubus has its own address space rather than mapping directly into the system bus, move the Nubus reference from MacNubusBridge to NubusBridge. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 2 +

[PATCH v6 13/20] nubus-bridge: introduce separate NubusBridge structure

2021-09-24 Thread Mark Cave-Ayland
This is to allow the Nubus bridge to store its own additional state. Also update the comment in the file header to reflect that nubus-bridge is not specific to the Macintosh. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/nubus/nubus-brid

Re: [PATCH] hw/nvme: reattach subsystem namespaces on hotplug

2021-09-24 Thread Klaus Jensen
On Sep 24 08:05, Hannes Reinecke wrote: > On 9/23/21 10:09 PM, Klaus Jensen wrote: > > On Sep 9 13:37, Hannes Reinecke wrote: > > > On 9/9/21 12:47 PM, Klaus Jensen wrote: > > > > On Sep 9 11:43, Hannes Reinecke wrote: > > > > > With commit 5ffbaeed16 ("hw/nvme: fix controller hot unplugging") >

[PATCH v6 18/20] nubus: add support for slot IRQs

2021-09-24 Thread Mark Cave-Ayland
Each Nubus slot has an IRQ line that can be used to request service from the CPU. Connect the IRQs to the Nubus bridge so that they can be wired up using qdev gpios accordingly, and introduce a new nubus_set_irq() function that can be used by Nubus devices to control the slot IRQ. Signed-off-by:

[PATCH v6 16/20] nubus-bridge: embed the NubusBus object directly within nubus-bridge

2021-09-24 Thread Mark Cave-Ayland
Since nubus-bridge is a container for NubusBus then it should be embedded directly within the bridge device using qbus_create_inplace(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 2 +- hw/nubus/mac-nubus-br

[PATCH v6 19/20] q800: wire up nubus IRQs

2021-09-24 Thread Mark Cave-Ayland
Nubus IRQs are routed to the CPU through the VIA2 device so wire up the IRQs using gpios accordingly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/hw/m68k/q800.c b/hw

[PATCH v6 04/20] nubus: use bitmap to manage available slots

2021-09-24 Thread Mark Cave-Ayland
Convert nubus_device_realize() to use a bitmap to manage available slots to allow for future Nubus devices to be plugged into arbitrary slots from the command line using a new qdev "slot" parameter for nubus devices. Update mac_nubus_bridge_init() to only allow slots 0x9 to 0xe on Macintosh mac

[PATCH v6 11/20] nubus-device: add romfile property for loading declaration ROMs

2021-09-24 Thread Mark Cave-Ayland
The declaration ROM is located at the top-most address of the standard slot space. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/nubus/nubus-device.c | 44 +++- include/hw/nubus/nubus.h | 6 ++ 2 files changed, 49 insertions(+), 1 d

[PATCH v6 20/20] q800: configure nubus available slots for Quadra 800

2021-09-24 Thread Mark Cave-Ayland
Slot 0x9 is reserved for use by the in-built framebuffer whilst only slots 0xc, 0xd and 0xe physically exist on the Quadra 800. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 9 + 1 file changed, 9 insertions(+) dif

Re: [PATCH] hw/misc: Add an iBT device model

2021-09-24 Thread Philippe Mathieu-Daudé
On 9/24/21 01:48, Titus Rwantare wrote: Hello all, I'd like some clarification on how the following code transfers irqs back and forth: b/hw/arm/aspeed_soc.c +/* iBT */ +if (!sysbus_realize(SYS_BUS_DEVICE(&s->ibt), errp)) { +return; +} +memory_region_add_subregion(&s->l

Re: [PATCH v5 04/20] nubus: use bitmap to manage available slots

2021-09-24 Thread Philippe Mathieu-Daudé
On 9/24/21 09:16, Mark Cave-Ayland wrote: On 23/09/2021 15:16, BALATON Zoltan wrote: On Thu, 23 Sep 2021, Mark Cave-Ayland wrote: Convert nubus_device_realize() to use a bitmap to manage available slots to allow for future Nubus devices to be plugged into arbitrary slots from the command line

Re: [PATCH v5 18/20] nubus: add support for slot IRQs

2021-09-24 Thread Philippe Mathieu-Daudé
On 9/24/21 09:06, Mark Cave-Ayland wrote: On 23/09/2021 10:49, Philippe Mathieu-Daudé wrote: On 9/23/21 11:13, Mark Cave-Ayland wrote: Each Nubus slot has an IRQ line that can be used to request service from the CPU. Connect the IRQs to the Nubus bridge so that they can be wired up using qdev

Re: [PATCH v6 04/20] nubus: use bitmap to manage available slots

2021-09-24 Thread Philippe Mathieu-Daudé
On 9/24/21 09:37, Mark Cave-Ayland wrote: Convert nubus_device_realize() to use a bitmap to manage available slots to allow for future Nubus devices to be plugged into arbitrary slots from the command line using a new qdev "slot" parameter for nubus devices. Update mac_nubus_bridge_init() to o

Re: [PATCH v6 05/20] nubus: move slot bitmap checks from NubusDevice realize() to BusClass check_address()

2021-09-24 Thread Philippe Mathieu-Daudé
On 9/24/21 09:37, Mark Cave-Ayland wrote: Allow Nubus to manage the slot allocations itself using the BusClass check_address() virtual function rather than managing this during NubusDevice realize(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/nubus/nubus-bus.c| 2

[PATCH 01/11] qom: Reduce use of error_propagate()

2021-09-24 Thread Kevin Wolf
ERRP_GUARD() makes debugging easier by making sure that &error_abort still fails at the real origin of the error instead of error_propagate(). Signed-off-by: Kevin Wolf --- qom/object.c| 7 +++ qom/object_interfaces.c | 17 ++--- 2 files changed, 9 insertions(+), 15

[PATCH 00/11] qdev: Add JSON -device and fix QMP device_add

2021-09-24 Thread Kevin Wolf
It's still a long way until we'll have QAPIfied devices, but there are some improvements that we can already make now to make the future switch easier. One important part of this is having code paths without QemuOpts, which we want to get rid of and replace with the keyval parser in the long run.

[PATCH 06/11] qdev: Add Error parameter to qdev_set_id()

2021-09-24 Thread Kevin Wolf
object_property_add_child() fails (with &error_abort) if an object with the same name already exists. As long as QemuOpts is in use for -device and device_add, it catches duplicate IDs before qdev_set_id() is even called. However, for enabling non-QemuOpts code paths, we need to make sure that the

[PATCH 03/11] iotests/051: Fix typo

2021-09-24 Thread Kevin Wolf
The iothread isn't called 'iothread0', but 'thread0'. Depending on the order that properties are parsed, the error message may change from the expected one to another one saying that the iothread doesn't exist. Signed-off-by: Kevin Wolf --- tests/qemu-iotests/051| 2 +- tests/qemu-iotest

[PATCH 02/11] iotests/245: Fix type for iothread property

2021-09-24 Thread Kevin Wolf
iothread is a string property, so None (= JSON null) is not a valid value for it. Pass the empty string instead to get the default iothread. Signed-off-by: Kevin Wolf --- tests/qemu-iotests/245 | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/qemu-iotests/245 b/tests

[PATCH 04/11] qdev: Avoid using string visitor for properties

2021-09-24 Thread Kevin Wolf
The only thing the string visitor adds compared to a keyval visitor is list support. git grep for 'visit_start_list' and 'visit.*List' shows that devices don't make use of this. In a world with a QAPIfied command line interface, the keyval visitor is used to parse the command line. In order to mak

[PATCH 11/11] Deprecate stable non-JSON -device and -object

2021-09-24 Thread Kevin Wolf
We want to switch both from QemuOpts to the keyval parser in the future, which results in some incompatibilities, mainly around list handling. Mark the non-JSON version of both as unstable syntax so that management tools switch to JSON and we can later make the change without breaking things. Sign

[PATCH 05/11] qdev: Make DeviceState.id independent of QemuOpts

2021-09-24 Thread Kevin Wolf
DeviceState.id is a pointer to a string that is stored in the QemuOpts object DeviceState.opts and freed together with it. We want to create devices without going through QemuOpts in the future, so make this a separately allocated string. Signed-off-by: Kevin Wolf --- include/hw/qdev-core.h

Re: [PATCH v5 18/20] nubus: add support for slot IRQs

2021-09-24 Thread Philippe Mathieu-Daudé
On 9/24/21 11:01, Philippe Mathieu-Daudé wrote: On 9/24/21 09:06, Mark Cave-Ayland wrote: On 23/09/2021 10:49, Philippe Mathieu-Daudé wrote: On 9/23/21 11:13, Mark Cave-Ayland wrote: Each Nubus slot has an IRQ line that can be used to request service from the CPU. Connect the IRQs to the Nubu

[PATCH 09/11] qdev: Avoid QemuOpts in QMP device_add

2021-09-24 Thread Kevin Wolf
Directly call qdev_device_add_from_qdict() for QMP device_add instead of first going through QemuOpts and converting back to QDict. Note that this changes the behaviour of device_add, though in ways that should be considered bug fixes: QemuOpts ignores differences between data types, so you could

[PATCH 10/11] vl: Enable JSON syntax for -device

2021-09-24 Thread Kevin Wolf
Like we already do for -object, introduce support for JSON syntax in -device, which can be kept stable in the long term and guarantees that a single code path with identical behaviour is used for both QMP and the command line. Compared to the QemuOpts based code, the parser contains less surprises

[PATCH 07/11] qemu-option: Allow deleting opts during qemu_opts_foreach()

2021-09-24 Thread Kevin Wolf
Use QTAILQ_FOREACH_SAFE() so that the current QemuOpts can be deleted while iterating through the whole list. Signed-off-by: Kevin Wolf --- util/qemu-option.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/util/qemu-option.c b/util/qemu-option.c index 61cb4a97bd..eedd089

[PATCH 08/11] qdev: Base object creation on QDict rather than QemuOpts

2021-09-24 Thread Kevin Wolf
QDicts are both what QMP natively uses and what the keyval parser produces. Going through QemuOpts isn't useful for either one, so switch the main device creation function to QDicts. By sharing more code with the -object/object-add code path, we can even reduce the code size a bit. This commit doe

Re: [PATCH v3 2/2] docs/sphinx: change default role to "any"

2021-09-24 Thread Peter Maydell
On Thu, 23 Sept 2021 at 20:14, John Snow wrote: > > This interprets single-backtick syntax in all of our Sphinx docs as a > cross-reference to *something*, including Python symbols. > > From here on out, new uses of `backticks` will cause a build failure if > the target cannot be referenced. > > S

Re: Ping: [PATCH 0/2] cocoa.m: keyboard quality of life reborn

2021-09-24 Thread Peter Maydell
On Fri, 24 Sept 2021 at 00:08, Programmingkid wrote: > > Hi Peter, are you reviewing cocoa patches? Should someone else see these > patches? Gerd sent out a message a while back suggesting that people interested in the cocoa UI (we have had several people recently submit patches) ought to start

Re: [question] VFIO Device Migration: The vCPU may be paused during vfio device DMA in iommu nested stage mode && vSVA

2021-09-24 Thread Kirti Wankhede
On 9/24/2021 12:17 PM, Tian, Kevin wrote: From: Kunkun Jiang Sent: Friday, September 24, 2021 2:19 PM Hi all, I encountered a problem in vfio device migration test. The vCPU may be paused during vfio-pci DMA in iommu nested stage mode && vSVA. This may lead to migration fail and other probl

[PATCH v6 00/40] accel: Move has_work() from CPUClass to AccelOpsClass

2021-09-24 Thread Philippe Mathieu-Daudé
Hi, CPU has_work() is a per-accelerator handler. This series is organized in 2 parts: - Patches 1-15: Move has_work() from CPUClass to AccelOpsClass - Patches 16-40: Move remainging has_work() to TCGCPUOps I prefer to send as a single big series to be sure it is merged at once, since the 2nd part

[PATCH v6 01/40] accel: Simplify qemu_init_vcpu()

2021-09-24 Thread Philippe Mathieu-Daudé
cpus_register_accel() already checks for ops->create_vcpu_thread being non-NULL, so it is pointless to re-check for it in qemu_init_vcpu(). Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/softmmu/cpus.c b/softmmu

[PATCH v6 02/40] accel/tcg: Restrict cpu_handle_halt() to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Commit 372579427a5 ("tcg: enable thread-per-vCPU") added the following comment describing EXCP_HALTED in qemu_tcg_cpu_thread_fn(): case EXCP_HALTED: /* during start-up the vCPU is reset and the thread is * kicked several times. If we don't ensure we go back * to sl

[PATCH v6 06/40] accel: Introduce AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Introduce an accelerator-specific has_work() handler. Eventually call it from cpu_has_work(). Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/accel-ops.h | 5 + softmmu/cpus.c | 3 +++ 2 files changed, 8 insertions(+) diff --git a/includ

[PATCH v6 08/40] accel/whpx: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Implement WHPX has_work() handler in AccelOpsClass and remove it from cpu_thread_is_idle() since cpu_has_work() is already called. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c| 4 +--- target/i386/whpx/whpx-accel-ops.c | 6 ++ 2

[PATCH v6 03/40] hw/core: Restrict cpu_has_work() to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
cpu_has_work() is only called from system emulation code. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core

[PATCH v6 05/40] hw/core: Move cpu_common_has_work() to cpu_has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
cpu_class_init() always register cpu_common_has_work() as CPUClass::has_work() handler, so the assertion check in cpu_has_work() is pointless. Since cpu_common_has_work() simply returns 'false', we can inline it in cpu_has_work(), improving the function readability. Suggested-by: Richard Henderson

[PATCH v6 12/40] accel/nvmm: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Since there is no specific NVMM handling for cpu_has_work() in cpu_thread_is_idle(), implement NVMM has_work() handler as a simple 'return false' code. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/nvmm/nvmm-accel-ops.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target/i38

[PATCH v6 04/40] hw/core: Un-inline cpu_has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
We want to make cpu_has_work() per-accelerator. Only declare its prototype and move its definition to softmmu/cpus.c. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 +--- softmmu/cpus.c| 8 2 files changed, 9 insertions(+)

[PATCH v6 07/40] accel/kvm: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Implement KVM has_work() handler in AccelOpsClass and remove it from cpu_thread_is_idle() since cpu_has_work() is already called. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- accel/kvm/kvm-accel-ops.c | 6 ++ softmmu/cpus.c| 2 +- 2 files changed, 7 i

[PATCH v6 15/40] accel: Simplify cpu_has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Now that all accelerators implement a has_work() handler, we can simplify cpu_has_work() by removing the non-NULL handler check. Add an assertion in cpus_register_accel() for future accelerators. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c | 6 ++---

[PATCH v6 19/40] target/avr: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/avr/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 5d70e34dd54..6d51f91ca2c 100644 --- a/target/avr/cpu.c +++ b/tar

[PATCH v6 09/40] accel/hvf: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Since there is no specific HVF handling for cpu_has_work() in cpu_thread_is_idle(), implement HVF has_work() handler as a simple 'return false' code. Signed-off-by: Philippe Mathieu-Daudé --- accel/hvf/hvf-accel-ops.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/accel/hvf/hvf-accel-

[PATCH v6 10/40] accel/xen: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Since there is no specific Xen handling for cpu_has_work() in cpu_thread_is_idle(), implement Xen has_work() handler as a simple 'return false' code. Acked-by: Paul Durrant Signed-off-by: Philippe Mathieu-Daudé --- accel/xen/xen-all.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/ac

[PATCH v6 18/40] target/arm: Restrict has_work() handler to sysemu and TCG

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict arm_cpu_has_work() and has_work() handler to TCG sysemu. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/internals.h | 4 +++- target/arm/cpu.c | 7 +-- target/arm/cpu_tcg.c | 2 +- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/target/arm/internals.h b/

[PATCH v6 20/40] target/cris: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/cris/cpu.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index c2e7483f5bd..b2761f8b110 100644 --- a/target/cris/cpu.c +

[PATCH v6 22/40] target/hppa: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index e8edd189bfc..be940ae2246 100644 --- a/target/hppa/cpu.c ++

[PATCH v6 11/40] accel/hax: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Since there is no specific HAX handling for cpu_has_work() in cpu_thread_is_idle(), implement HAX has_work() handler as a simple 'return false' code. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hax/hax-accel-ops.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target/i386/ha

[PATCH v6 17/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work

2021-09-24 Thread Philippe Mathieu-Daudé
ARM v7M cores inherit TYPE_ARM_CPU, so TYPE_ARM_CPU's class_init runs first and sets up most of the class fields, setting in particular the has_work handler to the generic arm_cpu_has_work(). Thus M-profile and A-profile share the same arm_cpu_has_work() function. Some of the checks the code there

[PATCH v6 36/40] target/sparc: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 0d252cb5bdc..8d61bf15f6c 100644 --- a/target/sparc/cpu.

[PATCH v6 13/40] accel/qtest: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Implement QTest has_work() handler in AccelOpsClass. Since no CPU are available under QTest accelerator, this function is not reachable. Signed-off-by: Philippe Mathieu-Daudé --- accel/qtest/qtest.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/accel/qtest/qtest.c b/accel/qtest/qtest

Re: [PATCH-for-6.2 0/2] disas/nios2: Simplify endianess conversion

2021-09-24 Thread Philippe Mathieu-Daudé
Hi Cris and Marek, could you help me get this series merged? On 9/23/21 17:14, Laurent Vivier wrote: Le 18/09/2021 à 11:19, Philippe Mathieu-Daudé a écrit : Cc'ing qemu-trivial@ (series fully reviewed). An Acked-by from one of NiosII maintainers would be welcome. Thanks, Laurent On 8/7/21

[PATCH v6 23/40] target/i386: Restrict has_work() handler to sysemu and TCG

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.c | 6 -- target/i386/tcg/tcg-cpu.c | 8 +++- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6b

[PATCH v6 26/40] target/mips: Restrict has_work() handler to sysemu and TCG

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 00e0c55d0e4..3639c03f8ea 100644 --- a/target/mips/cpu.

[PATCH v6 38/40] target/xtensa: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/cpu.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index c1cbd03595e..5cb19a88819 100644 --- a/ta

[PATCH v6 14/40] accel/tcg: Implement AccelOpsClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
All accelerators but TCG implement their AccelOpsClass::has_work() handler, meaning all the remaining CPUClass::has_work() ones are only reachable from TCG accelerator; and these has_work() handlers belong to TCGCPUOps. We will gradually move each target CPUClass::has_work() to TCGCPUOps in the fo

[PATCH v6 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict PowerPCCPUClass::has_work() and ppc_cpu_has_work() - SysemuCPUOps::has_work() implementation - to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/cpu-qom.h | 4 +++- target/ppc/cpu_init.c | 24 ++-- 2 files changed,

[PATCH v6 39/40] accel/tcg: Remove CPUClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Now that all TCG targets converted their CPUClass::has_work() handler to a TCGCPUOps::has_work() one, we can remove has_work from CPUClass. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 2 -- accel/tcg/tcg-accel-ops.c | 3 --- 2 files chan

[PATCH v6 16/40] accel/tcg: Introduce TCGCPUOps::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
Introduce a target-specific has_work() handler for TCG. Eventually call it from tcg_cpu_has_work(), our AccelOpsClass::has_work() handler. Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 4 accel/tcg/tcg-accel-ops.c | 4 2 f

[PATCH v6 27/40] target/nios2: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/nios2/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 947bb09bc1e..9938d7c2919 100644 --- a/target/nios2/cpu.

[PATCH v6 21/40] target/hexagon: Remove unused has_work() handler

2021-09-24 Thread Philippe Mathieu-Daudé
has_work() is sysemu specific, and Hexagon target only provides a linux-user implementation. Remove the unused hexagon_cpu_has_work(). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/hexagon/cpu.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/he

[PATCH v6 28/40] target/openrisc: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/openrisc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 27cb04152f9..3c368a1bde7 100644 --- a/target/o

[PATCH v2 1/5] MAINTAINERS: Orphan obscure ppc platforms

2021-09-24 Thread David Gibson
There are a nunber of old embedded ppc machine types which have been little changed and in "Odd Fixes" state for a long time. With both myself and Greg Kurz moving toward other areas, we no longer have the capacity to keep reviewing and maintaining even the rare patches that come in for those plat

[PATCH v2 3/5] MAINTAINERS: Remove David & Greg as reviewers/co-maintainers of powernv

2021-09-24 Thread David Gibson
With our interests moving to other areas, Greg and myself no longer have capacity to be regular reviewers of code for the powernv machine type, let alone co-maintainers. Additionally, not being IBM employees, we don't have easy access to the hardware information we'd need for good review. Therefo

[PATCH v6 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 7b7b05f1d3a..df8ade9021d 100644 --- a/target/s390x/

[PATCH v6 24/40] target/m68k: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 66d22d11895..ad5d26b5c9e 100644 --- a/target/m68k/cpu.c ++

[PATCH v6 25/40] target/microblaze: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/cpu.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 15db277925f..36e6e540483 100644 ---

[PATCH v6 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition

2021-09-24 Thread Philippe Mathieu-Daudé
The SPARC target only support TCG acceleration. Remove the CONFIG_TCG definition introduced by mistake in commit 78271684719 ("cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass"). Reported-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé -

[PATCH v2 2/5] MAINTAINERS: Remove David & Greg as reviewers for a number of boards

2021-09-24 Thread David Gibson
Greg and I are moving towards other areas and no longer have capacity to act as regular reviewers for several of the secondary ppc machine types. So, remove ourselves as reviewers for Macintosh, PReP, sam460ex and pegasos2 in MAINTAINERS. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- M

[PATCH v6 31/40] target/riscv: Restrict has_work() handler to sysemu and TCG

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Acked-by: Alistair Francis Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7c626d89cd7..ca76b

[PATCH v2 5/5] MAINTAINERS: Demote sPAPR from "Supported" to "Maintained"

2021-09-24 Thread David Gibson
qemu/KVM on Power is no longer my primary job responsibility, nor Greg Kurz'. I still have some time for upstream maintenance, but it's no longer accurate to say that I'm paid to do so. Therefore, reduce sPAPR (the "pseries" machine type) from Supported to Maintained. Signed-off-by: David Gibson

[PATCH v6 37/40] target/tricore: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/cpu.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index b95682b7f04..419fa624bd5 100644 --- a/target/tr

[PATCH v6 29/40] target/ppc: Introduce PowerPCCPUClass::has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
We're moving the hook from CPUState to TCGCPUOps. TCGCPUOps is a const structure, so to avoid creating multiple versions of the same structure, simply changing the has_work() handler, introduce yet another indirection with a has_work() handler in PowerPCCPUClass, and ppc_cpu_has_work() method which

Re: [PATCH] block: introduce max_hw_iov for use in scsi-generic

2021-09-24 Thread Kevin Wolf
Am 23.09.2021 um 15:04 hat Paolo Bonzini geschrieben: > Linux limits the size of iovecs to 1024 (UIO_MAXIOV in the kernel > sources, IOV_MAX in POSIX). Because of this, on some host adapters > requests with many iovecs are rejected with -EINVAL by the > io_submit() or readv()/writev() system calls

[PATCH v6 32/40] target/rx: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 25a4aa2976d..ac6b40b2716 100644 --- a/target/rx/cpu.c +++ b/targ

[PATCH v2 4/5] MAINTAINERS: Add information for OpenPIC

2021-09-24 Thread David Gibson
The OpenPIC interrupt controller was once the de facto standard on ppc machines. In qemu it's now only used on some Macintosh and the Freescale e500 machine. It has no listed maintainer, and as far as I know, no-one who's really familiar with it any more. Since I'm moving away from the area, I n

[PATCH v6 34/40] target/sh4: Restrict has_work() handler to sysemu

2021-09-24 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 2047742d03c..fb2116dc52e 100644 --- a/target/sh4/cpu.c +++

[PATCH v6 40/40] accel/tcg: Simplify tcg_cpu_has_work()

2021-09-24 Thread Philippe Mathieu-Daudé
All TCG targets implement the TCGCPUOps::has_work() handler. We can remove the non-NULL handler check in tcg_cpu_has_work(). Add an assertion in tcg_exec_realizefn() for future TCG targets. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cpu-exec.c | 4 accel/tcg/tcg-accel-ops.c |

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