[PATCH 13/20] nubus-bridge: introduce separate NubusBridge structure

2021-09-12 Thread Mark Cave-Ayland
This is to allow the Nubus bridge to store its own additional state. Also update the comment in the file header to reflect that nubus-bridge is not specific to the Macintosh. Signed-off-by: Mark Cave-Ayland --- hw/nubus/nubus-bridge.c | 4 ++-- include/hw/nubus/mac-nubus-bridge.h | 2

[PATCH 08/20] nubus: generate bus error when attempting to access empty slots

2021-09-12 Thread Mark Cave-Ayland
According to "Designing Cards and Drivers for the Macintosh Family" any attempt to access an unimplemented address location on Nubus generates a bus error. MacOS uses a custom bus error handler to detect empty Nubus slots, and with the current implementation assumes that all slots are occupied as

[PATCH 12/20] nubus: move nubus to its own 32-bit address space

2021-09-12 Thread Mark Cave-Ayland
According to "Designing Cards and Drivers for the Macintosh Family" the Nubus has its own 32-bit address space based upon physical slot addressing. Move Nubus to its own 32-bit address space and then use memory region aliases to map available slot and super slot ranges into the q800 system address

[PATCH 14/20] mac-nubus-bridge: rename MacNubusState to MacNubusBridge

2021-09-12 Thread Mark Cave-Ayland
This better reflects that the mac-nubus-bridge device is derived from the nubus-bridge device, and that the structure represents the state of the bridge device and not the Nubus itself. Also update the comment in the file header to reflect that mac-nubus-bridge is specific to the Macintosh. Signed

[PATCH 18/20] nubus: add support for slot IRQs

2021-09-12 Thread Mark Cave-Ayland
Each Nubus slot has an IRQ line that can be used to request service from the CPU. Connect the IRQs to the Nubus bridge so that they can be wired up using qdev gpios accordingly, and introduce a new nubus_set_irq() function that can be used by Nubus devices to control the slot IRQ. Signed-off-by:

[PATCH 09/20] macfb: don't register declaration ROM

2021-09-12 Thread Mark Cave-Ayland
The macfb device is an on-board framebuffer and so is initialised by the system declaration ROM included within the MacOS toolbox ROM. Signed-off-by: Mark Cave-Ayland --- hw/display/macfb.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/hw/display/macfb.c b/hw/display/macfb.c index d81

[PATCH 16/20] nubus-bridge: embed the NubusBus object directly within nubus-bridge

2021-09-12 Thread Mark Cave-Ayland
Since nubus-bridge is a container for NubusBus then it should be embedded directly within the bridge device using qbus_create_inplace(). Signed-off-by: Mark Cave-Ayland --- hw/m68k/q800.c | 2 +- hw/nubus/mac-nubus-bridge.c | 7 --- hw/nubus/nubus-bridge.c | 3 ++- include/h

[PATCH 17/20] nubus-bridge: make slot_available_mask a qdev property

2021-09-12 Thread Mark Cave-Ayland
This is to allow Macintosh machines to further specify which slots are available since the number of addressable slots may not match the number of physical slots present in the machine. Signed-off-by: Mark Cave-Ayland --- hw/nubus/nubus-bridge.c | 7 +++ 1 file changed, 7 insertions(+) diff

[PATCH 20/20] q800: configure nubus available slots for Quadra 800

2021-09-12 Thread Mark Cave-Ayland
Slot 0x9 is reserved for use by the in-built framebuffer whilst only slots 0xc, 0xd and 0xe physically exist on the Quadra 800. Signed-off-by: Mark Cave-Ayland --- hw/m68k/q800.c | 9 + 1 file changed, 9 insertions(+) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index fbc45a301f..65c804

[PATCH 19/20] q800: wire up nubus IRQs

2021-09-12 Thread Mark Cave-Ayland
Nubus IRQs are routed to the CPU through the VIA2 device so wire up the IRQs using gpios accordingly. Signed-off-by: Mark Cave-Ayland --- hw/m68k/q800.c | 5 + 1 file changed, 5 insertions(+) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index e34df1a829..fbc45a301f 100644 --- a/hw/m68k/q800

Re: [qemu-web PATCH] Fix link to Windows page in Wiki

2021-09-12 Thread Helge Konetzka
Am 11.09.21 um 11:30 schrieb Mark Cave-Ayland: On 11/09/2021 10:17, Helge Konetzka wrote: Am 11.09.21 um 11:03 schrieb Mark Cave-Ayland: So the question is: what has changed? I find it hard to believe that MSYS2/MingW64 is configured out-of-the-box to break a standard "./configure && make" b

Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work()

2021-09-12 Thread Richard Henderson
On 9/11/21 3:31 PM, Philippe Mathieu-Daudé wrote: On 9/3/21 11:11 PM, Philippe Mathieu-Daudé wrote: On 9/3/21 10:42 PM, Richard Henderson wrote: On 9/3/21 2:50 AM, David Gibson wrote: On Thu, Sep 02, 2021 at 06:15:34PM +0200, Philippe Mathieu-Daudé wrote: Each POWER cpu has its own has_work()

Re: [PATCH v4 17/21] LoongArch Linux User Emulation

2021-09-12 Thread Richard Henderson
On 9/10/21 10:58 PM, Song Gao wrote: By the way, We have already prepared V5 patches. but I see that patches [1] and [2] have not push into master. How can I use these patches? [1]: https://patchew.org/QEMU/20210618192951.125651-1-richard.hender...@linaro.org/ [2]: https://patchew.org/QEMU/20

Re: [PATCH 1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set

2021-09-12 Thread Frank Chang
On Sat, Sep 11, 2021 at 9:12 PM Bin Meng wrote: > On Sat, Sep 11, 2021 at 8:37 PM Bin Meng wrote: > > > > On Fri, Sep 10, 2021 at 1:56 PM wrote: > > > > > > From: Frank Chang > > > > > > Setting Control.claim clears all of the chanel's Next registers. > > > This is effective only when Control.

[PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware

2021-09-12 Thread frank . chang
From: Frank Chang Current QEMU PDMA doesn't align with real PDMA's behavior. This would result in Linux dmatest failed. This patchest aligns with real PDMA's behavior we tested on the real board. The golden results are performed in U-Boot on the Unmatched board with PDMA supported. Changelog: v

[PATCH v2 1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set

2021-09-12 Thread frank . chang
From: Frank Chang Setting Control.claim clears all of the chanel's Next registers. This is effective only when Control.claim is set from 0 to 1. Signed-off-by: Frank Chang Tested-by: Max Hsu Reviewed-by: Bin Meng Tested-by: Bin Meng --- hw/dma/sifive_pdma.c | 19 +++ 1 file

[PATCH v2 2/4] hw/dma: sifive_pdma: claim bit must be set before DMA transactions

2021-09-12 Thread frank . chang
From: Frank Chang Real PDMA must have Control.claim bit to be set before Control.run bit is set to start any DMA transactions. Otherwise nothing will be transferred. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel

[PATCH] qapi: define cleanup function for g_autoptr(Error)

2021-09-12 Thread Paolo Bonzini
Allow replacing calls to error_free() with g_autoptr(Error) declarations. Signed-off-by: Paolo Bonzini --- include/qapi/error.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/qapi/error.h b/include/qapi/error.h index 4a9260b0cc..8564657baf 100644 --- a/include/qapi/error.h +++ b/i

Re: [PATCH 1/4] target/arm: Add TB flag for "MVE insns not predicated"

2021-09-12 Thread Richard Henderson
On 9/10/21 9:00 AM, Peter Maydell wrote: We actually already have code that sets is_jmp (to DISAS_UPDATE_EXIT) from gen_preserve_fp_state() -- we do that if we're using icount, setting DISAS_UPDATE_EXIT to force this to be the last insn in the TB. Do icount IO instructions need to avoid a possib

[PATCH v2 3/4] hw/dma: sifive_pdma: allow non-multiple transaction size transactions

2021-09-12 Thread frank . chang
From: Green Wan Real PDMA is able to deal with non-multiple transaction size transactions. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel 0 => mw.l 0x300 0x1 <= Claim channel 0 => mw.l 0x3

[PATCH 1/3] ui/console: replace QEMUFIFO with Fifo8

2021-09-12 Thread Volker Rümelin
One of the two FIFO implementations QEMUFIFO and Fifo8 is redundant. Replace QEMUFIFO with Fifo8. Signed-off-by: Volker Rümelin --- ui/console.c | 86 1 file changed, 20 insertions(+), 66 deletions(-) diff --git a/ui/console.c b/ui/console.c

[PATCH 3/3] ui/console: remove chardev frontend connected test

2021-09-12 Thread Volker Rümelin
The test if the chardev frontend is connected in kbd_put_keysym_console() is redundant, because the call to qemu_chr_be_can_write() in kbd_send_chars() tests the connected condition again. Remove the redundant test whether the chardev frontend is connected. Signed-off-by: Volker Rümelin --- ui/

[PATCH 0/3] ui/console: chardev backend improvements

2021-09-12 Thread Volker Rümelin
A few things I learnt while writing a fix for a chardev bug in the GTK backend. Volker Rümelin (3):   ui/console: replace QEMUFIFO with Fifo8   ui/console: replace kbd_timer with chr_accept_input callback   ui/console: remove chardev frontend connected test  ui/console.c | 109 ++

[PATCH v2 4/4] hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer

2021-09-12 Thread frank . chang
From: Frank Chang Real PDMA doesn't set Control.error if there are 0 bytes to be transferred. The DMA transfer is still success. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel 0 => mw.l 0x300 0x1

[PATCH] docs: link to archived Fedora code of conduct

2021-09-12 Thread Paolo Bonzini
Fedora has switched to a different CoC. QEMU's own code of conduct is based on the previous version and cites it as a source. Replace the link with one to the Wayback Machine. Signed-off-by: Paolo Bonzini --- docs/devel/code-of-conduct.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions

[PATCH 2/3] ui/console: replace kbd_timer with chr_accept_input callback

2021-09-12 Thread Volker Rümelin
There's a ChardevClass chr_accept_input() callback function that can replace the write retry timer. Signed-off-by: Volker Rümelin --- ui/console.c | 28 +--- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/ui/console.c b/ui/console.c index e6ce29024c..7b27

Re: [PATCH v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware

2021-09-12 Thread Frank Chang
於 2021年9月12日 週日 下午8:46寫道: > From: Frank Chang > > Current QEMU PDMA doesn't align with real PDMA's behavior. This would > result in Linux dmatest failed. This patchest aligns with real PDMA's > behavior we tested on the real board. The golden results are performed > in U-Boot on the Unmatched bo

[PATCH RESEND v2 0/4] hw/dma: Align SiFive PDMA behavior with real hardware

2021-09-12 Thread frank . chang
From: Frank Chang Current QEMU PDMA doesn't align with real PDMA's behavior. This would result in Linux dmatest failed. This patchest aligns with real PDMA's behavior we tested on the real board. The golden results are performed in U-Boot on the Unmatched board with PDMA supported. Changelog: v

[PATCH RESEND v2 3/4] hw/dma: sifive_pdma: allow non-multiple transaction size transactions

2021-09-12 Thread frank . chang
From: Green Wan Real PDMA is able to deal with non-multiple transaction size transactions. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel 0 => mw.l 0x300 0x1 <= Claim channel 0 => mw.l 0x3

[PATCH RESEND v2 1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set

2021-09-12 Thread frank . chang
From: Frank Chang Setting Control.claim clears all of the chanel's Next registers. This is effective only when Control.claim is set from 0 to 1. Signed-off-by: Frank Chang Tested-by: Max Hsu Reviewed-by: Bin Meng Tested-by: Bin Meng --- hw/dma/sifive_pdma.c | 19 +++ 1 file

Re: tcg: pointer size warning on x32 arch

2021-09-12 Thread Richard Henderson
On 9/11/21 2:46 PM, Philippe Mathieu-Daudé wrote: On 9/11/21 11:06 PM, Philippe Mathieu-Daudé wrote: On 9/11/21 7:50 PM, Michael Tokarev wrote: Hi. The following warning is reported by the C compiler when compiling tcg code on x32 architecture: In file included from ../../tcg/tcg.c:429: tcg/i

[PATCH RESEND v2 4/4] hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer

2021-09-12 Thread frank . chang
From: Frank Chang Real PDMA doesn't set Control.error if there are 0 bytes to be transferred. The DMA transfer is still success. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel 0 => mw.l 0x300 0x1

[PATCH RESEND v2 2/4] hw/dma: sifive_pdma: claim bit must be set before DMA transactions

2021-09-12 Thread frank . chang
From: Frank Chang Real PDMA must have Control.claim bit to be set before Control.run bit is set to start any DMA transactions. Otherwise nothing will be transferred. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x300 0x0 <= Disclaim channel

Re: [PATCH] qapi: define cleanup function for g_autoptr(Error)

2021-09-12 Thread Richard Henderson
On 9/12/21 5:48 AM, Paolo Bonzini wrote: Allow replacing calls to error_free() with g_autoptr(Error) declarations. Signed-off-by: Paolo Bonzini --- include/qapi/error.h | 2 ++ 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH 01/20] nubus-device: rename slot_nb variable to slot

2021-09-12 Thread Philippe Mathieu-Daudé
Hi Mark, On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: > This is in preparation for creating a qdev property of the same name. > > Signed-off-by: Mark Cave-Ayland > --- > hw/nubus/nubus-device.c | 14 +++--- > include/hw/nubus/nubus.h | 2 +- > 2 files changed, 8 insertions(+), 8 deleti

Re: [PATCH 03/20] nubus-device: add device slot parameter

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: > This prepares for allowing Nubus devices to be placed in a specific slot > instead > of always being auto-allocated by the bus itself. > > Signed-off-by: Mark Cave-Ayland > --- > hw/nubus/nubus-device.c | 6 ++ > include/hw/nubus/nubus.h | 2 +-

Re: [PATCH 06/20] nubus: implement BusClass get_dev_path()

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > Signed-off-by: Mark Cave-Ayland > --- > hw/nubus/nubus-bus.c | 16 > 1 file changed, 16 insertions(+) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH 07/20] nubus: add trace-events for unassigned slot accesses

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > These allow tracing of the Nubus enumeration process by the guest OS. > > Signed-off-by: Mark Cave-Ayland > --- > hw/nubus/nubus-bus.c | 10 +++--- > hw/nubus/trace-events | 7 +++ > hw/nubus/trace.h | 1 + > meson.build |

Re: [PATCH 08/20] nubus: generate bus error when attempting to access empty slots

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > According to "Designing Cards and Drivers for the Macintosh Family" any > attempt > to access an unimplemented address location on Nubus generates a bus error. > MacOS > uses a custom bus error handler to detect empty Nubus slots, and with the > curr

Re: [PATCH 12/20] nubus: move nubus to its own 32-bit address space

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > According to "Designing Cards and Drivers for the Macintosh Family" the Nubus > has its own 32-bit address space based upon physical slot addressing. > > Move Nubus to its own 32-bit address space and then use memory region aliases > to map available s

Re: [PATCH 13/20] nubus-bridge: introduce separate NubusBridge structure

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > This is to allow the Nubus bridge to store its own additional state. Also > update > the comment in the file header to reflect that nubus-bridge is not specific to > the Macintosh. > > Signed-off-by: Mark Cave-Ayland > --- > hw/nubus/nubus-bridge.c

Re: [PATCH 14/20] mac-nubus-bridge: rename MacNubusState to MacNubusBridge

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > This better reflects that the mac-nubus-bridge device is derived from the > nubus-bridge device, and that the structure represents the state of the bridge > device and not the Nubus itself. Also update the comment in the file header to > reflect that ma

Re: [PATCH 15/20] nubus: move NubusBus from mac-nubus-bridge to nubus-bridge

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > Now that Nubus has its own address space rather than mapping directly into the > system bus, move the Nubus reference from MacNubusBridge to NubusBridge. > > Signed-off-by: Mark Cave-Ayland > --- > hw/m68k/q800.c | 2 +- > hw/nub

Re: [PATCH 16/20] nubus-bridge: embed the NubusBus object directly within nubus-bridge

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > Since nubus-bridge is a container for NubusBus then it should be embedded > directly within the bridge device using qbus_create_inplace(). > > Signed-off-by: Mark Cave-Ayland > --- > hw/m68k/q800.c | 2 +- > hw/nubus/mac-nubus-bridge.c |

Re: [PATCH 00/20] nubus: bus, device, bridge, IRQ and address space improvements

2021-09-12 Thread Philippe Mathieu-Daudé
Hi Mark, On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: > This patchset is the next set of changes required to boot MacOS on the q800 > machine. The > main aim of these patches is to improve the Nubus support so that devices can > be plugged > into the Nubus from the command line i.e. > > -dev

Re: [PATCH 02/20] nubus-device: expose separate super slot memory region

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: > According to "Designing Cards and Drivers for the Macintosh Family" each > physical > nubus slot can access 2 separate address ranges: a super slot memory region > which > is 256MB and a standard slot memory region which is 16MB. > > Currently a Nubu

Re: [PATCH 1/3] ui/console: replace QEMUFIFO with Fifo8

2021-09-12 Thread Marc-André Lureau
Hi On Sun, Sep 12, 2021 at 4:53 PM Volker Rümelin wrote: > One of the two FIFO implementations QEMUFIFO and Fifo8 is > redundant. Replace QEMUFIFO with Fifo8. > > Signed-off-by: Volker Rümelin > --- > ui/console.c | 86 > 1 file changed, 20

[PULL 0/9] tcg patch queue

2021-09-12 Thread Richard Henderson
021-09-11 14:00:39 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210912 for you to fetch changes up to 267a3ec3e2a8fb3e06a9d46d09fcfc57dfefd118: tcg/arm: Fix tcg_out_vec_op function signature (2021-09-12

[PULL 1/9] accel/tcg: Add DisasContextBase argument to translator_ld*

2021-09-12 Thread Richard Henderson
From: Ilya Leoshkevich Signed-off-by: Ilya Leoshkevich [rth: Split out of a larger patch.] Signed-off-by: Richard Henderson --- include/exec/translator.h | 9 + target/arm/arm_ldst.h | 12 ++-- target/alpha/translate.c | 2

[PULL 3/9] tcg/i386: Split P_VEXW from P_REXW

2021-09-12 Thread Richard Henderson
We need to be able to represent VEX.W on a 32-bit host, where REX.W will always be zero. Fixes the encoding for VPSLLVQ and VPSRLVQ. Fixes: a2ce146a068 ("tcg/i386: Support vector variable shift opcodes") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/385 Signed-off-by: Richard Henderson

[PULL 6/9] include/qemu: Use builtins for bswap

2021-09-12 Thread Richard Henderson
All supported compilers have builtins for this. Drop all of the complicated system detection stuff. Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210708181743.750220-1-richard.hender...@linaro.org> Signed-off-by: Richard Henderson --- meson.build | 6 - include/qemu/bswap.h |

[PULL 4/9] accel/tcg: remove redundant TCG_KICK_PERIOD define

2021-09-12 Thread Richard Henderson
From: Luc Michel The TCG_KICK_PERIOD macro is already defined in tcg-accel-ops-rr.h. Remove it from tcg-accel-ops-rr.c. Signed-off-by: Luc Michel Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210811141229.12470-1-lmic...@kalray.eu> Signed-off-by: Richard He

[PULL 9/9] tcg/arm: Fix tcg_out_vec_op function signature

2021-09-12 Thread Richard Henderson
From: "Jose R. Ziviani" Commit 5e8892db93 fixed several function signatures but tcg_out_vec_op for arm is missing. It causes a build error on armv6 and armv7: tcg-target.c.inc:2718:42: error: argument 5 of type 'const TCGArg *' {aka 'const unsigned int *'} declared as a pointer [-Werror=array-pa

[PULL 2/9] accel/tcg: Clear PAGE_WRITE before translation

2021-09-12 Thread Richard Henderson
From: Ilya Leoshkevich translate_insn() implementations fetch instruction bytes piecemeal, which can cause qemu-user to generate inconsistent translations if another thread modifies them concurrently [1]. Fix by making pages containing translated instruction non-writable right before loading ins

[PULL 7/9] tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWIN

2021-09-12 Thread Richard Henderson
If __APPLE__, ensure that _CALL_DARWIN is set, then remove our local TCG_TARGET_CALL_DARWIN. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index e0f4665

[PULL 5/9] tcg: Remove tcg_global_reg_new defines

2021-09-12 Thread Richard Henderson
From: Bin Meng Since commit 1c2adb958fc0 ("tcg: Initialize cpu_env generically"), these tcg_global_reg_new_ macros are not used anywhere. Signed-off-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210816143507.11200-1-bmeng...@gmail.com> Signed-off-by: Richard Henderson --- i

Re: [PATCH 2/3] ui/console: replace kbd_timer with chr_accept_input callback

2021-09-12 Thread Marc-André Lureau
On Sun, Sep 12, 2021 at 5:03 PM Volker Rümelin wrote: > There's a ChardevClass chr_accept_input() callback function that > can replace the write retry timer. > > Signed-off-by: Volker Rümelin > Reviewed-by: Marc-André Lureau --- > ui/console.c | 28 +--- > 1 file chan

[PULL 8/9] tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF

2021-09-12 Thread Richard Henderson
Clang only sets _CALL_ELF for ppc64, and nothing at all to specify the ABI for ppc32. Make a good guess based on other symbols. Reported-by: Brad Smith Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 21 ++--- 1 file changed, 18 insertions(+), 3 deletions(-) di

Re: [PATCH v2 1/9] linux-user: Fix coding style nits in qemu.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:43 AM, Peter Maydell wrote: We're about to move a lot of the code in qemu.h out into different header files; fix the coding style nits first so that checkpatch is happy with the pure code-movement patches. This is mostly block-comment style but also a few whitespace issues. Signed-of

Re: [PATCH 18/20] nubus: add support for slot IRQs

2021-09-12 Thread Philippe Mathieu-Daudé
On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: > Each Nubus slot has an IRQ line that can be used to request service from the > CPU. Connect the IRQs to the Nubus bridge so that they can be wired up using > qdev > gpios accordingly, and introduce a new nubus_set_irq() function that can be > used > b

Re: [PATCH v2 2/9] linux-user: Split strace prototypes into strace.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:43 AM, Peter Maydell wrote: The functions implemented in strace.c are only used in a few files in linux-user; split them out of qemu.h and into a new strace.h header which we include in the places that need it. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- li

Re: [PATCH v2 3/9] linux-user: Split signal-related prototypes into signal-common.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:43 AM, Peter Maydell wrote: Split the signal related prototypes into the existing header file signal-common.h, and include it in those places that now require it. Signed-off-by: Peter Maydell --- v1->v2: use existing signal-common.h instead of new header --- linux-user/qemu.h

Re: [PATCH v2 4/9] linux-user: Split loader-related prototypes into loader.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:44 AM, Peter Maydell wrote: Split guest-binary loader prototypes out into a new header loader.h which we include only where required. Signed-off-by: Peter Maydell --- linux-user/loader.h| 59 ++ linux-user/qemu.h | 40 --

Re: [PATCH v2 5/9] linux-user: Split mmap prototypes into user-mmap.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:44 AM, Peter Maydell wrote: Split out the mmap prototypes into a new header user-mmap.h which we only include where required. Signed-off-by: Peter Maydell --- linux-user/qemu.h | 14 -- linux-user/user-mmap.h | 34 ++ linux

[PATCH 2/2] vhost-user: remove VirtQ notifier restore

2021-09-12 Thread Xueming Li
When vhost-user vdpa client restart, VQ notifier resources become invalid, no need to keep mmap, vdpa client will set VQ notifier after reconnect. Removes VQ notifier restore and related flags. Fixes: 44866521bd6e ("vhost-user: support registering external host notifiers") Cc: tiwei@intel.com

[PATCH 1/2] vhost-user: fix VirtQ notifier cleanup

2021-09-12 Thread Xueming Li
When vhost-user device cleanup and unmmap notifier address, VM cpu thread that writing the notifier failed with accessing invalid address. To avoid this concurrent issue, wait memory flatview update by draining rcu callbacks, then unmap notifiers. Fixes: 44866521bd6e ("vhost-user: support registe

Re: [PATCH v2 6/9] linux-user: Split safe-syscall macro into its own header

2021-09-12 Thread Richard Henderson
On 9/8/21 8:44 AM, Peter Maydell wrote: Split the safe-syscall macro from qemu.h into a new safe-syscall.h. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- linux-user/qemu.h | 135 - linux-user/safe-syscall.h | 154 +

[PATCH 0/2] Improve vhost-user VQ notifier unmap

2021-09-12 Thread Xueming Li
When vDPA applicaiton in client mode shutdown, unmapped VQ notifier might being accessed by VM thread under hight tx traffic, it will crash VM in rare conditon. This patch try to fix it with better RCU sychronization of new flatview. Xueming Li (2): vhost-user: fix VirtQ notifier cleanup vhost

Re: [PATCH v2 7/9] linux-user: Split linux-user internals out of qemu.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:44 AM, Peter Maydell wrote: qemu.h is included in various non-linux-user files (which mostly want the TaskState struct and the functions for doing usermode access to guest addresses like lock_user(), unlock_user(), get_user*(), etc). Split out the parts that are only used in linux-us

Re: [PATCH 3/3] ui/console: remove chardev frontend connected test

2021-09-12 Thread Marc-André Lureau
On Sun, Sep 12, 2021 at 4:53 PM Volker Rümelin wrote: > The test if the chardev frontend is connected in > kbd_put_keysym_console() is redundant, because the call > to qemu_chr_be_can_write() in kbd_send_chars() tests > the connected condition again. > > Remove the redundant test whether the char

Re: [PATCH v2 8/9] linux-user: Don't include gdbstub.h in qemu.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:44 AM, Peter Maydell wrote: Currently the linux-user qemu.h pulls in gdbstub.h. There's no real reason why it should do this; include it directly from the C files which require it, and drop the include line in qemu.h. (Note that several of the C files previously relying on this indir

Re: [PATCH v2 9/9] linux-user: Drop unneeded includes from qemu.h

2021-09-12 Thread Richard Henderson
On 9/8/21 8:44 AM, Peter Maydell wrote: Trim down the #includes in qemu.h where we can, either by dropping unneeded headers or by moving them to user-internals.h. This includes deleting a couple of #includes that appear at weird points midway through the header file. Signed-off-by: Peter Maydel

Re: [PATCH 03/20] nubus-device: add device slot parameter

2021-09-12 Thread Mark Cave-Ayland
On 12/09/2021 16:15, Philippe Mathieu-Daudé wrote: On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: This prepares for allowing Nubus devices to be placed in a specific slot instead of always being auto-allocated by the bus itself. Signed-off-by: Mark Cave-Ayland --- hw/nubus/nubus-device.c | 6

Re: [PATCH 07/20] nubus: add trace-events for unassigned slot accesses

2021-09-12 Thread Mark Cave-Ayland
On 12/09/2021 16:18, Philippe Mathieu-Daudé wrote: On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: These allow tracing of the Nubus enumeration process by the guest OS. Signed-off-by: Mark Cave-Ayland --- hw/nubus/nubus-bus.c | 10 +++--- hw/nubus/trace-events | 7 +++ hw/nubus/trac

Re: [PATCH 00/20] nubus: bus, device, bridge, IRQ and address space improvements

2021-09-12 Thread Mark Cave-Ayland
On 12/09/2021 16:47, Philippe Mathieu-Daudé wrote: On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: This patchset is the next set of changes required to boot MacOS on the q800 machine. The main aim of these patches is to improve the Nubus support so that devices can be plugged into the Nubus from

Re: [PATCH 18/20] nubus: add support for slot IRQs

2021-09-12 Thread Mark Cave-Ayland
On 12/09/2021 17:00, Philippe Mathieu-Daudé wrote: On 9/12/21 9:49 AM, Mark Cave-Ayland wrote: Each Nubus slot has an IRQ line that can be used to request service from the CPU. Connect the IRQs to the Nubus bridge so that they can be wired up using qdev gpios accordingly, and introduce a new n

Re: [PATCH 02/20] nubus-device: expose separate super slot memory region

2021-09-12 Thread Mark Cave-Ayland
On 12/09/2021 16:50, Philippe Mathieu-Daudé wrote: On 9/12/21 9:48 AM, Mark Cave-Ayland wrote: According to "Designing Cards and Drivers for the Macintosh Family" each physical nubus slot can access 2 separate address ranges: a super slot memory region which is 256MB and a standard slot memor

[PATCH v4 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass

2021-09-12 Thread Philippe Mathieu-Daudé
Missing review: - 0001-accel-tcg-Restrict-cpu_handle_halt-to-sysemu.patch - 0020-target-ppc-Introduce-PowerPCCPUClass-has_work.patch - 0021-target-ppc-Restrict-has_work-handlers-to-sysemu-and-.patch - 0026-target-sparc-Remove-pointless-use-of-CONFIG_TCG-defi.patch Hi, CPU has_work() is a per-acce

[PATCH v4 02/30] hw/core: Restrict cpu_has_work() to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
cpu_has_work() is only called from system emulation code. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core

[PATCH v4 04/30] sysemu: Introduce AccelOpsClass::has_work()

2021-09-12 Thread Philippe Mathieu-Daudé
Introduce an accelerator-specific has_work() handler. Eventually call it from cpu_has_work(). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/accel-ops.h | 5 + softmmu/cpus.c | 3 +++ 2 files changed, 8 insertions(+) diff --git a/include

[PATCH v4 11/30] target/cris: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/cris/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index c2e7483f5bd..b9f30ba58fa 100644 --- a/target/cris/cpu.c ++

[PATCH v4 01/30] accel/tcg: Restrict cpu_handle_halt() to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Commit 372579427a5 ("tcg: enable thread-per-vCPU") added the following comment describing EXCP_HALTED in qemu_tcg_cpu_thread_fn(): case EXCP_HALTED: /* during start-up the vCPU is reset and the thread is * kicked several times. If we don't ensure we go back * to sl

[PATCH v4 03/30] hw/core: Un-inline cpu_has_work()

2021-09-12 Thread Philippe Mathieu-Daudé
We want to make cpu_has_work() per-accelerator. Only declare its prototype and move its definition to softmmu/cpus.c. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 +--- softmmu/cpus.c| 8 2 files changed, 9 insertions(+)

[PATCH v4 07/30] accel/tcg: Implement AccelOpsClass::has_work() as stub

2021-09-12 Thread Philippe Mathieu-Daudé
Add TCG target-specific has_work() handler in TCGCPUOps, and add tcg_cpu_has_work() as AccelOpsClass has_work() implementation. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 4 accel/tcg/tcg-accel-ops.c | 12 2 fi

[PATCH v4 16/30] target/microblaze: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/cpu.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 15db277925f..36e6e540483 100644 ---

[PATCH v4 06/30] accel/whpx: Implement AccelOpsClass::has_work()

2021-09-12 Thread Philippe Mathieu-Daudé
Implement WHPX has_work() handler in AccelOpsClass and remove it from cpu_thread_is_idle() since cpu_has_work() is already called. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- softmmu/cpus.c| 4 +--- target/i386/whpx/whpx-accel-ops.c | 6 ++ 2

[PATCH v4 05/30] accel/kvm: Implement AccelOpsClass::has_work()

2021-09-12 Thread Philippe Mathieu-Daudé
Implement KVM has_work() handler in AccelOpsClass and remove it from cpu_thread_is_idle() since cpu_has_work() is already called. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- accel/kvm/kvm-accel-ops.c | 6 ++ softmmu/cpus.c| 2 +- 2 files changed, 7 i

[PATCH v4 17/30] target/mips: Restrict has_work() handler to sysemu and TCG

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 00e0c55d0e4..3639c03f8ea 100644 --- a/target/mips/cpu.

[PATCH v4 13/30] target/hppa: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index e8edd189bfc..be940ae2246 100644 --- a/target/hppa/cpu.c ++

[PATCH v4 10/30] target/avr: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/avr/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 5d70e34dd54..6d51f91ca2c 100644 --- a/target/avr/cpu.c +++ b/tar

[PATCH v4 08/30] target/alpha: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 93e16a2ffb4..1ca601cac5b 100644 --- a/target/alpha/cpu.

[PATCH v4 24/30] target/s390x: Restrict has_work() handler to sysemu and TCG

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 7b7b05f1d3a..df8ade9021d 100644 --- a/target/s390x/

[PATCH v4 14/30] target/i386: Restrict has_work() handler to sysemu and TCG

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.c | 6 -- target/i386/tcg/tcg-cpu.c | 8 +++- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 04

[PATCH v4 19/30] target/openrisc: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/openrisc/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 27cb04152f9..3c368a1bde7 100644 --- a/target/o

[PATCH v4 09/30] target/arm: Restrict has_work() handler to sysemu and TCG

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index ba0741b20e4..e11aa625a5f 100644 --- a/target/arm/cpu.

[PATCH v4 15/30] target/m68k: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 66d22d11895..ad5d26b5c9e 100644 --- a/target/m68k/cpu.c ++

[PATCH v4 22/30] target/riscv: Restrict has_work() handler to sysemu and TCG

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to TCG sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 13575c14085..abb555a8bdb 100644 --- a/target/r

[PATCH v4 12/30] target/hexagon: Remove unused has_work() handler

2021-09-12 Thread Philippe Mathieu-Daudé
has_work() is sysemu specific, and Hexagon target only provides a linux-user implementation. Remove the unused hexagon_cpu_has_work(). Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/hexagon/cpu.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/he

[PATCH v4 18/30] target/nios2: Restrict has_work() handler to sysemu

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/nios2/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 947bb09bc1e..9938d7c2919 100644 --- a/target/nios2/cpu.

[PATCH v4 21/30] target/ppc: Restrict has_work() handlers to sysemu and TCG

2021-09-12 Thread Philippe Mathieu-Daudé
Restrict PowerPCCPUClass::has_work() and ppc_cpu_has_work() - SysemuCPUOps::has_work() implementation - to TCG sysemu. Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/cpu-qom.h | 4 +++- target/ppc/cpu_init.c | 24 ++-- 2 files changed, 21 insertions(+), 7 deletions(-)

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