On Mon, Sep 6, 2021 at 4:49 PM Ruinland ChuanTzu Tsai
wrote:
>
>
> Hi Alistair,
>
> Thanks for the heads up about the upcoming unification of RISC-V 32/64
> targets.
> Yet I have several concerns and would like to have some brainstorming
> regarding
> such topics - -
No worries, I'm happy to di
Hi Alistair,
So glad to hear from you.
On Mon, Sep 06, 2021 at 05:05:16PM +1000, Alistair Francis wrote:
> On Mon, Sep 6, 2021 at 4:49 PM Ruinland ChuanTzu Tsai
> wrote:
> >
> >
> > Hi Alistair,
> >
> > Thanks for the heads up about the upcoming unification of RISC-V 32/64
> > targets.
> > Yet
On Mon, Sep 6, 2021 at 5:37 PM Ruinland ChuanTzu Tsai
wrote:
>
> Hi Alistair,
>
> So glad to hear from you.
>
> On Mon, Sep 06, 2021 at 05:05:16PM +1000, Alistair Francis wrote:
> > On Mon, Sep 6, 2021 at 4:49 PM Ruinland ChuanTzu Tsai
> > wrote:
> > >
> > >
> > > Hi Alistair,
> > >
> > > Thanks
On Fri, 3 Sep 2021 12:03:06 -0400
Peter Xu wrote:
> On Fri, Sep 03, 2021 at 03:00:05PM +0200, Igor Mammedov wrote:
> > PS:
> > Another, albeit machine depended approach to resolve IOMMU ordering problem
> > can be adding to a specific machine pre_plug hook, an IOMMU handling.
> > Which is called
On Sun, Sep 05, 2021 at 01:47:48PM +, Alexander von Gluck IV wrote:
> Could someone explain to me what virtio "transitional devices" are?
>
> https://docs.oasis-open.org/virtio/virtio/v1.1/cs01/virtio-v1.1-cs01.html#x1-1020002
>
> Are "Transitional devices" pre-1.0 specification?
virtio devi
On 9/5/21 8:55 PM, p...@fb.com wrote:
> From: Peter Delevoryas
>
> This adds a new machine type "fuji-bmc" based on the following device tree:
>
> https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/aspeed-bmc-facebook-fuji.dts
Sorry for being picky, but 'master' is a branch, not a
Hi,
On 8/25/21 6:23 AM, Jason Wang wrote:
> On Tue, Aug 24, 2021 at 11:50 PM Peter Xu wrote:
>> On Tue, Aug 24, 2021 at 10:52:24AM +0800, Jason Wang wrote:
>>> It looks to me this doesn't solve the issue of using virtio-mmio with vhost?
>> No IOMMU supported for any of the MMIO devices, right? O
On 9/6/21 6:55 AM, Gerd Hoffmann wrote:
> Without this the struct has the wrong size: sizeof() evaluates
> to 16 instead of 13. In most cases the bug is hidden by the
> fact that guests submits a buffer which is exactly 13 bytes
> long, so the padding added by the compiler is simply ignored.
>
>
On Mon, 6 Sept 2021 at 03:47, Duo jia wrote:
>
> Thank you for your explanation.
>
>> And finishing the execution of the interrupt routine will automatically
>> allow a pending second interrupt to be taken immediately
>
>
> I think this is a hardware feature. But how to achieve it with qemu
That
We are adding a new unit test to cover the acpi hotplug support for
multi-function bridges in q35 machines. This support was introduced with the
following commit:
d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction bridges")
The test uses a new table DSDT.multi-bridge. We need t
Hi Igor/Michael :
Added a unit test to exercize the following commit :
d7346e614f4ec353 ("acpi: x86: pcihp: add support hotplug on multifunction
bridges")
I had sent just the unit test earlier but since the review is getting delayed,
I thought of sending
the whole patch set which can be now re
On Sat, 4 Sept 2021 at 22:36, Michael S. Tsirkin wrote:
>
> The following changes since commit 8880cc4362fde4ecdac0b2092318893118206fcf:
>
> Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20210902'
> into staging (2021-09-03 08:27:38 +0100)
>
> are available in the Git reposito
commit d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction
bridges")
added ACPI hotplug descriptions for cold plugged bridges for functions other
than 0. For all other devices, the ACPI hotplug descriptions are limited to
function 0 only. This change adds unit tests for this fea
change 7feffbbf45 ("tests/acpi/pcihp: add unit tests for hotplug on
multifunction bridges for q35")
adds a new unit test to exercize multifunction bridge support in ACPI for q35.
This change adds the ACPI DSDT table blob for this unit test. The changes that
this unit test brings to the DSDT table
On 03/09/2021 18.49, Peter Maydell wrote:
On Fri, 3 Sept 2021 at 17:37, Alex Bennée wrote:
Thomas Huth writes:
On 03/09/2021 15.22, Peter Maydell wrote:
This provokes a new warning from meson on a linux-static build:
Run-time dependency appleframeworks found: NO (tried framework)
Library rt
Hi Ani,
On 9/4/21 11:36 PM, Michael S. Tsirkin wrote:
> From: Ani Sinha
>
> Currently various acpi hotplug modules like cpu hotplug, memory hotplug, pci
> hotplug, nvdimm hotplug are all pulled in when CONFIG_ACPI_X86 is turned on.
> This brings in support for whole lot of subsystems that some t
On 03/09/2021 17.55, David Hildenbrand wrote:
Right now we could set an 8-bit storage key via SSKE and retrieve it
again via ISKE, which is against the architecture description:
SSKE:
"
The new seven-bit storage-key value, or selected bits
thereof, is obtained from bit positions 56-62 of gen-
er
On 03/09/2021 17.55, David Hildenbrand wrote:
For RRBE, SSKE, and ISKE, we're dealing with real addresses, so we have to
convert to an absolute address first.
In the future, when adding EDAT1 support, we'll have to pay attention to
SSKE handling, as we'll be dealing with absolute addresses when
On Mon, 6 Sep 2021, Philippe Mathieu-Daudé wrote:
> Hi Ani,
>
> On 9/4/21 11:36 PM, Michael S. Tsirkin wrote:
> > From: Ani Sinha
> >
> > Currently various acpi hotplug modules like cpu hotplug, memory hotplug, pci
> > hotplug, nvdimm hotplug are all pulled in when CONFIG_ACPI_X86 is turned on.
On 03/09/2021 17.55, David Hildenbrand wrote:
... and make it return a bool instead.
Signed-off-by: David Hildenbrand
---
hw/s390x/s390-skeys-kvm.c | 4 ++--
hw/s390x/s390-skeys.c | 12 ++--
include/hw/s390x/storage-keys.h | 2 +-
3 files changed, 9 insertions(+),
On 03/09/2021 17.55, David Hildenbrand wrote:
Let's replace the ram_size check by a proper physical address space
check (for example, to prepare for memory hotplug), trigger addressing
exceptions and trace the return value of the storage key getter/setter.
Provide an helper mmu_absolute_addr_val
On 03/09/2021 17.55, David Hildenbrand wrote:
Let's validate the given address and report a proper error in case it's
not. All call paths now properly check the validity of the given GFN.
Remove the TODO.
The errors inside the getter and setter should only trigger if something
really goes wrong
On 03/09/2021 17.55, David Hildenbrand wrote:
Let's enable storage keys lazily under TCG, just as we do under KVM.
Only fairly old Linux versions actually make use of storage keys, so it
can be kind of wasteful to allocate quite some memory and track
changes and references if nobody cares.
We ha
On 9/6/21 12:03 PM, Ani Sinha wrote:
> On Mon, 6 Sep 2021, Philippe Mathieu-Daudé wrote:
>> On 9/4/21 11:36 PM, Michael S. Tsirkin wrote:
>>> From: Ani Sinha
>>>
>>> Currently various acpi hotplug modules like cpu hotplug, memory hotplug, pci
>>> hotplug, nvdimm hotplug are all pulled in when CONF
Reported-by: Stefano Garzarella
Suggested-by: Stefan Hajnoczi
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/virtio/virtio.h | 7 +++
hw/virtio/virtio.c | 1 +
2 files changed, 8 insertions(+)
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index 8bab9cfb
vring_get_region_caches() must be called with the RCU read lock
acquired. virtqueue_packed_drop_all() does not, and uses the
'caches' pointer. Fix that by using the RCU_READ_LOCK_GUARD()
macro.
Reported-by: Stefano Garzarella
Signed-off-by: Philippe Mathieu-Daudé
---
hw/virtio/virtio.c | 2 ++
Both virtqueue_packed_get_avail_bytes() and
virtqueue_split_get_avail_bytes() access the region cache, but
their caller also does. Simplify by having virtqueue_get_avail_bytes
calling both with RCU lock held, and passing the caches as argument.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/virtio
Hi,
This series contains few patches I gathered while tooking notes
trying to understand issues #300-#302.
Since v2:
- Rebased on top of 88afdc92b64 ("Merge 'remotes/mst/tags/for_upstream' into
staging")
Since v1:
- Added virtqueue_flush comment (Stefano)
- Call RCU_READ_LOCK_GUARD in virtqueue
On Mon, Sep 6, 2021 at 3:54 PM Philippe Mathieu-Daudé wrote:
>
> On 9/6/21 12:03 PM, Ani Sinha wrote:
> > On Mon, 6 Sep 2021, Philippe Mathieu-Daudé wrote:
> >> On 9/4/21 11:36 PM, Michael S. Tsirkin wrote:
> >>> From: Ani Sinha
> >>>
> >>> Currently various acpi hotplug modules like cpu hotplug,
Hi Peter!
The following changes since commit 31ebff513fad11f315377f6b07447169be8d9f86:
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-03' into
staging (2021-09-04 19:21:19 +0100)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull-reque
03.09.2021 19:04, Marc-André Lureau wrote:
[qemu-sockets.c unix path copy fix]
Daniel or Michael, or someone else queued this already?
Nope, at least not me. I can send a pull request with a
single fix. Is it okay?
/mjt
The GBM library detection does not need to be in the configure script,
since it does not have any user-facing options (there are no
--enable-gbm or --disable-gbm switches). Let's move it to meson.build
instead, so we don't have to clutter config-host.mak with the related
switches.
Additionally, on
On 9/6/21 1:25 PM, Michael Tokarev wrote:
> 03.09.2021 19:04, Marc-André Lureau wrote:
> [qemu-sockets.c unix path copy fix]
>
>> Daniel or Michael, or someone else queued this already?
>
> Nope, at least not me. I can send a pull request with a
> single fix. Is it okay?
Certainly, but you could
On Mon, 6 Sept 2021 at 12:30, Thomas Huth wrote:
>
> The GBM library detection does not need to be in the configure script,
> since it does not have any user-facing options (there are no
> --enable-gbm or --disable-gbm switches). Let's move it to meson.build
> instead, so we don't have to clutter
06.09.2021 14:34, Philippe Mathieu-Daudé wrote:
Certainly, but you could also pick the latest patches
sent to qemu-trivial@ already reviewed ;)
I haven't done this in years..
On 8/17/21 11:54 AM, Marc-André Lureau wrote:
> On Tue, Aug 17, 2021 at 12:56 PM Michal Privoznik
> wrote:
>
>> If a chardev has a logfile the file is opened using
>> qemu_open_old() which does the job, but since @errp is not
>> propagated into qemu_open_internal() we lose much more accurate
>> e
On Sat, 4 Sep 2021 15:57:52 -0400
"Michael S. Tsirkin" wrote:
> On Fri, Sep 03, 2021 at 09:12:21AM +0200, Igor Mammedov wrote:
> > On Thu, 2 Sep 2021 14:56:00 +0200
> > Eric Auger wrote:
> >
> > > Hi Igor,
> > >
> > > On 7/8/21 5:45 PM, Igor Mammedov wrote:
> > > > Patch introduces acpi_in
On Fri, 3 Sep 2021 09:22:10 +0200
Eric Auger wrote:
> Hi Igor,
>
> On 9/3/21 9:12 AM, Igor Mammedov wrote:
> > On Thu, 2 Sep 2021 14:56:00 +0200
> > Eric Auger wrote:
> >
> >> Hi Igor,
> >>
> >> On 7/8/21 5:45 PM, Igor Mammedov wrote:
> >>> Patch introduces acpi_init_table()/acpi_table_com
It's been a requirement that at least one function pointer for read
and one for write are provided ever since the MemoryRegion APIs were
introduced in 2012.
Signed-off-by: Bin Meng
---
docs/devel/memory.rst | 5 +
1 file changed, 5 insertions(+)
diff --git a/docs/devel/memory.rst b/docs/de
On 06.09.21 14:20, Bin Meng wrote:
It's been a requirement that at least one function pointer for read
and one for write are provided ever since the MemoryRegion APIs were
introduced in 2012.
Signed-off-by: Bin Meng
---
docs/devel/memory.rst | 5 +
1 file changed, 5 insertions(+)
diff
This series generates the ACPI DBG2 table along with machvirt.
It applies on top of Igor's
[PATCH v2 00/35] acpi: refactor error prone build_header() and
packed structures usage in ACPI tables
The DBG2 specification can be found at
https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/
Add placeholders for DBG2 reference table for
virt tests and ignore this later for the time being.
Signed-off-by: Eric Auger
---
tests/data/acpi/virt/DBG2 | 0
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
2 files changed, 1 insertion(+)
create mode 100644 tests/data/acpi
Add the DBG2 table generated with
tests/data/acpi/rebuild-expected-aml.sh
Signed-off-by: Eric Auger
---
Tested by comparing the content with the table generated
by EDK2 along with the SBSA-REF machine (code generated by
DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c).
I reuse
ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
this latter allows to describe one or more debug ports.
Generate an DBG2 table featuring a single debug port, the PL011.
The DBG2 specification can be found at:
https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-
On 9/4/21 8:49 AM, Markus Armbruster wrote:
David Gibson writes:
On Wed, Sep 01, 2021 at 03:19:26PM +0200, Markus Armbruster wrote:
Daniel Henrique Barboza writes:
At this moment we only provide one event to report a hotunplug error,
MEM_UNPLUG_ERROR. As of Linux kernel 5.12 and QEMU 6.
On Fri, 3 Sep 2021 15:45:00 +0200
Eric Auger wrote:
> Hi Igor,
> On 7/8/21 5:46 PM, Igor Mammedov wrote:
> > Drop usage of packed structures and explicit endian conversions
> > when building MADT table for arm/x86 and use endian agnostic
> > build_append_int_noprefix() API to build it.
> >
> > S
Hi Jean,
On 9/3/21 4:32 PM, Jean-Philippe Brucker wrote:
> The ACPI Virtual I/O Translation table (VIOT) table describes I/O
> topology for paravirtual devices. At the moment it describes the
> relation between virtio-iommu devices and their endpoints. Add the
> structure definitions for VIOT.
I
On 06/09/2021 13.37, Peter Maydell wrote:
On Mon, 6 Sept 2021 at 12:30, Thomas Huth wrote:
The GBM library detection does not need to be in the configure script,
since it does not have any user-facing options (there are no
--enable-gbm or --disable-gbm switches). Let's move it to meson.build
i
Hi
On Mon, Sep 6, 2021 at 4:49 PM Thomas Huth wrote:
> On 06/09/2021 13.37, Peter Maydell wrote:
> > On Mon, 6 Sept 2021 at 12:30, Thomas Huth wrote:
> >>
> >> The GBM library detection does not need to be in the configure script,
> >> since it does not have any user-facing options (there are n
Hi Jean,
On 9/3/21 4:32 PM, Jean-Philippe Brucker wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI Range nodes f
On 9/6/21 2:20 PM, Bin Meng wrote:
> It's been a requirement that at least one function pointer for read
> and one for write are provided ever since the MemoryRegion APIs were
> introduced in 2012.
>
> Signed-off-by: Bin Meng
> ---
>
> docs/devel/memory.rst | 5 +
> 1 file changed, 5 insert
From: Sean Christopherson
SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be
realized prior to realizing the vCPUs themselves, which occurs long
before generic devices are parsed and realized. Because of this,
do not allow 'sgx-epc' devices to be instantiated after vCPUS have
bee
From: Lara Lazier
Moved int_ctl into the CPUX86State structure. It removes some
unnecessary stores and loads, and prepares for tracking the vIRQ
state even when it is masked due to vGIF.
Signed-off-by: Lara Lazier
Signed-off-by: Paolo Bonzini
---
slirp| 2 +-
The following changes since commit 31ebff513fad11f315377f6b07447169be8d9f86:
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-03' into
staging (2021-09-04 19:21:19 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for yo
From: Lara Lazier
APM2 requires that VMRUN and VMLOAD canonicalize (sign extend to 63
from 48/57) all base addresses in the segment registers that have been
respectively loaded.
Signed-off-by: Lara Lazier
Message-Id: <20210804113058.45186-1-laramglaz...@gmail.com>
Signed-off-by: Paolo Bonzini
From: Lara Lazier
The APM2 states that if V_IGN_TPR is nonzero, the current
virtual interrupt ignores the (virtual) TPR.
Signed-off-by: Lara Lazier
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/sysemu/svm_helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/i386/tcg/sys
From: Yang Zhong
Add the new 'memory-backend-epc' user creatable QOM object in
the ObjectOptions to support SGX since v6.1, or the sgx backend
object cannot bootup.
Signed-off-by: Yang Zhong
v1-->v2:
- Added the new MemoryBackendEpcProperties and related documents,
and updated the blur
From: Lara Lazier
VGIF allows STGI and CLGI to execute in guest mode and control virtual
interrupts in guest mode.
When the VGIF feature is enabled then:
* executing STGI in the guest sets bit 9 of the VMCB offset 60h.
* executing CLGI in the guest clears bit 9 of the VMCB offset 60h.
Signed-o
From: Lara Lazier
VGIF provides masking capability for when virtual interrupts
are taken. (APM2)
Signed-off-by: Lara Lazier
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 7 +--
target/i386/cpu.h | 2 ++
target/i386/tcg/sysemu/svm_helper.c | 12
From: Thomas Huth
The GBM library detection does not need to be in the configure script,
since it does not have any user-facing options (there are no
--enable-gbm or --disable-gbm switches). Let's move it to meson.build
instead, so we don't have to clutter config-host.mak with the related
switche
From: Sean Christopherson
Expose SGX to the guest if and only if KVM is enabled and supports
virtualization of SGX. While the majority of ENCLS can be emulated to
some degree, because SGX uses a hardware-based root of trust, the
attestation aspects of SGX cannot be emulated in software, i.e.
ult
From: Lara Lazier
The feature allows the VMSAVE and VMLOAD instructions to execute in guest mode
without
causing a VMEXIT. (APM2 15.33.1)
Signed-off-by: Lara Lazier
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h| 2 ++
target/i386/svm.h| 2 ++
ta
From: Lara Lazier
Writes to cr8 affect v_tpr. This could set or unset an interrupt
request as the priority might have changed.
Signed-off-by: Lara Lazier
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h| 15 +++
target/i386/tcg/sysemu/misc_helper.c | 7 +
From: Sean Christopherson
CPUID leaf 12_1_EAX is an Intel-defined feature bits leaf enumerating
the platform's SGX capabilities that may be utilized by an enclave, e.g.
whether or not an enclave can gain access to the provision key.
Currently there are six capabilities:
- INIT: set when the e
From: Sean Christopherson
Add a new RAMBlock flag to denote "protected" memory, i.e. memory that
looks and acts like RAM but is inaccessible via normal mechanisms,
including DMA. Use the flag to skip protected memory regions when
mapping RAM for DMA in VFIO.
Signed-off-by: Sean Christopherson
From: Sean Christopherson
EPC (Enclave Page Cahe) is a specialized type of memory used by Intel
SGX (Software Guard Extensions). The SDM desribes EPC as:
The Enclave Page Cache (EPC) is the secure storage used to store
enclave pages when they are a part of an executing enclave. For an
From: Sean Christopherson
SGX capabilities are enumerated through CPUID_0x12.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-16-yang.zh...@intel.com>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 5 +
1 file changed, 5 insertions(+)
From: Sean Christopherson
Because SGX EPC is enumerated through CPUID, EPC "devices" need to be
realized prior to realizing the vCPUs themselves, i.e. long before
generic devices are parsed and realized. From a virtualization
perspective, the CPUID aspect also means that EPC sections cannot be
h
From: Sean Christopherson
SGX adds multiple flags to FEATURE_CONTROL to enable SGX and Flexible
Launch Control.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-12-yang.zh...@intel.com>
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/kvm.c | 5 +
From: Sean Christopherson
CPUID leaf 12_0_EAX is an Intel-defined feature bits leaf enumerating
the CPU's SGX capabilities, e.g. supported SGX instruction sets.
Currently there are four enumerated capabilities:
- SGX1 instruction set, i.e. "base" SGX
- SGX2 instruction set for dynamic EP
From: Sean Christopherson
Enable SGX EPC virtualization, which is currently only support by KVM.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-21-yang.zh...@intel.com>
Signed-off-by: Paolo Bonzini
---
hw/i386/pc_q35.c | 3 +++
1 file changed,
From: Sean Christopherson
If the guest want to fully use SGX, the guest needs to be able to
access provisioning key. Add a new KVM_CAP_SGX_ATTRIBUTE to KVM to
support provisioning key to KVM guests.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-
From: Sean Christopherson
Add CPUID defines for SGX and SGX Launch Control (LC), as well as
defines for their associated FEATURE_CONTROL MSR bits. Define the
Launch Enclave Public Key Hash MSRs (LE Hash MSRs), which exist
when SGX LC is present (in CPUID), and are writable when SGX LC is
enabled
From: Sean Christopherson
The SGX sub-leafs are enumerated at CPUID 0x12. Indices 0 and 1 are
always present when SGX is supported, and enumerate SGX features and
capabilities. Indices >=2 are directly correlated with the platform's
EPC sections. Because the number of EPC sections is dynamic a
From: Yang Zhong
If qemu cmdline set the prealloc property for sgx epc and VM do the
reset the prealloc property will be different with cmdline settings.
This patch can make sure same prealloc property setting with cmdline.
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-26-yang.zh.
From: Sean Christopherson
Request SGX an SGX Launch Control to be enabled in FEATURE_CONTROL
when the features are exposed to the guest. Our design is the SGX
Launch Control bit will be unconditionally set in FEATURE_CONTROL,
which is unlike host bios.
Signed-off-by: Sean Christopherson
Signed-
From: Yang Zhong
Add new CONFIG_SGX for sgx support in the Qemu, and the Kconfig
default enable sgx in the i386 platform.
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-32-yang.zh...@intel.com>
Signed-off-by: Paolo Bonzini
---
backends/meson.build | 2 +-
con
From: Sean Christopherson
CPUID leaf 12_0_EBX is an Intel-defined feature bits leaf enumerating
the platform's SGX extended capabilities. Currently there is a single
capabilitiy:
- EXINFO: record information about #PFs and #GPs in the enclave's SSA
Signed-off-by: Sean Christopherson
Signed
From: Sean Christopherson
Add helpers to detect if SGX EPC exists above 4g, and if so, where SGX
EPC above 4g ends. Use the helpers to adjust the device memory range
if SGX EPC exists above 4g.
For multiple virtual EPC sections, we just put them together physically
contiguous for the simplicity
From: Sean Christopherson
Note that SGX EPC is currently guaranteed to reside in a single
contiguous chunk of memory regardless of the number of EPC sections.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-19-yang.zh...@intel.com>
Signed-off-by:
From: Sean Christopherson
On real hardware, on systems that supports SGX Launch Control, those
MSRs are initialized to digest of Intel's signing key; on systems that
don't support SGX Launch Control, those MSRs are not available but
hardware always uses digest of Intel's signing key in EINIT.
KV
From: Sean Christopherson
Enable SGX EPC virtualization, which is currently only support by KVM.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-22-yang.zh...@intel.com>
Signed-off-by: Paolo Bonzini
---
hw/i386/pc_piix.c | 4
1 file changed
> On Sep 6, 2021, at 2:15 AM, Philippe Mathieu-Daudé wrote:
>
> On 9/5/21 8:55 PM, p...@fb.com wrote:
>> From: Peter Delevoryas
>>
>> This adds a new machine type "fuji-bmc" based on the following device tree:
>>
>> https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/aspeed-bmc-fa
From: Yang Zhong
Add the sgx_memory_backend_reset() interface to handle EPC backend
reset when VM is reset. This reset function will destroy previous
backend memory region and re-mmap the EPC section for guest.
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-23-yang.zh...@intel.com>
From: Sean Christopherson
The ACPI Device entry for SGX EPC is essentially a hack whose primary
purpose is to provide software with a way to autoprobe SGX support,
e.g. to allow software to implement SGX support as a driver. Details
on the individual EPC sections are not enumerated through ACPI
From: Sean Christopherson
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
Message-Id: <20210719112136.57018-34-yang.zh...@intel.com>
Signed-off-by: Paolo Bonzini
---
docs/intel-sgx.txt | 167 +
1 file changed, 167 insertions(+)
create
From: Yang Zhong
If the VM is reset, we need make sure sgx virt epc in clean status.
Once the VM is reset, and sgx epc virt device will be reseted by
reset callback registered by qemu_register_reset(). Since this epc
virt device depend on backend, this reset will call backend reset
interface to r
Hi,
the monitor patches did not pass the test-hmp qtest, and also they
should be in target/i386/monitor.c (see other commands that were
implemented there for SEV). However, I've sent a pull request with
the rest.
Thanks,
Paolo
On Mon, Jul 19, 2021 at 1:27 PM Yang Zhong wrote:
>
> Since Sean C
From: Yang Zhong
Since bios do the reset when qemu boot up, and sgx epc will be
reset by the registered reset callback function. Like this, the
sgx epc will do two times initialization. This patch will check
protected mode from cr0 register, and will bypass reset operation
from bios. The reset ca
From: Peter Delevoryas
UART5 is typically used as the default debug UART on the AST2600, but
UART1 is also designed to be a debug UART. All the AST2600 UART's have
semi-configurable clock rates through registers in the System Control
Unit (SCU), but only UART5 works out of the box with zero-initi
From: Yang Zhong
Since there is no fill_device_info() callback support, and when we
execute "info memory-devices" command in the monitor, the segfault
will be found.
This patch will add this callback support and "info memory-devices"
will show sgx epc memory exposed to guest. The result as below
From: Peter Delevoryas
After fixing some commit log issues in another patch:
https://lore.kernel.org/qemu-devel/2f2f44c6-4817-4d58-a7a0-496446ac7...@fb.com/
I noticed that I had similar issues in another patch I submitted:
https://lore.kernel.org/qemu-devel/20210831142502.279485-1-p...@fb.com/
In the vhost-user-blk-test, as of now there is nothing stoping
vhost-user-blk in QEMU writing to the socket right after forking off the
storage daemon before it has a chance to come up properly, leaving the
test hanging forever. This intermittently hanging test has caused QEMU
automation failures r
From: Peter Delevoryas
This adds a new machine type "fuji-bmc" based on the following device tree:
https://github.com/torvalds/linux/blob/40cb6373b46/arch/arm/boot/dts/aspeed-bmc-facebook-fuji.dts
Most of the i2c devices are not there, they're added here:
https://github.com/facebook/openbmc/bl
On 06/09/2021 15.10, Paolo Bonzini wrote:
From: Thomas Huth
The GBM library detection does not need to be in the configure script,
since it does not have any user-facing options (there are no
--enable-gbm or --disable-gbm switches). Let's move it to meson.build
instead, so we don't have to clut
On Mon, 6 Sept 2021 at 12:29, Thomas Huth wrote:
>
> Hi Peter!
>
> The following changes since commit 31ebff513fad11f315377f6b07447169be8d9f86:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-03'
> into staging (2021-09-04 19:21:19 +0100)
>
> are available in the Git re
Ping :-)
Looks like it went into the crack during feature freeze,
should I resend it?
On Tue, Jul 27, 2021 at 04:59:34PM +0200, Stefano Garzarella wrote:
We recently added a new parameter (aio-max-batch) to IOThread.
This series cleans up the code a bit, no functional changes.
Stefano Garzarel
On Mon, 6 Sept 2021 at 14:13, Paolo Bonzini wrote:
>
> The following changes since commit 31ebff513fad11f315377f6b07447169be8d9f86:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-03'
> into staging (2021-09-04 19:21:19 +0100)
>
> are available in the Git repository at:
On 7/27/21 4:59 PM, Stefano Garzarella wrote:
> We recently added a new parameter (aio-max-batch) to IOThread.
> This series cleans up the code a bit, no functional changes.
>
> Stefano Garzarella (2):
> iothread: rename PollParamInfo to IOThreadParamInfo
> iothread: use IOThreadParamInfo in i
On Fri, 25 Jun 2021 16:18:12 +0200
Paolo Bonzini wrote:
> bs->sg is only true for character devices, but block devices can also
> be used with scsi-block and scsi-generic. Unfortunately BLKSECTGET
> returns bytes in an int for /dev/sgN devices, and sectors in a short
> for block devices, so acco
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