David Gibson writes:
> On Thu, Jul 15, 2021 at 03:32:06PM +0200, Markus Armbruster wrote:
>> Commit 2500fb423a "migration: Include migration support for machine
>> check handling" adds this:
>>
>> ret = migrate_add_blocker(spapr->fwnmi_migration_blocker, &local_err);
>> if (ret == -EBUSY
Hello, maintainers,
Could you review this patch series kindly since the legacy LBR patches
have been merged in 5.12 kernel tree?
Thanks!
On Sun, Jun 20, 2021 at 10:42:36AM +0800, Yang, Weijiang wrote:
> The DEFINE_PROP_UINT64_CHECKMASK maro applies certain mask check agaist
> user-supplied prope
On Mon, Jul 19, 2021 at 09:18:07AM +0200, Markus Armbruster wrote:
> David Gibson writes:
>
> > On Thu, Jul 15, 2021 at 03:32:06PM +0200, Markus Armbruster wrote:
> >> Commit 2500fb423a "migration: Include migration support for machine
> >> check handling" adds this:
> >>
> >> ret = migrate_
From: Marc-André Lureau
Hi,
Here is a few fixes I have collected while working on clipboard-related code.
There are some obvious code improvements/fixes, and better handling of release &
unregister to avoid dangling pointers and improve user experience.
Marc-André Lureau (12):
ui/vdagent: fi
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/vdagent.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ui/vdagent.c b/ui/vdagent.c
index f6ef8d1993..5ae5734c81 100644
--- a/ui/vdagent.c
+++ b/ui/vdagent.c
@@ -516,7 +516,7 @@ static void vdagent_chr_recv_cl
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
include/ui/clipboard.h | 9 +
ui/clipboard.c | 15 +++
2 files changed, 24 insertions(+)
diff --git a/include/ui/clipboard.h b/include/ui/clipboard.h
index eb789a285a..e9fcb15c66 100644
--- a/include/ui/c
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/vdagent.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/ui/vdagent.c b/ui/vdagent.c
index 5ae5734c81..bce9f44b7b 100644
--- a/ui/vdagent.c
+++ b/ui/vdagent.c
@@ -782,6 +782,7 @@ static void vdagent_chr_fini(Object *obj)
From: Marc-André Lureau
info is leaked if more than 10 entries
Signed-off-by: Marc-André Lureau
---
include/ui/clipboard.h | 2 ++
ui/vdagent.c | 4 +---
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/ui/clipboard.h b/include/ui/clipboard.h
index b45b984c9f..e
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/vdagent.c | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/ui/vdagent.c b/ui/vdagent.c
index 65c9663e0d..34e1c332ee 100644
--- a/ui/vdagent.c
+++ b/ui/vdagent.c
@@ -345,6 +345,24 @@ stati
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/clipboard.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/ui/clipboard.c b/ui/clipboard.c
index 56c14509fe..a9512f01a7 100644
--- a/ui/clipboard.c
+++ b/ui/clipboard.c
@@ -13,6 +13,15 @@ void qemu_clipboard_peer_regi
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/vdagent.c | 157 +--
1 file changed, 89 insertions(+), 68 deletions(-)
diff --git a/ui/vdagent.c b/ui/vdagent.c
index bce9f44b7b..f716f2d8c3 100644
--- a/ui/vdagent.c
+++ b/ui/vdagen
From: Marc-André Lureau
Rather than hardcoding strings
Signed-off-by: Marc-André Lureau
---
ui/gtk-clipboard.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/ui/gtk-clipboard.c b/ui/gtk-clipboard.c
index bff28d2030..5e817ae55c 100644
--- a/ui/gtk-clipboard.c
+++ b/ui
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/gtk-clipboard.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/ui/gtk-clipboard.c b/ui/gtk-clipboard.c
index 4e4b3c52bb..16b2e2063e 100644
--- a/ui/gtk-clipboard.c
+++ b/ui/gtk-clipboard.c
@@ -144,7 +14
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/vdagent.c | 28 +---
1 file changed, 17 insertions(+), 11 deletions(-)
diff --git a/ui/vdagent.c b/ui/vdagent.c
index f716f2d8c3..65c9663e0d 100644
--- a/ui/vdagent.c
+++ b/ui/vdagent.c
@@ -47,7 +47,6 @@ st
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
ui/gtk-clipboard.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ui/gtk-clipboard.c b/ui/gtk-clipboard.c
index 5e817ae55c..2c78de9500 100644
--- a/ui/gtk-clipboard.c
+++ b/ui/gtk-clipboard.c
@@ -155,7 +155,7 @@ s
While there might have been bigger differnces between the -base and
the -xcode images in the beginning, they almost vanished in the
current builds, e.g. when comparing the output of the "configure"
step after cleaning up the differences due to temporary path names,
I only get:
$ diff -u /tmp/base.
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
include/ui/gtk.h | 1 -
ui/gtk-clipboard.c | 14 ++
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/include/ui/gtk.h b/include/ui/gtk.h
index 9516670ebc..60e9cdc39c 100644
--- a/include/ui/gtk.h
+++ b/inc
On Tue, 13 Jul 2021 23:46:38 +1000
Alexey Kardashevskiy wrote:
> This fixes NEGATIVE_RETURNS, OVERRUN issues reported by the Coverity.
>
> This adds a comment about the return parameters number in the VOF hcall.
> The reason for such counting is to keep the numbers look the same in
> vof_client_
Hi,
iotest 206 fails for me with:
$ ./check -qcow2 206
QEMU -- ".../tests/qemu-iotests/../../qemu-system-x86_64"
-nodefaults -display none -accel qtest
QEMU_IMG -- ".../tests/qemu-iotests/../../qemu-img"
QEMU_IO -- ".../tests/qemu-iotests/../../qemu-io" --cache writeback
On 7/19/21 13:57, David Gibson wrote:
On Tue, Jul 13, 2021 at 11:46:38PM +1000, Alexey Kardashevskiy wrote:
This fixes NEGATIVE_RETURNS, OVERRUN issues reported by the Coverity.
This adds a comment about the return parameters number in the VOF hcall.
The reason for such counting is to keep t
On Wed, Jul 14, 2021 at 08:01:23AM +0200, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Peter noticed that mmio access may read into the NvmeParams member in
> the NvmeCtrl struct.
>
> Fix the bounds check.
>
> Reported-by: Peter Maydell
> Signed-off-by: Klaus Jensen
> ---
> hw/nvme/ctrl.c |
On Mon, Jul 19, 2021 at 08:43:33AM +0200, Klaus Jensen wrote:
> On Jul 14 08:01, Klaus Jensen wrote:
> > From: Klaus Jensen
> >
> > Fix mmio read issues on big-endian hosts. The core issue is that values
> > in the BAR is not stored in little endian as required.
> >
> > Fix that and add a regres
Markus Armbruster writes:
> Cc: QOM maintainers for additional eyes.
>
> Alex Bennée writes:
>
>> While we are at it add a brief preamble that explains some of the
>> common concepts in QEMU's device emulation which will hopefully lead
>> to less confusing about our dizzying command line optio
> -Original Message-
> From: Jason Wang
> Sent: Thursday, July 15, 2021 12:21 PM
> To: Zhang, Chen ; Dr. David Alan Gilbert
> ; Markus Armbruster
> Cc: qemu-dev ; Eric Blake
> ; Daniel P. Berrangé ; Gerd
> Hoffmann ; Li Zhijian ; Lukas
> Straub
> Subject: Re: [PULL V2 3/6] hmp-commands
On Mon, Jul 19, 2021 at 09:30:51AM +0200, Thomas Huth wrote:
> While there might have been bigger differnces between the -base and
> the -xcode images in the beginning, they almost vanished in the
> current builds, e.g. when comparing the output of the "configure"
> step after cleaning up the diffe
No need to carry the flag all the time in many scenarios.
Signed-off-by: Zhang Chen
---
include/qemu/sockets.h | 1 +
util/qemu-sockets.c| 14 ++
2 files changed, 15 insertions(+)
diff --git a/include/qemu/sockets.h b/include/qemu/sockets.h
index 0c34bf2398..3a0f8fa8f2 100644
-
Hi Jason,
Please help to queue COLO-proxy patches to net branch.
Thanks
Chen
The following changes since commit fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210718'
into staging (2021-07-18 13:46:39 +0100)
are available in
Since the real user scenario does not need to monitor all traffic.
Add passthrough-filter-add and passthrough-filter-del to maintain
a network passthrough list in object with network packet processing
function. Add IPFlowSpec struct for all QMP commands.
Most the fields of IPFlowSpec are optional,e
Rename structure with COLO index and move it to .h file,
It make other modules can reuse COLO code.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 132 -
net/colo-compare.h | 86 +
2 files changed, 109 insertions(+), 10
Add hmp_passthrough_filter_add and hmp_passthrough_filter_del make user
can maintain object network passthrough list in human monitor
Signed-off-by: Zhang Chen
---
hmp-commands.hx | 26 ++
include/monitor/hmp.h | 2 ++
monitor/hmp-cmds.c| 63 +++
Add passthrough list for each CompareState.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 28
net/colo-compare.h | 12
2 files changed, 40 insertions(+)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index dcd24bb113..64e72c82f1 100644
--- a/
Use the connection protocol,src port,dst port,src ip,dst ip as the key
to passthrough certain network traffic in object with network packet
processing function.
Signed-off-by: Zhang Chen
---
net/net.c | 199 +-
1 file changed, 197 insertions(+)
17.07.2021 00:25, Eric Blake wrote:
On Wed, Jul 14, 2021 at 07:59:14PM +0300, Vladimir Sementsov-Ogievskiy wrote:
Split out nbd_recv_coroutine_wake(), as it will be used in separate.
s/in separate/separately/
Also add a possibility to wake only first found sleeping coroutine.
Signed-off-by:
On 7/19/21 9:26 AM, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Rather than hardcoding strings
Why not write a full sentence? It is only 3 words saved, and
we could directly understand the comment without having to
look at the subject.
>
> Signed-off-by: Marc-André Lureau
On Wed, 14 Jul 2021 at 07:01, Klaus Jensen wrote:
>
> From: Klaus Jensen
>
> The specification uses a set of 32 bit PMRMSCL and PMRMSCU registers to
> make up the 64 bit logical PMRMSC register.
>
> Make it so.
>
> Signed-off-by: Klaus Jensen
> ---
> include/block/nvme.h | 31 --
On Wed, 14 Jul 2021 at 07:01, Klaus Jensen wrote:
>
> From: Klaus Jensen
>
> Peter noticed that mmio access may read into the NvmeParams member in
> the NvmeCtrl struct.
>
> Fix the bounds check.
>
> Reported-by: Peter Maydell
> Signed-off-by: Klaus Jensen
> ---
> hw/nvme/ctrl.c | 27 +
On Mon, 19 Jul 2021 at 10:10, Zhang Chen wrote:
>
> Hi Jason,
>
> Please help to queue COLO-proxy patches to net branch.
Hi Chen; for this kind of pull request that isn't intended
to go directly into master, could I ask you to follow the notes
in https://wiki.qemu.org/Contribute/SubmitAPullReques
On Sun, Jul 18, 2021 at 02:00:03PM +0100, Peter Maydell wrote:
> On Sun, 18 Jul 2021 at 08:50, Volker Rümelin wrote:
> >
> > Since commit 8eb13bbbac ("ui/gtk: vte: fix sending multiple
> > characeters") it's very easy to lock up QEMU with the gtk ui.
> > If you configure a guest with a serial devi
Mahmoud Mandour writes:
> This manifests itself when associativity degree is greater than the
> number of sets and FIFO is used, otherwise it's also a memory leak
> whenever FIFO was used.
>
> Signed-off-by: Mahmoud Mandour
Reviewed-by: Alex Bennée
> ---
> contrib/plugins/cache.c | 2 +-
>
On Fri, Jul 16, 2021 at 05:23:50PM +0200, Kevin Wolf wrote:
> Am 13.07.2021 um 15:10 hat Stefan Hajnoczi geschrieben:
> > AIO_WAIT_WHILE() requires that AioContext is acquired according to its
> > documentation, but I'm not sure that's true anymore. Thread-safe/atomic
> > primitives are used by AIO
Andrew Jones writes:
> On Fri, Jul 16, 2021 at 02:55:28PM +0200, Vitaly Kuznetsov wrote:
>> For the beginning, just test 'hv-passthrough' and a couple of custom
>> Hyper-V enlightenments configurations through QMP. Later, it would
>> be great to complement this by checking CPUID values from with
On Jul 19 10:13, Peter Maydell wrote:
> On Wed, 14 Jul 2021 at 07:01, Klaus Jensen wrote:
> >
> > From: Klaus Jensen
> >
> > The specification uses a set of 32 bit PMRMSCL and PMRMSCU registers to
> > make up the 64 bit logical PMRMSC register.
> >
> > Make it so.
> >
> > Signed-off-by: Klaus Jen
On 7/18/21 12:18 AM, Richard Henderson wrote:
> Since 0b00b0c1e05b, tb->size must not be zero.
> Advance pc so that the breakpoint covers the insn at the bp.
>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/489
> Signed-off-by: Richard Henderson
> ---
> target/avr/translate.c | 1 +
>
Mahmoud Mandour writes:
> It's not necessary to lock the address translation portion of the
> vcpu_mem_access callback.
>
> Signed-off-by: Mahmoud Mandour
> ---
> contrib/plugins/cache.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/contrib/plugins/cache.c b/contr
Mahmoud Mandour writes:
> Since callbacks may be interleaved because of multithreaded execution,
> we should not make assumptions about `plugin_exit` either. The problem
> with `plugin_exit` is that it frees shared data structures (caches and
> `miss_ht` hash table). It should not be assumed th
On Wed, 14 Jul 2021 at 07:01, Klaus Jensen wrote:
>
> From: Klaus Jensen
>
> The new PMR test unearthed a long-standing issue with MMIO reads on
> big-endian hosts.
>
> Fix this by unconditionally storing all controller registers in little
> endian.
>
> Cc: Gollu Appalanaidu
> Reported-by: Peter
Hi Hiroko,
On 7/19/21 11:34 AM, Hiroko Shimizu wrote:
> Hello,
> I'd like to initialize RAM from a specific file when RAM is created.
> Then, I tried using memory_region_init_ram_from_file().
To load a file after the machine is created and before the VM is started
I use the 'generic loader dev
On Tue, Jul 13, 2021 at 03:51:15PM +0100, Stefan Hajnoczi wrote:
On Wed, Jul 07, 2021 at 05:00:18PM +0200, Stefano Garzarella wrote:
diff --git a/qapi/misc.json b/qapi/misc.json
index 156f98203e..f64bb69f74 100644
--- a/qapi/misc.json
+++ b/qapi/misc.json
@@ -86,6 +86,9 @@
# @poll-shrink: how m
On Mon, 19 Jul 2021, David Gibson wrote:
On Thu, Jul 15, 2021 at 09:29:50AM -0300, matheus.fe...@eldorado.org.br wrote:
From: Matheus Ferst
In commit 8f0a4b6a9, we started to require L=0 for ppc32 to match what
The Programming Environments Manual say:
"For 32-bit implementations, the L field
From: Gerd Hoffmann
Build windows installer for qemu in gitlab CI,
store the result as artifact.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Willian Rampazzo
Reviewed-by: Thomas Huth
Message-Id: <20210623091137.1156959-2-kra...@redhat.com>
Signed-off-by: Thomas Huth
---
.gitlab-ci.d/crossbuil
If a user is trying to compile QEMU with link-time optimization
enabled by running the configure script like this:
.../configure --extra-cflags="-flto"
then the endianess test is failing since the magic values do not
show up in the intermediate object files there. If the host is
a big endian mac
QEMU currently crashes when it's started like this:
cat << EOF | ./qemu-system-i386 -device vmxnet3 -nodefaults -qtest stdio
outl 0xcf8 0x80001014
outl 0xcfc 0xe0001000
outl 0xcf8 0x80001018
outl 0xcf8 0x80001004
outw 0xcfc 0x7
outl 0xcf8 0x80001083
write 0x0 0x1 0xe1
write 0x1 0x1 0xfe
write 0x2
Hi Peter!
The following changes since commit fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210718'
into staging (2021-07-18 13:46:39 +0100)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull
Am 12.07.2021 um 07:38 hat Zhiyong Ye geschrieben:
> When bdrv_set_aio_context_ignore() is called in the main loop to change
> the AioContext onto the IO thread, the bdrv_drain_invoke_entry() never
> gets to run and the IO thread hangs at co_schedule_bh_cb().
>
> This is because the AioContext is
On Sat, 17 Jul 2021 at 23:19, Richard Henderson
wrote:
>
> Having this data in cflags means that hashing takes care
> of selecting a TB with or without exceptions built in.
> Which means that we no longer need to flush all TBs.
>
> This does require that we single-step while we're within a page
>
On Tue, Jul 13, 2021 at 03:58:04PM +0100, Stefan Hajnoczi wrote:
On Wed, Jul 07, 2021 at 05:00:19PM +0200, Stefano Garzarella wrote:
@@ -371,7 +375,7 @@ static int laio_do_submit(int fd, struct qemu_laiocb
*laiocb, off_t offset,
s->io_q.in_queue++;
if (!s->io_q.blocked &&
(!s
QEMU currently crashes when the user tries to do something like:
qemu-system-x86_64 -M x-remote -device piix3-ide
This happens because the "isabus" variable is not initialized with
the x-remote machine yet. Add a proper check for this condition
and propagate the error to the caller, so we can fa
QEMU should never abort just because the guest is doing something odd.
Let's simply log the error and ignore the bad transmit queue instead.
Buglink: https://bugs.launchpad.net/qemu/+bug/1926111
Message-Id: <20210715103755.1035566-1-th...@redhat.com>
Reviewed-by: Richard Henderson
Signed-off-by:
Alias targets have a different name than the alias property itself
(e.g. a machine's pflash0 might be an alias of a property named 'drive').
When the target's getter or setter invokes the visitor, it will use
a different name than what the caller expects, and the visitor will
not be able to find it
Switching -M parsing from QemuOptions and StringInputVisitor to keyval and
QObjectInputVisitor exposed a latent bug in alias properties.
Alias targets have a different name than the alias property itself
(e.g. a machine's pflash0 might be an alias of a property named 'drive').
When the target's get
David Gibson writes:
> On Mon, Jul 19, 2021 at 09:18:07AM +0200, Markus Armbruster wrote:
>> David Gibson writes:
>>
>> > On Thu, Jul 15, 2021 at 03:32:06PM +0200, Markus Armbruster wrote:
>> >> Commit 2500fb423a "migration: Include migration support for machine
>> >> check handling" adds this:
This new adaptor visitor takes a single field of the adaptee, and exposes it
with a different name.
This will be used for QOM alias properties. Alias targets can of course
have a different name than the alias property itself (e.g. a machine's
pflash0 might be an alias of a property named 'drive')
The documentation of the -machine memory-backend has some minor
formatting errors:
* Misindentation of the initial line meant that the whole option
section is incorrectly indented in the HTML output compared to
the other -machine options
* The examples weren't indented, which meant that the
On Mon, Jul 19, 2021 at 11:48 AM Alex Bennée wrote:
>
> Mahmoud Mandour writes:
>
> > Since callbacks may be interleaved because of multithreaded execution,
> > we should not make assumptions about `plugin_exit` either. The problem
> > with `plugin_exit` is that it frees shared data structures (
We appear to use migration blockers in two ways:
(1) Prevent migration for an indefinite time, typically due to use of
some feature that isn't compatible with migration.
(2) Delay migration for a short time.
Option -only-migrate is designed for (1). It interferes with (2).
Example for (1): dev
Mahmoud Mandour writes:
> Multicore L1 cache modelling is introduced and is supported for both
> full system emulation and linux-user.
>
> For full-system emulation, L1 icache and dcache are maintained for each
> available core, since this information is exposed to the plugin through
> `qemu_pl
Ping 2
I'd like to get this bugfix into 6.1.
On 07.07.21 13:02, Dennis Wölfing wrote:
Ping
https://lore.kernel.org/qemu-devel/20210629132410.286813-1-denniswoelf...@gmx.de
On 29.06.21 15:24, Dennis Wölfing wrote:
To handle relative mouse input the event handler needs to move the mouse
away
Mahmoud Mandour writes:
> On Mon, Jul 19, 2021 at 11:48 AM Alex Bennée wrote:
>
> Mahmoud Mandour writes:
>
> > Since callbacks may be interleaved because of multithreaded execution,
> > we should not make assumptions about `plugin_exit` either. The problem
> > with `plugin_exit` is that
Hi Brijesh,
On 10/07/2021 0:55, Brijesh Singh wrote:
> During the SNP guest launch sequence, a special secrets and cpuid page
> needs to be populated by the SEV-SNP firmware. The secrets page contains
> the VM Platform Communication Key (VMPCKs) used by the guest to send and
> receive secure messa
From: Sean Christopherson
Add a new RAMBlock flag to denote "protected" memory, i.e. memory that
looks and acts like RAM but is inaccessible via normal mechanisms,
including DMA. Use the flag to skip protected memory regions when
mapping RAM for DMA in VFIO.
Signed-off-by: Sean Christopherson
From: Sean Christopherson
SGX adds multiple flags to FEATURE_CONTROL to enable SGX and Flexible
Launch Control.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
target/i386/kvm/kvm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/i386/kvm/kvm.c b/target/i386/k
Since Sean Christopherson has left Intel and i am responsible for Qemu SGX
upstream work. His @intel.com address will be bouncing and his new email(
sea...@google.com) is also in CC lists.
This series is Qemu SGX virtualization implementation rebased on latest
Qemu release. The numa support for SG
From: Sean Christopherson
Add CPUID defines for SGX and SGX Launch Control (LC), as well as
defines for their associated FEATURE_CONTROL MSR bits. Define the
Launch Enclave Public Key Hash MSRs (LE Hash MSRs), which exist
when SGX LC is present (in CPUID), and are writable when SGX LC is
enabled
From: Sean Christopherson
The SGX sub-leafs are enumerated at CPUID 0x12. Indices 0 and 1 are
always present when SGX is supported, and enumerate SGX features and
capabilities. Indices >=2 are directly correlated with the platform's
EPC sections. Because the number of EPC sections is dynamic a
From: Sean Christopherson
EPC (Enclave Page Cahe) is a specialized type of memory used by Intel
SGX (Software Guard Extensions). The SDM desribes EPC as:
The Enclave Page Cache (EPC) is the secure storage used to store
enclave pages when they are a part of an executing enclave. For an
From: Sean Christopherson
SGX EPC is enumerated through CPUID, i.e. EPC "devices" need to be
realized prior to realizing the vCPUs themselves, which occurs long
before generic devices are parsed and realized. Because of this,
do not allow 'sgx-epc' devices to be instantiated after vCPUS have
bee
From: Sean Christopherson
Expose SGX to the guest if and only if KVM is enabled and supports
virtualization of SGX. While the majority of ENCLS can be emulated to
some degree, because SGX uses a hardware-based root of trust, the
attestation aspects of SGX cannot be emulated in software, i.e.
ult
Add the new 'memory-backend-epc' user creatable QOM object in
the ObjectOptions to support SGX since v6.1, or the sgx backend
object cannot bootup.
Signed-off-by: Yang Zhong
v1-->v2:
- Added the new MemoryBackendEpcProperties and related documents,
and updated the blurb(Eric Blake).
---
From: Sean Christopherson
Because SGX EPC is enumerated through CPUID, EPC "devices" need to be
realized prior to realizing the vCPUs themselves, i.e. long before
generic devices are parsed and realized. From a virtualization
perspective, the CPUID aspect also means that EPC sections cannot be
h
If the VM is reset, we need make sure sgx virt epc in clean status.
Once the VM is reset, and sgx epc virt device will be reseted by
reset callback registered by qemu_register_reset(). Since this epc
virt device depend on backend, this reset will call backend reset
interface to re-mmap epc to guest
From: Sean Christopherson
The ACPI Device entry for SGX EPC is essentially a hack whose primary
purpose is to provide software with a way to autoprobe SGX support,
e.g. to allow software to implement SGX support as a driver. Details
on the individual EPC sections are not enumerated through ACPI
From: Sean Christopherson
CPUID leaf 12_1_EAX is an Intel-defined feature bits leaf enumerating
the platform's SGX capabilities that may be utilized by an enclave, e.g.
whether or not an enclave can gain access to the provision key.
Currently there are six capabilities:
- INIT: set when the e
From: Sean Christopherson
CPUID leaf 12_0_EAX is an Intel-defined feature bits leaf enumerating
the CPU's SGX capabilities, e.g. supported SGX instruction sets.
Currently there are four enumerated capabilities:
- SGX1 instruction set, i.e. "base" SGX
- SGX2 instruction set for dynamic EP
If qemu cmdline set the prealloc property for sgx epc and VM do the
reset the prealloc property will be different with cmdline settings.
This patch can make sure same prealloc property setting with cmdline.
Signed-off-by: Yang Zhong
---
backends/hostmem-epc.c | 10 ++
1 file changed, 10
Add the sgx_memory_backend_reset() interface to handle EPC backend
reset when VM is reset. This reset function will destroy previous
backend memory region and re-mmap the EPC section for guest.
Signed-off-by: Yang Zhong
---
backends/hostmem-epc.c | 16
include/hw/i386/pc.h |
From: Sean Christopherson
On real hardware, on systems that supports SGX Launch Control, those
MSRs are initialized to digest of Intel's signing key; on systems that
don't support SGX Launch Control, those MSRs are not available but
hardware always uses digest of Intel's signing key in EINIT.
KV
From: Sean Christopherson
CPUID leaf 12_0_EBX is an Intel-defined feature bits leaf enumerating
the platform's SGX extended capabilities. Currently there is a single
capabilitiy:
- EXINFO: record information about #PFs and #GPs in the enclave's SSA
Signed-off-by: Sean Christopherson
Signed
Libvirt can use qmp_query_sgx_capabilities() to get the host
sgx capabilities.
Signed-off-by: Yang Zhong
v1-->v2:
- Changed the blurb error and "Since: 5.1" to "Since: 6.1"(Eric Blake).
---
hw/i386/sgx.c | 66 ++
include/hw/i386/pc.h |
From: Sean Christopherson
If the guest want to fully use SGX, the guest needs to be able to
access provisioning key. Add a new KVM_CAP_SGX_ATTRIBUTE to KVM to
support provisioning key to KVM guests.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
target/i386/cpu.c |
From: Sean Christopherson
SGX capabilities are enumerated through CPUID_0x12.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
target/i386/cpu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6ddeba7461..1f2f6bdf2d 100644
-
Since there is no fill_device_info() callback support, and when we
execute "info memory-devices" command in the monitor, the segfault
will be found.
This patch will add this callback support and "info memory-devices"
will show sgx epc memory exposed to guest. The result as below:
qemu) info memor
From: Sean Christopherson
Note that SGX EPC is currently guaranteed to reside in a single
contiguous chunk of memory regardless of the number of EPC sections.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
hw/i386/pc.c | 4
1 file changed, 4 insertions(+)
diff --git a/
From: Sean Christopherson
Request SGX an SGX Launch Control to be enabled in FEATURE_CONTROL
when the features are exposed to the guest. Our design is the SGX
Launch Control bit will be unconditionally set in FEATURE_CONTROL,
which is unlike host bios.
Signed-off-by: Sean Christopherson
Signed-
Add new CONFIG_SGX for sgx support in the Qemu, and the Kconfig
default enable sgx in the i386 platform.
Signed-off-by: Yang Zhong
---
backends/meson.build | 2 +-
configs/devices/i386-softmmu/default.mak | 1 +
hw/i386/Kconfig | 5 +
hw/i386/m
From: Sean Christopherson
Enable SGX EPC virtualization, which is currently only support by KVM.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
hw/i386/pc_q35.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 04b4a4788d..799c4
From: Sean Christopherson
Add helpers to detect if SGX EPC exists above 4g, and if so, where SGX
EPC above 4g ends. Use the helpers to adjust the device memory range
if SGX EPC exists above 4g.
For multiple virtual EPC sections, we just put them together physically
contiguous for the simplicity
From: Sean Christopherson
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
docs/intel-sgx.txt | 167 +
1 file changed, 167 insertions(+)
create mode 100644 docs/intel-sgx.txt
diff --git a/docs/intel-sgx.txt b/docs/intel-sgx.txt
new
From: Sean Christopherson
Enable SGX EPC virtualization, which is currently only support by KVM.
Signed-off-by: Sean Christopherson
Signed-off-by: Yang Zhong
---
hw/i386/pc_piix.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 30b8bd6ea9..c
This QMP query command can be used by some userspaces to retrieve
the SGX information when SGX is enabled on Intel platform.
Signed-off-by: Yang Zhong
v1-->v2:
- "Since: 5.1" to "Since: 6.1", and grammar error(Eric Blake).
---
monitor/qmp-cmds.c | 6 ++
qapi/misc.json
Since bios do the reset when qemu boot up, and sgx epc will be
reset by the registered reset callback function. Like this, the
sgx epc will do two times initialization. This patch will check
protected mode from cr0 register, and will bypass reset operation
from bios. The reset callback will only ac
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