Re: [RFC PATCH 03/11] hw/intc: Add CLIC device

2021-06-13 Thread Frank Chang
LIU Zhiwei 於 2021年4月9日 週五 下午3:57寫道: > The Core-Local Interrupt Controller (CLIC) provides low-latency, > vectored, pre-emptive interrupts for RISC-V systems. > > The CLIC also supports a new Selective Hardware Vectoring feature > that allow users to optimize each interrupt for either faster > res

[PATCH] esp: fix migration version check in esp_is_version_5()

2021-06-13 Thread Mark Cave-Ayland
Commit 4e78f3bf35 "esp: defer command completion interrupt on incoming data transfers" added a version check for use with VMSTATE_*_TEST macros to allow migration from older QEMU versions. Unfortunately the version check fails to work in its current form since if the VMStateDescription version_id i

Re: [PATCH] esp: store lun coming from the MESSAGE OUT phase

2021-06-13 Thread Mark Cave-Ayland
On 11/06/2021 12:57, Paolo Bonzini wrote: The LUN is selected with an IDENTIFY message, and persists until the next message out phase. Instead of passing it to do_busid_cmd, store it in ESPState. Because do_cmd can simply skip the message out phase if cmdfifo_cdb_offset is zero, it can now be

Re: [PATCH v2] fuzz: Display hexadecimal value with '0x' prefix

2021-06-13 Thread Laurent Vivier
Le 12/06/2021 à 21:58, Philippe Mathieu-Daudé a écrit : > Use memory_region_size() to get the MemoryRegion size, > and display it with the '0x' prefix. > > Signed-off-by: Philippe Mathieu-Daudé > --- > v2: > - Use PRIx64 (lvivier) > - Use memory_region_size() > --- > tests/qtest/fuzz/generic_fuz

Re: [PATCH] virtio-gpu: move scanout_id sanity check

2021-06-13 Thread Li Qiang
Gerd Hoffmann 于2021年6月4日周五 下午3:50写道: > > Checking scanout_id in virtio_gpu_do_set_scanout() is too late, for the > "resource_id == 0" case (aka disable scanout) the scanout_id is used > unchecked. Move the check into the callers to fix that. > > Fixes: e64d4b6a9bc3 ("virtio-gpu: Refactor virtio_g

Re: [PATCH] Fix assertion failure in lsi53c810 emulator

2021-06-13 Thread Qiang Liu
Hi Phil, > You didn't Cc'ed the maintainers of the SCSI subsystem (see > https://wiki.qemu.org/Contribute/SubmitAPatch#CC_the_relevant_maintainer > ) so I'm doing it for you: Thank you! > It seems you didn't send your patch with the proper tool, see > https://wiki.qemu.org/Contribute/SubmitAPatch

Re: tb_flush() calls causing long Windows XP boot times

2021-06-13 Thread Mark Cave-Ayland
On 11/06/2021 19:22, Alex Bennée wrote: (added Gitlab on CC) Paolo Bonzini writes: On 11/06/21 17:01, Programmingkid wrote: Hello Alex, The good news is the source code to Windows XP is available online:https://github.com/cryptoAlgorithm/nt5src It's leaked, so I doubt anybody who's paid t

[PATCH v3 1/2] hw/char: sifive_uart

2021-06-13 Thread Lukas Jünger
Make function names consistent Signed-off-by: Lukas Jünger --- hw/char/sifive_uart.c | 46 ++- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c index fe12666789..5df8212961 100644 --- a/hw/char/s

Re: [PATCH v4 3/8] hw/intc: GICv3 ITS command queue framework

2021-06-13 Thread Eric Auger
Hi Sashi, On 6/2/21 8:00 PM, Shashi Mallela wrote: > Added functionality to trigger ITS command queue processing on > write to CWRITE register and process each command queue entry to > identify the command type and handle commands like MAPD,MAPC,SYNC. > > Signed-off-by: Shashi Mallela > --- > h

[PATCH v3 0/2] QOMify Sifive UART Model

2021-06-13 Thread Lukas Jünger
Hello, I have cleaned up the indentation as requested by Philippe. Also I added reset and migration capabilities as requested by Peter. Thank you for your feedback. I hope this is satisfactory now. Best regards, Lukas Lukas Jünger (2): hw/char: sifive_uart hw/char: sifive_uart include/hw/

[PATCH] block: fix build waring

2021-06-13 Thread Zhiwei Jiang
when i compile this file with some error message ../block.c: In function ‘bdrv_replace_node_common’: ../block.c:4903:9: error: ‘to_cow_parent’ may be used uninitialized in this function [-Werror=maybe-uninitialized] bdrv_remove_filter_or_cow_child(to_cow_parent, tran); ^~~

[Qemu-devel] GSoC Introduction

2021-06-13 Thread Lara Lazier
Hi everyone! My name is Lara, and I am one of this year's GSoC students. I am studying computer science in Zürich, and I will start my master's in September. For my GSoC project, I am working with Paolo Bonzini on fixing and extending the SVM implementation in QEMU. I am very excited to learn man

[PATCH v3 2/2] hw/char: sifive_uart

2021-06-13 Thread Lukas Jünger
QOMify sifive_uart model Signed-off-by: Lukas Jünger --- include/hw/char/sifive_uart.h | 11 ++-- hw/char/sifive_uart.c | 114 +++--- 2 files changed, 109 insertions(+), 16 deletions(-) diff --git a/include/hw/char/sifive_uart.h b/include/hw/char/sifive_uart

Re: [PATCH v4 3/8] hw/intc: GICv3 ITS command queue framework

2021-06-13 Thread Eric Auger
Hi, On 6/2/21 8:00 PM, Shashi Mallela wrote: > Added functionality to trigger ITS command queue processing on > write to CWRITE register and process each command queue entry to > identify the command type and handle commands like MAPD,MAPC,SYNC. > > Signed-off-by: Shashi Mallela > --- > hw/intc

Re: [PATCH v2] semihosting/arm-compat: remove heuristic softmmu SYS_HEAPINFO

2021-06-13 Thread Peter Maydell
On Fri, 11 Jun 2021 at 18:03, Alex Bennée wrote: > > > Peter Maydell writes: > > > On Thu, 10 Jun 2021 at 15:16, Alex Bennée wrote: > >> > >> > >> Peter Maydell writes: > >> > (2) find the largest contiguous extent of that RAM which > >> > is not covered by a ROM blob, by iterating throug

Re: [PATCH] block: fix build waring

2021-06-13 Thread Peter Maydell
On Sun, 13 Jun 2021 at 15:20, Zhiwei Jiang wrote: > > when i compile this file with some error message > ../block.c: In function ‘bdrv_replace_node_common’: > ../block.c:4903:9: error: ‘to_cow_parent’ may be used > uninitialized in this function [-Werror=maybe-uninitialized] > bdrv_remove

Re: [PULL 00/34] tcg patch queue

2021-06-13 Thread Peter Maydell
On Sat, 12 Jun 2021 at 00:47, Richard Henderson wrote: > > This is mostly my code_gen_buffer cleanup, plus a few other random > changes thrown in. Including a fix for a recent float32_exp2 bug. > > > r~ > > > The following changes since commit 894fc4fd670aaf04a67dc7507739f914ff4bacf2: > > Merge

Re: [PATCH v4 4/8] hw/intc: GICv3 ITS Command processing

2021-06-13 Thread Eric Auger
Hi Shashi, On 6/2/21 8:00 PM, Shashi Mallela wrote: > Added ITS command queue handling for MAPTI,MAPI commands,handled ITS > translation which triggers an LPI via INT command as well as write > to GITS_TRANSLATER register,defined enum to differentiate between ITS > command interrupt trigger and GI

Re: [PATCH v4 6/8] hw/intc: GICv3 redistributor ITS processing

2021-06-13 Thread Eric Auger
Hi Shashi, On 6/2/21 8:00 PM, Shashi Mallela wrote: > Implemented lpi processing at redistributor to get lpi config info s/Implemented/Implement here are elsewhere. > from lpi configuration table,determine priority,set pending state in > lpi pending table and forward the lpi to cpuif.Added logic t

[PATCH 4/5] dp8393x: don't force 32-bit register access

2021-06-13 Thread Mark Cave-Ayland
Commit 3fe9a838ec "dp8393x: Always use 32-bit accesses" assumed that all accesses to the registers were 32-bit but this is actually not the case. The access size is determined by the CPU instruction used and not the number of physical address lines. The big_endian workaround applied to the regi

[PATCH 0/5] dp8393x: fixes for MacOS toolbox ROM

2021-06-13 Thread Mark Cave-Ayland
Here is the next set of patches from my attempts to boot MacOS under QEMU's Q800 machine related to the Sonic network adapter. Patches 1 and 2 sort out checkpatch and convert from DPRINTF macros to trace-events. Patch 3 fixes the PROM checksum and MAC address storage format as found by stepping t

[PATCH 5/5] dp8393x: fix CAM descriptor entry index

2021-06-13 Thread Mark Cave-Ayland
Currently when a LOAD CAM command is executed the entries are loaded into the CAM from memory in order which is incorrect. According to the datasheet the first entry in the CAM descriptor is the entry index which means that each descriptor may update any single entry in the CAM rather than the Nth

[PATCH 2/5] dp8393x: convert to trace-events

2021-06-13 Thread Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland --- hw/net/dp8393x.c| 55 + hw/net/trace-events | 17 ++ 2 files changed, 37 insertions(+), 35 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 56af08f0fe..ea5b22f680 100644 --- a/hw/ne

[PATCH 1/5] dp8393x: checkpatch fixes

2021-06-13 Thread Mark Cave-Ayland
Also fix a simple comment typo of "constrainst" to "constraints". Signed-off-by: Mark Cave-Ayland --- hw/net/dp8393x.c | 231 +-- 1 file changed, 122 insertions(+), 109 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 533a8304d0..56

[PATCH 3/5] dp8393x: fix PROM checksum and MAC address storage

2021-06-13 Thread Mark Cave-Ayland
The checksum used by MacOS to validate the PROM content is an exclusive-OR rather than a sum over the corresponding bytes. In addition the MAC address must be stored in bit-reversed format as indicated in comments in Linux's macsonic.c. With the PROM contents fixed MacOS starts to probe the device

Re: [PULL 00/34] tcg patch queue

2021-06-13 Thread Peter Maydell
On Sun, 13 Jun 2021 at 16:13, Peter Maydell wrote: > > On Sat, 12 Jun 2021 at 00:47, Richard Henderson > wrote: > > > > This is mostly my code_gen_buffer cleanup, plus a few other random > > changes thrown in. Including a fix for a recent float32_exp2 bug. > > > > > > r~ > > > > > > The followin

[PATCH] target/i386/tcg/sysemu/bpt_helper.c: typo since cpu_breakpoint and cpu_watchpoint are in a union, the code should access only one of them

2021-06-13 Thread Dmitry Voronetskiy
Signed-off-by: Dmitry Voronetskiy --- target/i386/tcg/sysemu/bpt_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/sysemu/bpt_helper.c b/target/i386/tcg/sysemu/bpt_helper.c index 9bdf7e170b..de284dbdcb 100644 --- a/target/i386/tcg/sysemu/bpt_helper.

[PATCH v2 0/1] PALcode fixes for guest OS console initialization

2021-06-13 Thread Jason Thorpe
This is a follow-up on my previous set of patches for the Qemu PALcode, which were merged except for the CTB patch. The patch has incorporated review feedback, but there is still some research going on about how real DEC SRM initializes a particular field in various circumstances; this is my best

[PATCH v2 1/1] Provide a minimal Console Terminal Block in the HWRPB.

2021-06-13 Thread Jason Thorpe
Provide a minimal Console Terminal Block in the HWRPB so that operating systems that depend on it can correctly initialize the console device. This is suffucient, at least, for the BSD operating systems, but may not be sufficient for Digital UNIX. In addition to defining and filling out the struct

[PATCH 1/4] mc146818rtc: Make PF independent of PIE

2021-06-13 Thread Jason Thorpe
Make the PF flag behave like real hardware by always running the periodic timer without regard to the setting of the PIE bit, so that the PF will be set when the period expires even if an interrupt will not be raised. This behavior is documented on page 16 of the MC146818A advance information data

[PATCH 0/4] Emulator fixes to enable running NetBSD/alpha

2021-06-13 Thread Jason Thorpe
The following are a set of fixes to device and system emulation that allow NetBSD/alpha to run in qemu-system-alpha. The first change fixes behavior in the mc146818rtc emulation to more accurately reflect how the real hardware vis a vis the PF status bit (specifically, that it is independent of th

[PATCH 3/4] alpha: Provide a PCI-ISA bridge device node for guest OS's that expect it

2021-06-13 Thread Jason Thorpe
Provide a PCI device node at ID 7 for the PCI-ISA bridge. Even though Tsunami/Typhoon systems would have used a different chip (Cypress or ALI), for simplicity we model the Intel i82378, which was also used on several Alpha models. This is needed for some operating systems that only probe ISA dev

[PATCH 2/4] alpha: Set minimum PCI device ID to 1 to match Clipper IRQ mappings.

2021-06-13 Thread Jason Thorpe
Since we are emulating a Clipper device topology, we need to set the minimum PCI device ID to 1, as there is no IRQ mapping for a device at ID 0 (see sys_dp264.c:clipper_map_irq()). - Add a 'devfn_min' argument to typhoon_init(). Pass that argument along to pci_register_root_bus(). - In clipper

[PATCH 4/4] alpha: Provide console information to the PALcode at start-up.

2021-06-13 Thread Jason Thorpe
Redefine the a2 register passed by Qemu at start-up to also include some configuration flags, in addition to the CPU count, and define a flag to mirror the "-nographics" option. Signed-off-by: Jason Thorpe --- hw/alpha/dp264.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/hw/a

Re: [PATCH 1/3] hw/acpi: Provide stub version of acpi_ghes_record_errors()

2021-06-13 Thread Dongjiu Geng
On Fri, 4 Jun 2021 at 01:13, Peter Maydell wrote: > > Generic code in target/arm wants to call acpi_ghes_record_errors(); > provide a stub version so that we don't fail to link when > CONFIG_ACPI_APEI is not set. This requires us to add a new > ghes-stub.c file to contain it and the meson.build me

Re: [PATCH 2/3] hw/acpi: Provide function acpi_ghes_present()

2021-06-13 Thread Dongjiu Geng
On Fri, 4 Jun 2021 at 01:13, Peter Maydell wrote: > > Allow code elsewhere in the system to check whether the ACPI GHES > table is present, so it can determine whether it is OK to try to > record an error by calling acpi_ghes_record_errors(). > > (We don't need to migrate the new 'present' field i

Re: [PATCH 3/3] target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors

2021-06-13 Thread Dongjiu Geng
On Fri, 4 Jun 2021 at 01:13, Peter Maydell wrote: > > The virt_is_acpi_enabled() function is specific to the virt board, as > is the check for its 'ras' property. Use the new acpi_ghes_present() > function to check whether we should report memory errors via > acpi_ghes_record_errors(). > > This a

[PULL v2 00/34] tcg patch queue

2021-06-13 Thread Richard Henderson
09:21:48 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210613 for you to fetch changes up to a5a8b84772e13066c6c45f480cc5b5312bbde08e: docs/devel: Explain in more detail the TB chaining mechanisms (2021-0

[PULL v2 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state

2021-06-13 Thread Richard Henderson
Do not mess around with setting values within tcg_init_ctx. Put the values into 'region' directly, which is where they will live for the lifetime of the program. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 64 ++--

Re: [PULL 00/34] tcg patch queue

2021-06-13 Thread Richard Henderson
On 6/13/21 10:10 AM, Peter Maydell wrote: Also on x86-64 host, this failure in check-tcg: make[2]: Leaving directory '/home/petmay01/linaro/qemu-for-merges/build/all-linux-static/tests/tcg/hppa-linux-user' make[2]: Entering directory '/home/petmay01/linaro/qemu-for-merges/build/all-linux-static/

Re: [PATCH v3 1/2] hw/char: sifive_uart

2021-06-13 Thread Alistair Francis
On Mon, Jun 14, 2021 at 12:13 AM Lukas Jünger wrote: > > Make function names consistent > > Signed-off-by: Lukas Jünger Reviewed-by: Alistair Francis Alistair > --- > hw/char/sifive_uart.c | 46 ++- > 1 file changed, 24 insertions(+), 22 deletions(-) >

Re: [PATCH v2 1/2] hw/nvme: fix endianess conversion and add controller list

2021-06-13 Thread Gollu Appalanaidu
On Wed, Jun 09, 2021 at 10:22:49PM +0200, Klaus Jensen wrote: On Jun 1 20:32, Gollu Appalanaidu wrote: Add the controller identifiers list CNS 0x13, available list of ctrls in NVM Subsystem that may or may not be attached to namespaces. In Identify Ctrl List of the CNS 0x12 and 0x13 no endian

Re: [PULL 1/9] yank: Unregister function when using TLS migration

2021-06-13 Thread Philippe Mathieu-Daudé
Hi Leonardo, On 6/9/21 4:45 PM, Dr. David Alan Gilbert (git) wrote: > From: Leonardo Bras > > After yank feature was introduced in migration, whenever migration > is started using TLS, the following error happens in both source and > destination hosts: > > (qemu) qemu-kvm: ../util/yank.c:107: y

Re: [PULL v2 00/34] tcg patch queue

2021-06-13 Thread Philippe Mathieu-Daudé
On 6/14/21 3:20 AM, Richard Henderson wrote: > V2 fixes an error in patch 22 wrt MacOS. > It's a shame we don't have public CI for that. We do: https://cirrus-ci.com/github/qemu/qemu Maybe it is not documented well enough? Apparently we could integrate it to gitlab pipeline: https://potyarkin.m

[RFC PATCH] migration: Add missing dependency on GNUTLS

2021-06-13 Thread Philippe Mathieu-Daudé
Commit 7de2e856533 made migration/qemu-file-channel.c include "io/channel-tls.h" but forgot to add the new GNUTLS dependency on Meson, leading to build failure on OSX: [2/35] Compiling C object libmigration.fa.p/migration_qemu-file-channel.c.o FAILED: libmigration.fa.p/migration_qemu-file-chan

Re: [PATCH 0/5] dp8393x: fixes for MacOS toolbox ROM

2021-06-13 Thread Philippe Mathieu-Daudé
Cc'ing Finn & Laurent. On 6/13/21 6:37 PM, Mark Cave-Ayland wrote: > Here is the next set of patches from my attempts to boot MacOS under QEMU's > Q800 machine related to the Sonic network adapter. > > Patches 1 and 2 sort out checkpatch and convert from DPRINTF macros to > trace-events. > > Pat

Re: [PATCH] esp: fix migration version check in esp_is_version_5()

2021-06-13 Thread Philippe Mathieu-Daudé
On 6/13/21 12:26 PM, Mark Cave-Ayland wrote: > Commit 4e78f3bf35 "esp: defer command completion interrupt on incoming data > transfers" added a version check for use with VMSTATE_*_TEST macros to allow > migration from older QEMU versions. Unfortunately the version check fails to > work in its curr

Re: [PATCH] meson.build: Support ncurses on MacOS

2021-06-13 Thread Philippe Mathieu-Daudé
On 6/13/21 8:33 AM, Stefan Weil wrote: > Am 13.06.21 um 03:40 schrieb Brad Smith: > >> This same problem also applies to OpenBSD as we have the same >> version of ncurses with support for wide characters. I have a similar >> patch in our QEMU port. > > > Then we should either extend the conditio