[Bug 1918302] Re: qemu-system-arm segfaults while servicing SYS_HEAPINFO

I still want to look at this. ** Changed in: qemu Status: Incomplete => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1918302 Title: qemu-system-arm segfaults while servicing SYS

Re: [RFC PATCH 21/27] virtio-snd: Add VIRTIO_SND_R_PCM_STOP handler

> +static uint32_t virtio_snd_handle_pcm_stop(VirtIOSound *s, > + VirtQueueElement *elem) Looks very simliar to virtio_snd_handle_pcm_start. Maybe it makes sense to have an virtio_snd_handle_pcm_start_stop(..., bool start) function instead? take

Re: [PATCH v4 07/12] qtest/arm-cpu-features: Use generic qtest_has_accel() to check for TCG

Philippe Mathieu-Daudé writes: > Now than we can probe if the TCG accelerator is available > at runtime with a QMP command, only run these tests if TCG > is built into the QEMU binary. > > Suggested-by: Andrew Jones > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée -- Alex

Re: [PATCH] hw/avr/atmega.c: use the avr51 cpu for atmega1280

On 4/28/21 9:17 PM, Philippe Mathieu-Daudé wrote: > Cc'ing Joaquín. > > On 4/28/21 9:15 PM, Frederic Konrad wrote: >> According to the as documentation: >> (https://sourceware.org/binutils/docs-2.36/as/AVR-Options.html) >> >> "Instruction set avr51 is for the enhanced AVR core with exactly 128K >>

[PATCH v3] i386: Add ratelimit for bus locks acquired in guest

A bus lock is acquired through either split locked access to writeback (WB) memory or any locked access to non-WB memory. It is typically >1000 cycles slower than an atomic operation within a cache and can also disrupts performance on other cores. Virtual Machines can exploit bus locks to degrade

[PULL 01/43] hw/arm/smmuv3: Support 16K translation granule

From: Kunkun Jiang The driver can query some bits in SMMUv3 IDR5 to learn which translation granules are supported. Arm recommends that SMMUv3 implementations support at least 4K and 64K granules. But in the vSMMUv3, there seems to be no reason not to support 16K translation granule. In addition,

[PULL 03/43] target/arm: Fix mte_checkN

From: Richard Henderson We were incorrectly assuming that only the first byte of an MTE access is checked against the tags. But per the ARM, unaligned accesses are pre-decomposed into single-byte accesses. So by the time we reach the actual MTE check in the ARM pseudocode, all accesses are alig

[PULL 02/43] target/arm: Make Thumb store insns UNDEF for Rn==1111

The Arm ARM specifies that for Thumb encodings of the various plain store insns, if the Rn field is then we must UNDEF. This is different from the Arm encodings, where this case is either UNPREDICTABLE or has well-defined behaviour. The exclusive stores, store-release and STRD do not have th

[PULL 04/43] target/arm: Split out mte_probe_int

From: Richard Henderson Split out a helper function from mte_checkN to perform all of the checking and address manpulation. So far, just use this in mte_checkN itself. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20210416183106.1516563-3-richard.hender...@linaro.org R

[PULL 00/43] target-arm queue

o.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210430 for you to fetch changes up to a6091108aa44e9017af4ca13c43f55a629e3744c: hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows (2021-04-30 11:1

[PULL 06/43] test/tcg/aarch64: Add mte-5

From: Richard Henderson Buglink: https://bugs.launchpad.net/bugs/1921948 Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20210416183106.1516563-5-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- tests/tcg/aarch64/mte-5.c | 44

[PULL 08/43] target/arm: Merge mte_check1, mte_checkN

From: Richard Henderson The mte_check1 and mte_checkN functions are now identical. Drop mte_check1 and rename mte_checkN to mte_check. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20210416183106.1516563-7-richard.hender...@linaro.org Signed-off-by: Peter Maydell ---

[PULL 05/43] target/arm: Fix unaligned checks for mte_check1, mte_probe1

From: Richard Henderson We were incorrectly assuming that only the first byte of an MTE access is checked against the tags. But per the ARM, unaligned accesses are pre-decomposed into single-byte accesses. So by the time we reach the actual MTE check in the ARM pseudocode, all accesses are alig

[PULL 09/43] target/arm: Rename mte_probe1 to mte_probe

From: Richard Henderson For consistency with the mte_check1 + mte_checkN merge to mte_check, rename the probe function as well. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20210416183106.1516563-8-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/

[PULL 10/43] target/arm: Simplify sve mte checking

From: Richard Henderson Now that mte_check1 and mte_checkN have been merged, we can merge sve_cont_ldst_mte_check1 and sve_cont_ldst_mte_checkN. Which means that we can eliminate the function pointer into sve_ldN_r and sve_stN_r, calling sve_cont_ldst_mte_check directly. Reviewed-by: Alex Benné

[PULL 14/43] target/arm: Rename TBFLAG_ANY, PSTATE_SS

From: Richard Henderson We're about to rearrange the macro expansion surrounding tbflags, and this field name will be expanded using the bit definition of the same name, resulting in a token pasting error. So PSTATE_SS -> PSTATE__SS in the uses, and document it. Reviewed-by: Peter Maydell Sign

[PULL 07/43] target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1

From: Richard Henderson After recent changes, mte_checkN does not use ESIZE, and mte_check1 never used TSIZE. We can combine the two into a single field: SIZEM1. Choose to pass size - 1 because size == 0 is never used, our immediate need in mte_probe_int is for the address of the last byte (ptr

[PULL 11/43] target/arm: Remove log2_esize parameter to gen_mte_checkN

From: Richard Henderson The log2_esize parameter is not used except trivially. Drop the parameter and the deferral to gen_mte_check1. This fixes a bug in that the parameters as documented in the header file were the reverse from those in the implementation. Which meant that translate-sve.c was

[PULL 17/43] target/arm: Move mode specific TB flags to tb->cs_base

From: Richard Henderson Now that we have all of the proper macros defined, expanding the CPUARMTBFlags structure and populating the two TB fields is relatively simple. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-7-richard.hender...@linaro.org S

[PULL 15/43] target/arm: Add wrapper macros for accessing tbflags

From: Richard Henderson We're about to split tbflags into two parts. These macros will ensure that the correct part is used with the correct set of bits. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-5-richard.hender...@linaro.org Signed-off-by:

[PULL 12/43] target/arm: Fix decode of align in VLDST_single

From: Richard Henderson The encoding of size = 2 and size = 3 had the incorrect decode for align, overlapping the stride field. This error was hidden by what should have been unnecessary masking in translate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 202104192022

[PULL 13/43] target/arm: Rename TBFLAG_A32, SCTLR_B

From: Richard Henderson We're about to rearrange the macro expansion surrounding tbflags, and this field name will be expanded using the bit definition of the same name, resulting in a token pasting error. So SCTLR_B -> SCTLR__B in the 3 uses, and document it. Reviewed-by: Peter Maydell Signed

[PULL 18/43] target/arm: Move TBFLAG_AM32 bits to the top

From: Richard Henderson Now that these bits have been moved out of tb->flags, where TBFLAG_ANY was filling from the top, move AM32 to fill from the top, and A32 and M32 to fill from the bottom. This means fewer changes when adding new bits. Reviewed-by: Peter Maydell Signed-off-by: Richard Hen

[PULL 20/43] target/arm: Add ALIGN_MEM to TBFLAG_ANY

From: Richard Henderson Use this to signal when memory access alignment is required. This value comes from the CCR register for M-profile, and from the SCTLR register for A-profile. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-11-richard.hender.

[PULL 19/43] target/arm: Move TBFLAG_ANY bits to the bottom

From: Richard Henderson Now that other bits have been moved out of tb->flags, there's no point in filling from the top. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-10-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/cp

[PULL 16/43] target/arm: Introduce CPUARMTBFlags

From: Richard Henderson In preparation for splitting tb->flags across multiple fields, introduce a structure to hold the value(s). So far this only migrates the one uint32_t and fixes all of the places that require adjustment to match. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson

[PULL 24/43] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness

From: Richard Henderson Adjust the interface to match what has been done to the TCGv_i32 load/store functions. This is less obvious, because at present the only user of these functions, trans_VLDST_multiple, also wants to manipulate the endianness to speed up loading multiple bytes. Thus we ret

[PULL 22/43] target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64

From: Richard Henderson This is the only caller. Adjust some commentary to talk about SCTLR_B instead of the vanishing function. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-13-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- tar

[PULL 21/43] target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness

From: Richard Henderson Create a finalize_memop function that computes alignment and endianness and returns the final MemOp for the operation. Split out gen_aa32_{ld,st}_internal_i32 which bypasses any special handling of endianness or alignment. Adjust gen_aa32_{ld,st}_i32 so that s->be_data i

[PULL 26/43] target/arm: Enforce alignment for LDA/LDAH/STL/STLH

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-17-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/tran

[PULL 39/43] target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-30-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git

[PULL 33/43] target/arm: Enforce alignment for VLDn/VSTn (multiple)

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-24-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-neon.c.inc | 27 ++- 1 file changed, 22 insertions(+), 5 deletion

[PULL 25/43] target/arm: Enforce word alignment for LDRD/STRD

From: Richard Henderson Buglink: https://bugs.launchpad.net/qemu/+bug/1905356 Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-16-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 16 1 file cha

[PULL 30/43] target/arm: Enforce alignment for VLDM/VSTM

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-21-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-vfp.c.inc | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tar

[PULL 36/43] target/arm: Use finalize_memop for aa64 fpr load/store

From: Richard Henderson For 128-bit load/store, use 16-byte alignment. This requires that we perform the two operations in the correct order so that we generate the alignment fault before modifying memory. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.

[PULL 32/43] target/arm: Enforce alignment for VLDn (all lanes)

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-23-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.h | 1 + target/arm/translate.c | 15 + target/arm/transla

[PULL 29/43] target/arm: Enforce alignment for SRS

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-20-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/tran

[PULL 35/43] target/arm: Use finalize_memop for aa64 gpr load/store

From: Richard Henderson In the case of gpr load, merge the size and is_signed arguments; otherwise, simply convert size to memop. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-26-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- tar

[PULL 23/43] target/arm: Fix SCTLR_B test for TCGv_i64 load/store

From: Richard Henderson Just because operating on a TCGv_i64 temporary does not mean that we're performing a 64-bit operation. Restrict the frobbing to actual 64-bit operations. This bug is not currently visible because all current users of these two functions always pass MO_64. Reviewed-by: P

[PULL 27/43] target/arm: Enforce alignment for LDM/STM

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-18-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/tran

[PULL 31/43] target/arm: Enforce alignment for VLDR/VSTR

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-22-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-vfp.c.inc | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git

[PULL 28/43] target/arm: Enforce alignment for RFE

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-19-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/tran

[PULL 42/43] hw: add compat machines for 6.1

From: Cornelia Huck Add 6.1 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck Acked-by: Greg Kurz Message-id: 2021033900.118274-1-coh...@redhat.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/boards.h| 3 +++ include/hw/i386/p

Re: [PATCH 2/2] ui/cocoa: add option to swap Option and Command, enable by default

Hey again, On Fri, Apr 30, 2021, at 5:04 AM, 'Gerd Hoffmann ' wrote: > Wouldn't it be easier to swap the bits in the modifiers variable once > instead of having lots of isSwapOptionCommandEnabled checks in the code? Good point, since a local variable is used it's definitely easier. I'll do the c

[PULL 34/43] target/arm: Enforce alignment for VLDn/VSTn (single)

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-25-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-neon.c.inc | 48 - 1 file changed, 42 insertions(+), 6 de

[PULL 37/43] target/arm: Enforce alignment for aa64 load-acq/store-rel

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-28-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) dif

[PULL 41/43] target/arm: Enforce alignment for sve LD1R

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-32-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-sve.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/tran

[PULL 40/43] target/arm: Enforce alignment for aa64 vector LDn/STn (single)

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-31-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target

[PULL 43/43] hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows

Currently the gpex PCI controller implements no special behaviour for guest accesses to areas of the PIO and MMIO where it has not mapped any PCI devices, which means that for Arm you end up with a CPU exception due to a data abort. Most host OSes expect "like an x86 PC" behaviour, where bad acces

Re: Let's remove some deprecated stuff

Gerd Hoffmann writes: > Hi, > >> IOW, if QEMU was to be conservative, you can drop all env vars except >> the main QEMU_AUDIODRIVER. > > As already mentioned above I want drop all legacy audio bits at once. > > Leaving in the compatibility bits in for one or two more releases is > IMHO better t

[PULL 38/43] target/arm: Use MemOp for size + endian in aa64 vector ld/st

From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20210419202257.161730-29-richard.hender...@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff

[PULL 01/39] tests/test-bdrv-graph-mod: add test_parallel_exclusive_write

From: Vladimir Sementsov-Ogievskiy Add the test that shows that concept of ignore_children is incomplete. Actually, when we want to update something, ignoring permission of some existing BdrvChild, we should ignore also the propagated effect of this child to the other children. But that's not don

Re: [RFC PATCH v2 2/4] hw/arm/virt: Parse -smp cluster parameter in virt_smp_parse

On Fri, Apr 30, 2021 at 04:59:36PM +0800, wangyanan (Y) wrote: > > On 2021/4/30 14:41, Andrew Jones wrote: > > On Fri, Apr 30, 2021 at 01:09:00PM +0800, wangyanan (Y) wrote: > > > Hi Drew, > > > > > > On 2021/4/29 19:02, Andrew Jones wrote: > > > > On Thu, Apr 29, 2021 at 04:56:06PM +0800, wangya

[PULL 06/39] block: drop ctx argument from bdrv_root_attach_child

From: Vladimir Sementsov-Ogievskiy Passing parent aio context is redundant, as child_class and parent opaque pointer are enough to retrieve it. Drop the argument and use new bdrv_child_get_parent_aio_context() interface. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Alberto Garcia R

Re: [PATCH v3] i386: Add ratelimit for bus locks acquired in guest

Patchew URL: https://patchew.org/QEMU/20210430103305.28849-1-chenyi.qi...@intel.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210430103305.28849-1-chenyi.qi...@intel.com Subject: [PATCH v3] i386: Add ratelimit

[PULL 03/39] tests/test-bdrv-graph-mod: add test_append_greedy_filter

From: Vladimir Sementsov-Ogievskiy bdrv_append() is not quite good for inserting filters: it does extra permission update in intermediate state, where filter get it filtered child but is not yet replace it in a backing chain. Some filters (for example backup-top) may want permissions even when h

[PULL 10/39] block: refactor bdrv_child* permission functions

From: Vladimir Sementsov-Ogievskiy Split out non-recursive parts, and refactor as block graph transaction action. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-11-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 79 +++

[PULL 00/39] Block layer patches

The following changes since commit ccdf06c1db192152ac70a1dd974c624f566cb7d4: Open 6.1 development tree (2021-04-30 11:15:40 +0100) are available in the Git repository at: git://repo.or.cz/qemu/kevin.git tags/for-upstream for you to fetch changes up to 68bf7336533faa6aa90fdd4558edddbf5d8ef81

[PULL 07/39] block: make bdrv_reopen_{prepare,commit,abort} private

From: Vladimir Sementsov-Ogievskiy These functions are called only from bdrv_reopen_multiple() in block.c. No reason to publish them. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Alberto Garcia Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-8-vsement...@virtuozzo.com>

[PULL 13/39] block: use topological sort for permission update

From: Vladimir Sementsov-Ogievskiy Rewrite bdrv_check_perm(), bdrv_abort_perm_update() and bdrv_set_perm() to update nodes in topological sort order instead of simple DFS. With topologically sorted nodes, we update a node only when all its parents already updated. With DFS it's not so. Consider

Re: [RFC PATCH v2 2/4] hw/arm/virt: Parse -smp cluster parameter in virt_smp_parse

On Fri, Apr 30, 2021 at 05:33:42PM +0800, wangyanan (Y) wrote: > > On 2021/4/30 15:01, Andrew Jones wrote: > > On Fri, Apr 30, 2021 at 08:41:25AM +0200, Andrew Jones wrote: > > > On Fri, Apr 30, 2021 at 01:09:00PM +0800, wangyanan (Y) wrote: > > > > But I think the requirement for ARM "if even one

[PULL 04/39] block: bdrv_append(): don't consume reference

From: Vladimir Sementsov-Ogievskiy We have too much comments for this feature. It seems better just don't do it. Most of real users (tests don't count) have to create additional reference. Drop also comment in external_snapshot_prepare: - bdrv_append doesn't "remove" old bs in common sense, it

[PULL 14/39] block: add bdrv_drv_set_perm transaction action

From: Vladimir Sementsov-Ogievskiy Refactor calling driver callbacks to a separate transaction action to be used later. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-15-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c |

[PULL 02/39] tests/test-bdrv-graph-mod: add test_parallel_perm_update

From: Vladimir Sementsov-Ogievskiy Add test to show that simple DFS recursion order is not correct for permission update. Correct order is topological-sort order, which will be introduced later. Consider the block driver which has two filter children: one active with exclusive write access and o

Re: [PATCH] spapr: Modify ibm, get-config-addr-info2 to set DEVNUM in PE config address.

On 4/29/21 6:02 AM, Mahesh J Salgaonkar wrote: On 2021-04-28 22:33:45 Wed, Oliver O'Halloran wrote: On Tue, Apr 27, 2021 at 9:56 PM Mahesh Salgaonkar wrote: With upstream kernel, especially after commit 98ba956f6a389 ("powerpc/pseries/eeh: Rework device EEH PE determination") we see that K

[PULL 05/39] block: BdrvChildClass: add .get_parent_aio_context handler

From: Vladimir Sementsov-Ogievskiy Add new handler to get aio context and implement it in all child classes. Add corresponding public interface to be used soon. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Alberto Garcia Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-6

[PULL 17/39] block: fix bdrv_replace_node_common

From: Vladimir Sementsov-Ogievskiy inore_children thing doesn't help to track all propagated permissions of children we want to ignore. The simplest way to correctly update permissions is update graph first and then do permission update. In this case we just referesh permissions for the whole sub

[PULL 12/39] block: inline bdrv_child_*() permission functions calls

From: Vladimir Sementsov-Ogievskiy Each of them has only one caller. Open-coding simplifies further pemission-update system changes. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Alberto Garcia Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-13-vsement...@virtuozzo.com>

[PULL 21/39] block: adapt bdrv_append() for inserting filters

From: Vladimir Sementsov-Ogievskiy bdrv_append is not very good for inserting filters: it does extra permission update as part of bdrv_set_backing_hd(). During this update filter may conflict with other parents of top_bs. Instead, let's first do all graph modifications and after it update permis

[PULL 08/39] util: add transactions.c

From: Vladimir Sementsov-Ogievskiy Add simple transaction API to use in further update of block graph operations. Supposed usage is: - "prepare" is main function of the action and it should make the main effect of the action to be visible for the following actions, keeping possibility of ro

[PULL 23/39] block: introduce bdrv_drop_filter()

From: Vladimir Sementsov-Ogievskiy Using bdrv_replace_node() for removing filter is not good enough: it keeps child reference of the filter, which may conflict with original top node during permission update. Instead let's create new interface, which will do all graph modifications first and the

[PULL 15/39] block: add bdrv_list_* permission update functions

From: Vladimir Sementsov-Ogievskiy Add new interface, allowing use of existing node list. It will be used to fix bdrv_replace_node() in the further commit. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-16-vsement...@virtuozzo.com> Signed

[PULL 24/39] block/backup-top: drop .active

From: Vladimir Sementsov-Ogievskiy We don't need this workaround anymore: bdrv_append is already smart enough and we can use new bdrv_drop_filter(). This commit efficiently reverts also recent 705dde27c6c53b73, which checked .active on io path. Still it said that the problem should be theoretica

[PULL 09/39] block: bdrv_refresh_perms: check for parents permissions conflict

From: Vladimir Sementsov-Ogievskiy Add additional check that node parents do not interfere with each other. This should not hurt existing callers and allows in further patch use bdrv_refresh_perms() to update a subtree of changed BdrvChild (check that change is correct). New check will substitut

[PULL 25/39] block: drop ignore_children for permission update functions

From: Vladimir Sementsov-Ogievskiy This argument is always NULL. Drop it. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-26-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 38 +++--- 1 f

[PULL 33/39] block: inline bdrv_replace_child()

From: Vladimir Sementsov-Ogievskiy bdrv_replace_child() has only one caller, the second argument is unused. Inline it now. This triggers deletion of some more unused interfaces. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-34-vsement...

[PULL 11/39] block: rewrite bdrv_child_try_set_perm() using bdrv_refresh_perms()

From: Vladimir Sementsov-Ogievskiy We are going to drop recursive bdrv_child_* functions, so stop use them in bdrv_child_try_set_perm() as a first step. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-12-vsement...@virtuozzo.com> Signed-of

[PULL 19/39] block: add bdrv_attach_child_noperm() transaction action

From: Vladimir Sementsov-Ogievskiy Split no-perm part of bdrv_attach_child as separate transaction action. It will be used in later commits. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-20-vsement...@virtuozzo.com> Signed-off-by: Kevin

[PULL 28/39] block: add bdrv_set_backing_noperm() transaction action

From: Vladimir Sementsov-Ogievskiy Split out no-perm part of bdrv_set_backing_hd() as a separate transaction action. Note the in case of existing BdrvChild we reuse it, not recreate, just to do less actions. We don't need to create extra reference to backing_hd as we don't lose it in bdrv_attach

[PULL 18/39] block: add bdrv_attach_child_common() transaction action

From: Vladimir Sementsov-Ogievskiy Split out no-perm part of bdrv_root_attach_child() into separate transaction action. bdrv_root_attach_child() now moves to new permission update paradigm: first update graph relations then update permissions. qsd-jobs test output updated. Seems now permission u

[PULL 16/39] block: add bdrv_replace_child_safe() transaction action

From: Vladimir Sementsov-Ogievskiy To be used in the following commit. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-17-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 54 ++

[PULL 31/39] block: drop unused permission update functions

From: Vladimir Sementsov-Ogievskiy Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-32-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 103 1 file changed, 103 dele

[PULL 30/39] block: bdrv_reopen_multiple: refresh permissions on updated graph

From: Vladimir Sementsov-Ogievskiy Move bdrv_reopen_multiple to new paradigm of permission update: first update graph relations, then do refresh the permissions. We have to modify reopen process in file-posix driver: with new scheme we don't have prepared permissions in raw_reopen_prepare(), so

[PULL 20/39] block: split out bdrv_replace_node_noperm()

From: Vladimir Sementsov-Ogievskiy Split part of bdrv_replace_node_common() to be used separately. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-21-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 50 ++

[PULL 26/39] block: make bdrv_unset_inherits_from to be a transaction action

From: Vladimir Sementsov-Ogievskiy To be used in the further commit. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-27-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 46 ++

[PULL 32/39] block: inline bdrv_check_perm_common()

From: Vladimir Sementsov-Ogievskiy bdrv_check_perm_common() has only one caller, so no more sense in "common". Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-33-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 32 +++---

[PULL 36/39] block: refactor bdrv_node_check_perm()

From: Vladimir Sementsov-Ogievskiy Now, bdrv_node_check_perm() is called only with fresh cumulative permissions, so its actually "refresh_perm". Move permission calculation to the function. Also, drop unreachable error message and rewrite the remaining one to be more generic (as now we don't kno

[PULL 22/39] block: add bdrv_remove_filter_or_cow transaction action

From: Vladimir Sementsov-Ogievskiy Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-23-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- block.c | 84 +++-- 1 file changed, 82 inser

[PULL 38/39] qemu-img convert: Unshare write permission for source

For a successful conversion of an image, we must make sure that its content doesn't change during the conversion. A special case of this is using the same image file both as the source and as the destination. If both input and output format are raw, the operation would just be useless work, with o

[PULL 34/39] block: refactor bdrv_child_set_perm_safe() transaction action

From: Vladimir Sementsov-Ogievskiy Old interfaces dropped, nobody directly calls bdrv_child_set_perm_abort() and bdrv_child_set_perm_commit(), so we can use personal state structure for the action and stop exploiting BdrvChild structure. Also, drop "_safe" suffix which is redundant now. Signed-o

[PULL 39/39] vhost-user-blk: Fail gracefully on too large queue size

virtio_add_queue() aborts when queue_size > VIRTQUEUE_MAX_SIZE, so vhost_user_blk_device_realize() should check this before calling it. Simple reproducer: qemu-system-x86_64 \ -chardev null,id=foo \ -device vhost-user-blk-pci,queue-size=4096,chardev=foo Fixes: https://bugzilla.redhat.com

[PULL 27/39] block: make bdrv_refresh_limits() to be a transaction action

From: Vladimir Sementsov-Ogievskiy To be used in further commit. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-28-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --- include/block/block.h | 3 ++- block.c | 9 --

[PULL 35/39] block: rename bdrv_replace_child_safe() to bdrv_replace_child()

From: Vladimir Sementsov-Ogievskiy We don't have bdrv_replace_child(), so it's time for bdrv_replace_child_safe() to take its place. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Kevin Wolf Message-Id: <20210428151804.439460-36-vsement...@virtuozzo.com> Signed-off-by: Kevin Wolf --

[PULL 37/39] block: Add BDRV_O_NO_SHARE for blk_new_open()

Normally, blk_new_open() just shares all permissions. This was fine originally when permissions only protected against uses in the same process because no other part of the code would actually get to access the block nodes opened with blk_new_open(). However, since we use it for file locking now, u

Re: [PATCH 1/2] ui/cocoa: capture all keys and combos when mouse is grabbed

"Gustavo Noronha Silva" writes: > Hey Markus, > > On Fri, Apr 30, 2021, at 4:20 AM, Markus Armbruster wrote: >> Please indent like this >> >># @full-grab: Capture all key presses, including system combos. This >># requires accessibility permissions, since it performs >>#

[PULL 29/39] block: bdrv_reopen_multiple(): move bdrv_flush to separate pre-prepare

From: Vladimir Sementsov-Ogievskiy During reopen we may add backing bs from other aio context, which may lead to changing original context of top bs. We are going to move graph modification to prepare stage. So, it will be possible that bdrv_flush() in bdrv_reopen_prepare called on bs in non-ori

Re: [RFC PATCH 00/27] Virtio sound card implementation

Hi, > - The output from the sound card is accompanied by periodic > white noise. I do not know why this is happening. I tried > debugging it by writing the buffers to a new wav file and > sure enough the contents of the file were different at > some places, but I coul

Re: [PULL 00/43] target-arm queue

Patchew URL: https://patchew.org/QEMU/20210430103437.4140-1-peter.mayd...@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210430103437.4140-1-peter.mayd...@linaro.org Subject: [PULL 00/43] target-arm queue

Re: [PATCH] mirror: stop cancelling in-flight requests on non-force cancel in READY

On 21.04.21 09:58, Vladimir Sementsov-Ogievskiy wrote: If mirror is READY than cancel operation is not discarding the whole result of the operation, but instead it's a documented way get a point-in-time snapshot of source disk. So, we should not cancel any requests if mirror is READ and force=fa

Re: [PATCH 1/2] ui/cocoa: capture all keys and combos when mouse is grabbed

"Gustavo Noronha Silva" writes: > Oh by the way, > > On Fri, Apr 30, 2021, at 7:02 AM, Gustavo Noronha Silva wrote: >> ># @full-grab: Capture all key presses, including system combos. This >> ># requires accessibility permissions, since it performs >> ># a glob

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