Adam Williamson <1923...@bugs.launchpad.net> writes:
> Public bug reported:
>
> There's a documented change in qemu 6.0:
>
> https://qemu-project.gitlab.io/qemu/system/removed-features.html#floppy-
> controllers-drive-properties-removed-in-6-0
>
> where you can't configure floppy controller device
Currently pci_nvme_err_invalid_lba_range tace being called indvidually
at each function, add this in nvme_check_bounds and remove redundant
usage of it.
Signed-off-by: Gollu Appalanaidu
---
hw/block/nvme.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/hw/block/nvme.
On Mon, Apr 12, 2021 at 9:06 PM Stefano Garzarella
wrote:
> get_relocated_path() allocates a GString object and returns the
> character data (C string) to the caller without freeing the memory
> allocated for that object as reported by valgrind:
>
> 24 bytes in 1 blocks are definitely lost in l
On 13.04.21 18:52, Ilya Leoshkevich wrote:
Hitting an uretprobe in a s390x TCG guest causes a SIGSEGV. What
happens is:
* uretprobe maps a userspace page containing an invalid instruction.
* uretprobe replaces the target function's return address with the
address of that page.
* When tb_gen_c
Hi Alistair,
On Tue, Apr 13, 2021 at 10:42 AM Alistair Francis
wrote:
>
> From: Hou Weiying
>
> This commit adds support for ePMP v0.9.1.
>
> The ePMP spec can be found in:
> https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8
>
> Signed-off-by: Hongzheng-Li
> Signed
On Wed, Apr 14, 2021 at 7:33 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Richard Henderson
> ---
> target/riscv/cpu.h | 6 --
> target/riscv/cpu.c | 6 +-
> 2 files changed, 5 insertions(+), 7 deletions(-)
>
Reviewed-by: Bin Meng
On Wed, Apr 14, 2021 at 7:33 AM Alistair Francis
wrote:
>
Worth mentioning that this also fixed the issue of a writable SD bit
> Signed-off-by: Alistair Francis
> Reviewed-by: Richard Henderson
> ---
> target/riscv/cpu_bits.h | 6 --
> target/riscv/csr.c | 9 -
> 2 files chan
On Wed, Apr 14, 2021 at 7:34 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Richard Henderson
> ---
> target/riscv/translate.c | 6 --
> 1 file changed, 6 deletions(-)
>
Reviewed-by: Bin Meng
On Wed, Apr 14, 2021 at 7:34 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Richard Henderson
> ---
> target/riscv/cpu_bits.h | 11 ---
> target/riscv/cpu_helper.c | 24 +++-
> 2 files changed, 15 insertions(+), 20 deletions(-)
>
Rev
On Wed, Apr 14, 2021 at 7:34 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Richard Henderson
> ---
> target/riscv/cpu_bits.h | 6 --
> 1 file changed, 6 deletions(-)
>
Reviewed-by: Bin Meng
Hi Kunkun,
On 4/14/21 3:45 AM, Kunkun Jiang wrote:
> On 2021/4/13 20:57, Auger Eric wrote:
>> Hi Kunkun,
>>
>> On 4/13/21 2:10 PM, Kunkun Jiang wrote:
>>> Hi Eric,
>>>
>>> On 2021/4/11 20:08, Eric Auger wrote:
In nested mode, legacy vfio_iommu_map_notify cannot be used as
there is no "ca
On Wed, Apr 14, 2021 at 7:34 AM Alistair Francis
wrote:
>
> Signed-off-by: Alistair Francis
> ---
> target/riscv/cpu_bits.h | 11 ---
> target/riscv/cpu_helper.c | 24 ++--
> target/riscv/csr.c| 20
> target/riscv/monitor.c| 22 +
We're going to enable ccache in our gitlab-CI. Make sure that it is
available in all containers.
Signed-off-by: Thomas Huth
---
tests/docker/dockerfiles/alpine.docker | 1 +
tests/docker/dockerfiles/fedora-i386-cross.docker | 1 +
tests/docker/dockerfiles/fedora-win32-cross.docker |
Here are some patches to enable ccache in the gitlab-CI. Using the
compiler cache can speed up some of the jobs in the CI by avoiding
to recompile the same sources again and again. With this patch series,
some jobs indeed get quite a bit faster. For example "build-system-fedora"
goes down from 29 m
For some reasons, the "cc" symlink is missing in Ubuntu 20.04.
Add it manually.
Signed-off-by: Thomas Huth
---
tests/docker/dockerfiles/ubuntu2004.docker | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/docker/dockerfiles/ubuntu2004.docker
b/tests/docker/dockerfiles/ubuntu2004.docke
Ccache can speed up the compilation in some cases, so enable it for
our cross-compilation CI builds, too.
Signed-off-by: Thomas Huth
---
.gitlab-ci.d/crossbuilds.yml | 28
1 file changed, 28 insertions(+)
diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/cros
The cross-win64-system job is one of the slowest in our gitlab-ci.
With the upcoming changes that introduce ccache, it might even get
slower initially as long as the cache is not populated yet. Thus
let's limit the amount of targets that we build here even further
to avoid that we might hit the 80
Ccache can speed up the compilation in some cases, so enable it for
our CI builds, too.
Signed-off-by: Thomas Huth
---
.gitlab-ci.yml | 20
1 file changed, 20 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 52d65d6c04..422608381e 100644
--- a/.gitlab-ci.yml
Below are the API docs that I found helpful for understanding the big
picture.
The QMP.execute() API is nice.
Regarding QMP events, I can think of two approaches:
1. Callbacks
2. An async get_event(name=Optional[str]) -> object API
(plus get_event_nowait(name=Optional[str]) -> object)
(There'
On Tue, Apr 13, 2021 at 11:55:52AM -0400, John Snow wrote:
> +async def _execute(self, msg: Message) -> object:
> +"""
> +The same as `execute_msg()`, but without safety mechanisms.
> +
> +Does not assign an execution ID and does not check that the form
> +of the
On Tue, Apr 13, 2021 at 09:35:34AM -0400, Vivek Goyal wrote:
> On Tue, Apr 13, 2021 at 09:47:14AM +0100, Stefan Hajnoczi wrote:
> > On Thu, Apr 08, 2021 at 10:55:34PM +0300, Anton Kuchin wrote:
> > > Make virtio-fs take into account server capabilities.
> > >
> > > Just returning requested feature
On 4/13/21 10:49 PM, Philippe Mathieu-Daudé wrote:
> On 3/26/21 8:35 PM, Claudio Fontana wrote:
>> Signed-off-by: Claudio Fontana
>> Reviewed-by: Richard Henderson
>> Reviewed-by: Alex Bennée
>> ---
>> target/arm/tcg/meson.build | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
Hi Stefan,
On Tue, Apr 13, 2021 at 2:19 PM Stefan Weil wrote:
>
> Am 13.04.21 um 07:56 schrieb Bin Meng:
>
> > On Mon, Apr 12, 2021 at 11:33 PM Peter Maydell
> > wrote:
> >> Last call to note anything we need to fix for 6.0 on
> >> https://wiki.qemu.org/Planning/6.0#Known_issues please.
> >> Th
On Tue, 13 Apr 2021 18:52:57 +0200
Ilya Leoshkevich wrote:
> Hitting an uretprobe in a s390x TCG guest causes a SIGSEGV. What
> happens is:
>
> * uretprobe maps a userspace page containing an invalid instruction.
> * uretprobe replaces the target function's return address with the
> address of
Do the same as in commit
(4d027afeb3a97 Virt: ACPI: fix qemu assert due to re-assigned table data
address)
for remaining tables that happen to use saved at
the beginning pointer to build header to avoid assert
when table_data is relocated due to implicit re-size.
In this case user is trying to s
On Tue, 13 Apr 2021 21:29:45 -
Ed Davison <1923...@bugs.launchpad.net> wrote:
> Hmmm. Well, I don't know what the command line was. I use Virtual
> Machine Manager (virt-manager.org) for my interface to the VM and it
> does the startup. The error shows up when I start the VM.
In this case y
On Wed, 14 Apr 2021 04:43:56 -0400
Igor Mammedov wrote:
> Do the same as in commit
> (4d027afeb3a97 Virt: ACPI: fix qemu assert due to re-assigned table data
> address)
> for remaining tables that happen to use saved at
> the beginning pointer to build header to avoid assert
> when table_data i
On Tue, 13 Apr 2021 at 16:25, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit dce628a97fde2594f99d738883a157f05aa0a14f:
>
> Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210412'
> into staging (2021-04-13 13:05:
On Tue, Apr 13, 2021 at 09:37:37PM +0800, Zenghui Yu wrote:
As it's only used inside hw/virtio/vhost-vdpa.c.
Signed-off-by: Zenghui Yu
---
hw/virtio/vhost-vdpa.c | 4 ++--
include/hw/virtio/vhost-vdpa.h | 2 --
2 files changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Stefano Garzar
On Fri, 9 Apr 2021 15:54:47 +
Eric DeVolder wrote:
> Hi Igor,
> Thank you for reviewing. I've responded inline below.
> eric
>
>
> From: Igor Mammedov
> Sent: Tuesday, April 6, 2021 2:31 PM
> To: Eric DeVolder
> Cc: m...@redhat.com ; marcel.apfelb...@gmail.
Am 14.04.21 um 10:30 schrieb Bin Meng:
Hi Stefan,
On Tue, Apr 13, 2021 at 2:19 PM Stefan Weil wrote:
Am 13.04.21 um 07:56 schrieb Bin Meng:
This patch (affects Windows install)
http://patchwork.ozlabs.org/project/qemu-devel/patch/20210326062140.367861-1-bmeng...@gmail.com/
is still not app
On Wed, 2021-04-14 at 10:38 +0200, Cornelia Huck wrote:
> On Tue, 13 Apr 2021 18:52:57 +0200
> Ilya Leoshkevich wrote:
>
> > Hitting an uretprobe in a s390x TCG guest causes a SIGSEGV. What
> > happens is:
> >
> > * uretprobe maps a userspace page containing an invalid
> > instruction.
> > * ure
On Wed, 14 Apr 2021 at 09:31, Bin Meng wrote:
>
> Hi Stefan,
>
> On Tue, Apr 13, 2021 at 2:19 PM Stefan Weil wrote:
> > That patch is based on an older version of my personal QEMU sources and
> > not required for 6.0.
>
> I am confused.
>
> I see https://repo.or.cz/qemu/ar7.git/blob/HEAD:/qemu.ns
Hi,
> Any other ideas as to how to eliminate that Blit cleanly?
Well, "cleanly" pretty much implies "supported by toolkit".
gtk glarea for example sets up a framebuffer and expects the application
render to that framebuffer. So qemu glarea code does a fb-to-fb blit.
Other reasons are scaling
On Tue, 13 Apr 2021 at 23:44, Devin Hussey wrote:
>
> In a toy project I was doing
> (https://github.com/easyaspi314/ThumbGolf), I found that qemu will
> incorrectly handle modifying pc in a handler.
>
> Specifically, on platforms with instruction alignment requirements
> (most notably ARM), if yo
Please install debuginfo and run "p *ctx" in GDB from the
aio_ctx_finalize frame. That should show ctx->scheduled_coroutines,
ctx->bh_slice_list, etc.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/192
On 3/19/21 6:40 AM, Thomas Huth wrote:
> On 19/03/2021 01.43, Philippe Mathieu-Daudé wrote:
>> When a job is based on a Docker image [1], or is using a Docker
>> service, it requires a runner with Docker installed.
>>
>> Gitlab shared runners provide the 'docker' tag when they have it
>> installed.
On 4/13/21 3:37 PM, Zenghui Yu wrote:
> As it's only used inside hw/virtio/vhost-vdpa.c.
>
> Signed-off-by: Zenghui Yu
> ---
> hw/virtio/vhost-vdpa.c | 4 ++--
> include/hw/virtio/vhost-vdpa.h | 2 --
> 2 files changed, 2 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
As java -version passes few times, further also checked behaviour of Maven.
Observed that mvn -v crashes in a similar fashion, however after setting below:
export MAVEN_OPTS="-XX:-TieredCompilation -XX:+UseG1GC -Dcount=100"
mvn -v always passes.
root@XX:/# mvn -v
OpenJDK 64-Bit Server VM war
On 4/14/21 10:19 AM, Thomas Huth wrote:
> For some reasons, the "cc" symlink is missing in Ubuntu 20.04.
> Add it manually.
>
> Signed-off-by: Thomas Huth
> ---
> tests/docker/dockerfiles/ubuntu2004.docker | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/tests/docker/dockerfiles/ubun
On Wed, 2021-04-14 at 11:19 +0200, Ilya Leoshkevich wrote:
> On Wed, 2021-04-14 at 10:38 +0200, Cornelia Huck wrote:
> > On Tue, 13 Apr 2021 18:52:57 +0200
> > Ilya Leoshkevich wrote:
> >
> > > Hitting an uretprobe in a s390x TCG guest causes a SIGSEGV. What
> > > happens is:
> > >
> > > * uretp
On 4/14/21 10:19 AM, Thomas Huth wrote:
> Ccache can speed up the compilation in some cases, so enable it for
> our cross-compilation CI builds, too.
>
> Signed-off-by: Thomas Huth
> ---
> .gitlab-ci.d/crossbuilds.yml | 28
> 1 file changed, 28 insertions(+)
>
> dif
On Wed, Apr 14, 2021 at 10:19:02AM +0200, Thomas Huth wrote:
> Here are some patches to enable ccache in the gitlab-CI. Using the
> compiler cache can speed up some of the jobs in the CI by avoiding
> to recompile the same sources again and again. With this patch series,
> some jobs indeed get quit
On 4/14/21 12:29 PM, Philippe Mathieu-Daudé wrote:
> On 4/14/21 10:19 AM, Thomas Huth wrote:
>> Ccache can speed up the compilation in some cases, so enable it for
>> our cross-compilation CI builds, too.
>>
>> Signed-off-by: Thomas Huth
>> ---
>> .gitlab-ci.d/crossbuilds.yml | 28 +++
On Tue, Apr 13, 2021 at 06:56:54PM +0200, Kevin Wolf wrote:
> virtio_add_queue() aborts when queue_size > VIRTQUEUE_MAX_SIZE, so
> vhost_user_blk_device_realize() should check this before calling it.
>
> Simple reproducer:
>
> qemu-system-x86_64 \
> -chardev null,id=foo \
> -device vhost-
On Wed, 14 Apr 2021 12:27:03 +0200
Ilya Leoshkevich wrote:
> On Wed, 2021-04-14 at 11:19 +0200, Ilya Leoshkevich wrote:
> > On Wed, 2021-04-14 at 10:38 +0200, Cornelia Huck wrote:
> > > On Tue, 13 Apr 2021 18:52:57 +0200
> > > Ilya Leoshkevich wrote:
> > >
> > > > Hitting an uretprobe in a
On Tue, Apr 13, 2021 at 02:55:33PM +0200, Paolo Bonzini wrote:
> Right now, rate limiting is protected by the AioContext mutex, which is
> taken for example both by the block jobs and by qmp_block_job_set_speed
> (via find_block_job).
>
> We would like to remove the dependency of block layer code
On Wed, 14 Apr 2021 12:39:36 +0200
Cornelia Huck wrote:
> On Wed, 14 Apr 2021 12:27:03 +0200
> Ilya Leoshkevich wrote:
>
> > On Wed, 2021-04-14 at 11:19 +0200, Ilya Leoshkevich wrote:
> > > On Wed, 2021-04-14 at 10:38 +0200, Cornelia Huck wrote:
> > > > On Tue, 13 Apr 2021 18:52:57 +0200
When the mem_size of the segment is bigger than the file_size,
and if this space doesn't overlap another segment, it needs
to be cleared.
This bug is very similar to the one we had for linux-user,
22d113b52f41 ("linux-user: Fix loading of BSS segments"),
where .bss section is encoded as an extensi
Philippe Mathieu-Daudé writes:
> We used to run the TCG tests for various QEMU targets, but at
> some points it got restricted to base directories in tests/tcg/.
> For example, armeb/mipsel/mips64/... targets are currently skipped.
>
> The configuration Makefiles in default-configs/targets/ pro
Still an issue as of QEMU 6.0.0rc2.
I can't (still) exclude that it's an issue on the host side, although,
when it comes to USB passthrough, I don't have issues with similar
devices (mice, keyboards etc.).
The module blacklist workaround works.
--
You received this bug notification because you
Using target-specific CONFIG_xxx switches in common code via "#ifdef"s
is wrong, since these macros are only defined for target-specific code.
We already poison many switches in common code to avoid the bugs with
dead code here, but these problems still keep creeping in ...
This series now improves
We are already poisoning CONFIG_KVM since this switch is not working
in common code. Do the same with the other accelerator switches, too
(except for CONFIG_TCG, which is special, since it is also defined in
config-host.h).
Signed-off-by: Thomas Huth
---
include/exec/poison.h | 4
include/s
The ObjectType enum and ObjectOptions are included from qapi-types-qom.h
into common code. We should not use target-specific config switches like
CONFIG_VIRTIO_CRYPTO here, since this is not defined in common code and
thus the enum will look differently between common and target specific
code. For
We are generating a lot of target-specific defines in the *-config-devices.h
and *-config-target.h files. Using them in common code is wrong and leads
to very subtle bugs since a "#ifdef CONFIG_SOMETHING" is not working there
as expected. To avoid these issues, we are already poisoning many of the
The CONFIG_VFIO switch only works in target specific code. Since
migration/migration.c is common code, the #ifdef does not have
the intended behavior here. Move the related code to a separate
file now which gets compiled via specific_ss instead.
Fixes: 3710586caa ("qapi: Add VFIO devices migration
On 13/04/2021 14:55, Paolo Bonzini wrote:
Right now, rate limiting is protected by the AioContext mutex, which is
taken for example both by the block jobs and by qmp_block_job_set_speed
(via find_block_job).
We would like to remove the dependency of block layer code on the
AioContext mutex, s
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
---
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/a32-uncond.decode| 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{
allocation_tag_mem has a different implementation for
user-only and sysemu, so move the two implementations into
the dedicated subdirs.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
---
target/arm/tcg/mte_helper.h| 53
target/arm/tcg/m
Here a new version of the series that enables kvm-only builds.
The goal here is to enable the KVM-only build, but there is
some additional cleanup too.
Comments welcome, thanks,
Ciao, C
v12 -> v13:
* "target/arm: tcg: add stubs for some helpers for non-tcg builds"
- renamed helper-stubs.c to
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
---
target/arm/tcg/meson.build | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 0bd4e9d954..3b4146d079 100644
--- a/targe
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
---
meson.build | 1 +
target/arm/{ => tcg}/op_addsub.h | 0
target/arm/tcg/trace.h | 1 +
target/arm/{ => tcg}/vec_internal.h | 0
target/arm/{ => tcg}/crypto_
We do not move psci.c to tcg/ because we expect other
hypervisors to use it (waiting for HVF enablement).
Signed-off-by: Claudio Fontana
Cc: Alexander Graf
Reviewed-by: Richard Henderson
---
target/arm/meson.build | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/meson.build b
move sysemu-only parts of debug_helper to sysemu/
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
---
target/arm/tcg/debug_helper.c| 27 ---
target/arm/tcg/sysemu/debug_helper.c | 33
target/arm/tcg
in preparation of the creation of a new cpregs module,
fix the style for the to-be-exported code.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu.h| 54 ---
target/arm/tcg/helper.c | 310 ++--
2 files changed, 239
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/meson.build| 3 +++
target/arm/tcg/sysemu/meson.build | 2 ++
target/arm/tcg/user/meson.build | 2 ++
3 files changed, 7 insertions(+)
create mode 100644 target/arm/tcg/sysemu/meson.build
create mode 100
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-common.c | 41 +
target/arm/tcg/helper.c | 29 -
target/arm/meson.build | 1 +
3 files changed, 42 insertions(+), 29 deletions(-)
create mode 10
cpu-vfp.c: vfp_get_fpsr and vfp_set_fpsr are needed also for KVM,
so create a new cpu-vfp.c
tcg/cpu-vfp.c: vfp_get_fpscr_from_host and vv are TCG-only, so we
move the implementation to tcg/cpu-vfp.c
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
tar
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
---
target/arm/tcg/tlb_helper.h| 17 ++
target/arm/tcg/sysemu/tlb_helper.c | 83 +
target/arm/tcg/tlb_helper.c| 97 ++
target/arm/tcg/us
of note, cpreg lists were previously initialized by TCG first,
and then thrown away and replaced with the data coming from KVM.
Now we just initialize once, either for TCG or for KVM.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu.c | 32 ++
before exporting some functionality from helper.c into a new module,
fix the comment style of those functions.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/helper.c | 152 ++--
1 file changed, 101 insertions(+), 51 deletion
move work is needed later on to split things into
tcg-specific portions and kvm-specific portions of this
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
target/arm/internals.h | 8 ++-
target/arm/cpu-sysemu.c | 105
we need as a result to move switch_mode too,
so we put an implementation into cpu_user and cpu_sysemu.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu.h| 2 +
target/arm/cpu-common.c | 192 +++
target/arm/cpu-sysemu.c |
this should go away once the configuration and hw/arm is clean
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
hw/arm/boot.c | 5 -
target/arm/arm-powerctl.c | 8 +---
target/arm/tcg/tcg-stubs.c | 5 +
3 files changed, 14 insertions(+), 4 deletions(-)
before moving over sve_exception_el from the helper code,
cleanup the style.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/helper.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
i
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-mmu.c| 95 +
target/arm/tcg/helper.c | 95 -
2 files changed, 95 insertions(+), 95 deletions(-)
diff --git a/target/arm/cpu-mmu.c
and arm_phys_excp_target_el since it is tied up inside the
same #ifdef block.
aarch64_sync_32_to_64 and aarch64_sync_64_to_32 are
mixed in with the TCG helpers, but they shouldn't, as they
are needed for KVM too.
kvm_arch_get_registers()
{
if (!is_a64(env)) {
aarch64_sync_64_to_32(env
this function is used for kvm too, add it to the
cpu-common module.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 11 +++
target/arm/tcg/helper.c | 11 ---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/arm/cpu-common.c b/target/arm/cpu-com
this first armv7m one should go away with proper
configuration changes (only enabling possible boards for KVM).
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/tcg-stubs.c | 16
target/arm/tcg/meson.build | 3 +++
2 files changed, 19 insertions
In the ARM CPU class hierarchy, the ancestor TYPE_ARM_CPU is fundamentally
a 32 bit CPU Class. The child TYPE_AARCH64_CPU overrides the class to
make it a 64 bit CPU Class.
Explicitly put the 32bit CPU Class implementation in a cpu32.c,
along with the 32bit CPU Class model registration function.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-common.c | 42 +
target/arm/tcg/helper.c | 41
2 files changed, 42 insertions(+), 41 deletions(-)
diff --git a/target/arm/cpu-common.
the exception code in tcg/ needs some adjustment before being exposed
to KVM-only builds. We need to call arm_rebuild_hflags only when
TCG is enabled, or we will error out.
The direct call to helper_rebuild_hflags_a64(env, new_el) will not
be possible when extracting out to common code,
it seems s
we will need this for KVM too, especially for Nested support.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-common.c | 68 +
target/arm/tcg/helper.c | 68 -
2 files changed, 68 ins
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 100
target/arm/cpu-user.c | 5 ++
target/arm/tcg/helper.c | 100
3 files changed, 105 insertions(+), 100 deletions(-)
diff --git a/target/arm/cpu-sy
Signed-off-by: Claudio Fontana
---
target/arm/cpu32.h | 2 +-
target/arm/cpu.c | 225 -
target/arm/cpu32.c | 85 -
target/arm/cpu64.c | 142
4 files changed, 227 insertions(+), 227 deletions(-)
diff --g
move the TCGCPUOps interface to tcg/tcg-cpu.c
in preparation for the addition of the TCG accel-cpu class.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h | 1 -
target/arm/internals.h | 5 -
target/arm/tcg/tcg-cpu.h | 6 +
target/arm/cpu-sysemu.c| 4 +
target/arm/
it is required by arch-dump.c and cpu.c, so apparently
we need this for KVM too
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 43 +
target/arm/tcg/helper.c | 33 ---
2 files changed, 43 insertions(+), 33 deletions
we need this for KVM too.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-sysemu.c | 62 +++
target/arm/cpu-user.c | 5
target/arm/tcg/helper.c | 64 -
3 files changed, 67 insert
Signed-off-by: Claudio Fontana
---
target/arm/tcg/helper.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index aaa307daca..4e027b98fe 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -1625,13
and adapt the code including the header references,
and trace-events / trace.h
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
meson.build | 2 +-
target/arm/cpu.h | 2 +-
target/arm/{ => kvm}/kvm-consts.h | 0
target/arm/{ => kvm}/kvm_ar
after moving the code of fp_exception_el to a sysemu-only module,
we can remove the #ifndef CONFIG_USER_ONLY.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
index 128616d90d..0d80a0
Cortex-A15 is the only ARM cpu class we need in KVM too.
We will be able to move it to tcg/ once the board code and configurations
are fixed.
Signed-off-by: Claudio Fontana
---
target/arm/cpu32.h | 4 +++
target/arm/cpu32.c | 73
target/arm/cpu_
After this patch it is possible to build only kvm:
./configure --disable-tcg --enable-kvm
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-sysemu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/arm/cpu-sysemu.c b/target/
before refactoring the exception code, fix the style of the
functions being moved.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/helper.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/target/arm/tcg/helper.c b/target/ar
move the module containing cpu models definitions
for 32bit TCG-only CPUs to tcg/ and rename it for clarity.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/{cpu_tcg.c => tcg/tcg-cpu-models.c} | 9 +
target/arm/meson.build | 4
t
The QEMU PSCI implementation is not used for KVM,
we do not need the kvm constants header.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/arm-powerctl.h | 2 --
target/arm/psci.c | 1 -
2 files changed, 3 deletions(-)
diff --git a/target/arm/arm-powerctl.h
Skip the test_device_intro_concrete for now for ARM KVM-only build,
as on ARM we currently build devices for ARM that are not
compatible with a KVM-only build.
We can remove this workaround when we fix this in KConfig etc,
and we only list and build machines that are compatible with KVM
for KVM-on
There might be more than just KVM and TCG in the future,
so where appropriate, replace broad "else" statements
with the appropriate if (accel_enabled()) check.
Also invert some checks for !kvm_enabled() or !tcg_enabled()
where it seems appropriate to do so.
Note that to make qtest happy we need t
for "all" builds (tcg + kvm), we want to avoid doing
the psci and semihosting checks if tcg is built-in, but not enabled.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/target/arm/cpu
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
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