The i82378 has 2 output IRQs: "INT" and "NMI".
We do not model the NMI, so simplify I82378State by
removing the unused IRQ. To avoid keeping an array of
one element, remove the array and rename the variable.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/i82378.c | 6 +++---
1 file changed, 3
When the i82378 model was added in commit a04ff940974 ("prep:
Add i82378 PCI-to-ISA bridge emulation") the i8259 model was
not yet QOM'ified. This happened later in commit 747c70af78f
("i8259: Convert to qdev").
Instead of creating an input IRQ with qemu_allocate_irqs()
to pass it as output IRQ of
Named IRQs are easier to understand in the monitor.
Name the single output interrupt as 'intr'.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/i82378.c | 2 +-
hw/ppc/prep.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c
index 2a2ff
Named IRQs are easier to understand in the monitor.
Name the single output interrupt as 'intr'.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/vt82c686.c | 2 +-
hw/mips/fuloong2e.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
i
Instead of creating an input IRQ with qemu_allocate_irqs()
to pass it as output IRQ of the PIC, with its handler simply
dispatching into the "intr" output IRQ, simplify by directly
connecting the PIC to the "intr" named output.
Fixes: 3dc31cb8490 ("vt82c686: Move creation of ISA devices to the ISA
We locally create an input IRQ with qemu_allocate_irqs() to
pass it as output IRQ of the PIC, but its handler simply dispatch
into another of our output IRQ ("intr" output).
Simplify by directly connecting the PIC output to our "intr"
output.
This fixes when using QEMU built with --enable-sanitiz
On 3/18/21 4:09 PM, Connor Kuehl wrote:
A patch was recently applied that touched up some error messages that
pertained to key names like 'node-name'. The trouble is it only updated
tests/qemu-iotests/051.pc.out and not tests/qemu-iotests/051.out as
well.
Do that now.
Fixes: 785ec4b1b9 ("block:
On 3/1/21 12:28 PM, Connor Kuehl wrote:
The contents of this patch were initially developed and posted by Han
Han[1], however, it appears the original patch was not applied. Since
then, the relevant documentation has been moved and adapted to a new
format.
I've taken most of the original wording
On Tue, Mar 23, 2021 at 04:51:27PM +0100, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Cc: David Gibson
> Cc: Greg Kurz
> Cc: qemu-...@nongnu.org
> Cc: Mark Cave-Ayland
> Cc: Hervé Poussineau
> Cc: Cédric Le Goater
> Cc: BALATON Zoltan
> ---
> meson.build
On 3/24/21 12:00 AM, Greg Kurz wrote:
> Cc'ing David
>
> On Tue, 23 Mar 2021 17:48:36 +0100
> Thomas Huth wrote:
>
>>
>> In case anyone is interested in fixing those, there are two regressions with
>> qemu-system-ppc64 in the current master branch:
>>
>> $ ./qemu-system-ppc64 -M ppce500 -device
The guys on the Fedora side seem to have found the patch to fix this:
https://bugzilla.redhat.com/show_bug.cgi?id=1941652#c6
Apparently it will go upstream in Linux 5.11, but earlier versions also
need the fix, specifically 5.9 and 5.10
Thank you!
** Bug watch added: Red Hat Bugzilla #1941652
On Wed, 24 Mar 2021, Philippe Mathieu-Daudé wrote:
Instead of creating an input IRQ with qemu_allocate_irqs()
to pass it as output IRQ of the PIC, with its handler simply
dispatching into the "intr" output IRQ, simplify by directly
connecting the PIC to the "intr" named output.
I think I've tri
On Tue, 23 Mar 2021 at 21:57, Markus Armbruster wrote:
>
> The following changes since commit 9950da284fa5e2ea9ab57d87e05b693fb60c79ce:
>
> Merge remote-tracking branch
> 'remotes/alistair/tags/pull-riscv-to-apply-20210322-2' into staging
> (2021-03-23 15:30:46 +)
>
> are available in the
> -Original Message-
> From: Markus Armbruster
> Sent: Tuesday, March 23, 2021 5:55 PM
> To: Zhang, Chen
> Cc: Lukas Straub ; Li Zhijian
> ; Jason Wang ; qemu-
> dev ; Dr. David Alan Gilbert
> ; Zhang Chen
> Subject: Re: [PATCH V4 2/7] qapi/net.json: Add L4_Connection definition
>
>
Public bug reported:
Hi,
I had this working before, but in the latest version of QEMU (built from
master), when I try to install Corsair iCUE, and it gets to the driver
install point => my Windows 10 VM just reboots! I would be happy to
capture logs, but ... what logs exist for an uncontrolled re
cc th...@redhat.com and berra...@redhat.com
Please review, thanks
在 2021/3/20 1:04, huang...@chinatelecom.cn 写道:
From: Hyman
Guestperf tool does not cover the multifd-enabled migration
currently, it is worth supporting so that developers can
analysis the migration performance with all kinds o
On Tue, Mar 23, 2021, at 9:56 PM, Philippe Mathieu-Daudé wrote:
> Hi Huacai,
>
> We are going to tag QEMU v6.0-rc0 today.
>
> I only have access to a 64-bit MIPS in little-endian to
> test KVM.
>
> Can you test the other configurations please?
> - 32-bit BE
> - 32-bit LE
> - 64-bit BE
+syq
A
On Tue, Mar 23, 2021 at 12:43:33PM -0600, Richard Henderson wrote:
> It will be stored in tb->flags, which is also uint32_t,
> so let's use the correct size.
>
> Reviewed-by: Cédric Le Goater
> Reviewed-by: David Gibson
> Signed-off-by: Richard Henderson
Applied to ppc-for-6.0.
> ---
> targ
On Tue, Mar 23, 2021 at 12:43:32PM -0600, Richard Henderson wrote:
> Copying flags directly from msr has drawbacks: (1) msr bits
> mean different things per cpu, (2) msr has 64 bits on 64 cpus
> while tb->flags has only 32 bits.
>
> Create a enum to define these bits. Document the origin of each
On Tue, Mar 23, 2021 at 12:43:35PM -0600, Richard Henderson wrote:
> Perform the test against FSCR_SCV at runtime, in the helper.
>
> This means we can remove the incorrect set against SCV in
> ppc_tr_init_disas_context and do not need to add an HFLAGS bit.
>
> Signed-off-by: Richard Henderson
On Tue, Mar 23, 2021 at 12:43:31PM -0600, Richard Henderson wrote:
> Extract post_load_update_msr to share between cpu_load_old
> and cpu_post_load in updating the msr.
>
> Suggested-by: Cédric Le Goater
> Signed-off-by: Richard Henderson
Applied to ppc-for-6.0.
> ---
> target/ppc/machine.c |
On Tue, Mar 23, 2021 at 12:43:39PM -0600, Richard Henderson wrote:
> In save_user_regs, there are two bugs where we OR in a bit number
> instead of the bit, clobbering the low bits of MSR. However:
>
> The MSR_VR and MSR_SPE bits control the availability of the insns.
> If the bits were not alrea
On Tue, Mar 23, 2021 at 12:43:34PM -0600, Richard Henderson wrote:
> Because these bits were not in hflags, the code generated
> for single-stepping on BookE was essentially random.
> Recompute hflags when storing to dbcr0.
>
> Reviewed-by: David Gibson
> Signed-off-by: Richard Henderson
Applie
On Tue, Mar 23, 2021 at 12:43:36PM -0600, Richard Henderson wrote:
> Because this bit was not in hflags, the privilege check
> for tlb instructions was essentially random.
> Recompute hflags when storing to LPCR.
>
> Reviewed-by: David Gibson
> Signed-off-by: Richard Henderson
Applied to ppc-fo
On Tue, Mar 23, 2021 at 12:43:38PM -0600, Richard Henderson wrote:
> We weren't recording MSR_GS in hflags, which means that BookE
> memory accesses were essentially random vs Guest State.
>
> Instead of adding this bit directly, record the completed mmu
> indexes instead. This makes it obvious t
On Tue, Mar 23, 2021 at 12:43:37PM -0600, Richard Henderson wrote:
> Nothing within the translator -- or anywhere else for that
> matter -- checks MSR_SA or MSR_AP on the 602. This may be
> a mistake. However, for the moment, we need not record these
> bits in hflags.
And frankly, even if it's w
On Tue, Mar 23, 2021 at 12:43:40PM -0600, Richard Henderson wrote:
> Verify that hflags was updated correctly whenever we change
> cpu state that is used by hflags.
>
> Signed-off-by: Richard Henderson
Applied to ppc-for-6.0, thanks.
> ---
> target/ppc/cpu.h | 5 +
> target/ppc/he
exec-vary.c is about variable page size handling,
rename it page-vary.c. Currently this file is target
specific (built once for each target), comment this.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210322112427.4045204-2-f4...@amsat.org>
[rth: Update MAINTAINERS]
Signed-off-by: Richard
In the next commit we will extract the generic code out of
page-vary.c, only keeping the target specific code. Both
files will use the same TargetPageBits structure, so make
its declaration in a shared header.
As the common header can not use target specific types,
use a uint64_t to hold the page
In bbc17caf81f, we used an alias attribute to allow target_page
to be declared const, and yet be initialized late.
This fails when using LTO with several versions of gcc.
The compiler looks through the alias and decides that the const
variable is statically initialized to zero, then propagates tha
The following changes since commit 266469947161aa10b1d36843580d369d5aa38589:
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-23' into
staging (2021-03-23 22:28:58 +)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tc
On Tue, Mar 23, 2021 at 02:10:22PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 3/22/21 10:12 PM, David Gibson wrote:
> > On Fri, Mar 12, 2021 at 05:07:36PM -0300, Daniel Henrique Barboza wrote:
> > > Hi,
> > >
> > > This series adds 2 new QAPI events, DEVICE_NOT_DELETED and
> > > DEVICE_UNPLU
There's a change in mprotect() behaviour [1] in the latest macOS
on M1 and it's not yet clear if it's going to be fixed by Apple.
As a short-term fix, ignore failures setting up the guard pages.
[1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f
Signed-off-by: Richard Henderso
On Tue, Mar 23, 2021 at 02:01:27PM +0100, BALATON Zoltan wrote:
> On Tue, 23 Mar 2021, David Gibson wrote:
> > On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> > > Add new machine called pegasos2 emulating the Genesi/bPlan Pegasos II,
> > > a PowerPC board based on the Marvell MV64
The rw portion of the buffer is the only one in which overruns
can be generated. Allow the rx portion to be more completely
covered by huge pages.
Signed-off-by: Richard Henderson
Tested-by: Roman Bolshakov
Reviewed-by: Roman Bolshakov
Message-Id: <20210320165720.1813545-2-richard.hender...@li
On Tue, Mar 23, 2021 at 02:31:07PM +0100, BALATON Zoltan wrote:
> On Tue, 23 Mar 2021, David Gibson wrote:
> > On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
[snip]
> > > +static void setup_mem_windows(MV64361State *s, uint32_t val)
> > > +{
> > > +MV64361PCIState *p;
> > > +
On Tue, Mar 23, 2021 at 11:04:03AM -0600, Richard Henderson wrote:
> On 3/22/21 5:54 PM, David Gibson wrote:
> > On Mon, Mar 22, 2021 at 10:55:46AM -0600, Richard Henderson wrote:
> > > On 3/21/21 9:52 PM, David Gibson wrote:
> > > > > +/*
> > > > > + * Bits for env->hflags.
> > > > > + *
> > > > >
Jiaxun Yang 于2021年3月24日周三 上午9:29写道：
>
>
>
> On Tue, Mar 23, 2021, at 9:56 PM, Philippe Mathieu-Daudé wrote:
> > Hi Huacai,
> >
> > We are going to tag QEMU v6.0-rc0 today.
> >
> > I only have access to a 64-bit MIPS in little-endian to
> > test KVM.
> >
> > Can you test the other configurations pl
Hi Peter,
On 2021/3/23 22:34, Peter Xu wrote:
> Keqian,
>
> On Tue, Mar 23, 2021 at 02:40:43PM +0800, Keqian Zhu wrote:
The second question is that you observed longer migration time (55s->73s)
when guest
has 24G ram and dirty rate is 800M/s. I am not clear about the reason. As
>
On Tue, Mar 23, 2021 at 09:47:23AM -0400, Shivaprasad G Bhat wrote:
> The subsequent patches add definitions which tend to
> get the compilation to cyclic dependency. So, prepare
> with forward declarations, move the defitions and clean up.
>
> Signed-off-by: Shivaprasad G Bhat
> ---
> hw/ppc/sp
On Tue, Mar 23, 2021 at 09:47:38AM -0400, Shivaprasad G Bhat wrote:
> The patch adds support for the SCM flush hcall for the nvdimm devices.
> To be available for exploitation by guest through the next patch.
>
> The hcall expects the semantics such that the flush to return
> with H_BUSY when the
On Tue, Mar 23, 2021 at 09:47:55AM -0400, Shivaprasad G Bhat wrote:
> The patch adds the 'sync-dax' property to the nvdimm device.
>
> When the sync-dax is 'off', the device tree property
> "hcall-flush-required" is added to the nvdimm node which makes the
> guest to issue H_SCM_FLUSH hcalls to re
On 22/03/2021 16:44, David Gibson wrote:
On Thu, Feb 25, 2021 at 02:23:35PM +1100, Alexey Kardashevskiy wrote:
There is no H_REGISTER_PROCESS_TABLE, it is H_REGISTER_PROC_TBL handler
for which is still called h_register_process_table() though.
Signed-off-by: Alexey Kardashevskiy
Applied t
On 23/03/2021 20.40, Dr. David Alan Gilbert wrote:
* huang...@chinatelecom.cn (huang...@chinatelecom.cn) wrote:
From: Hyman Huang(黄勇)
when execute the following test command:
$ ./guestperf-batch.py --auto-converge \
--auto-converge-step {percent} ...
test aborts and error message be throw
On 23/03/2021 16.51, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
Cc: Cornelia Huck
Cc: Thomas Huth
Cc: qemu-s3...@nongnu.org
---
meson.build | 2 ++
pc-bios/meson.build | 9 +++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/meson.b
John Snow writes:
> On 3/23/21 5:40 AM, Markus Armbruster wrote:
>> check_name_str() masks leading digits when passed enum_member=True.
>> Only check_enum() does. Lift the masking into check_enum().
>> Signed-off-by: Markus Armbruster
>> ---
>> scripts/qapi/expr.py | 23 ++
John Snow writes:
> On 3/23/21 5:40 AM, Markus Armbruster wrote:
>> Naming rules differ for the various kinds of names. To prepare
>> enforcing them, define functions to check them: check_name_upper(),
>> check_name_lower(), and check_name_camel(). For now, these merely
>> wrap around check_nam
在 2021/3/24 13:42, Thomas Huth 写道:
On 23/03/2021 20.40, Dr. David Alan Gilbert wrote:
* huang...@chinatelecom.cn (huang...@chinatelecom.cn) wrote:
From: Hyman Huang(黄勇)
when execute the following test command:
$ ./guestperf-batch.py --auto-converge \
--auto-converge-step {percent} ...
On 23/03/2021 17.52, Alex Bennée wrote:
Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.
Signed-off-by: Alex Bennée
Message-Id: <20210320133706.21475-10-alex.ben...@linaro.org>
---
v2
- expand test as suggested by Richard
---
.../multiarch/
On 19/03/2021 09.07, huang...@chinatelecom.cn wrote:
From: Hyman Huang(黄勇)
when executing the following scripts, it throw error message:
$ ./scripts/get_maintainer.pl -f tests/migration/guestperf.py
get_maintainer.pl: No maintainers found, printing recent contributors.
get_maintainer.pl: Do not
John Snow writes:
> On 3/23/21 5:40 AM, Markus Armbruster wrote:
>> Event names should be ALL_CAPS with words separated by underscore.
>> Enforce this. The only offenders are in tests/. Fix them. Existing
>> test event-case covers the new error.
>> Signed-off-by: Markus Armbruster
>> ---
>>
在 2021/3/23 上午9:56, Cindy Lu 写道:
Add configure notifier support in virtio and related driver
When peer is vhost vdpa, setup the configure interrupt function
vhost_net_start and release the resource when vhost_net_stop
So this patch doesn't complie, please fix.
Signed-off-by: Cindy Lu
--
Since commit fa4518741e (target-i386: Rename struct XMMReg to ZMMReg),
CPUX86State.xmm_regs[] has already been extended to 512bit to support
AVX512.
Also, other qemu level supports for AVX512 registers are there for
years.
But in x86_cpu_dump_state(), still only dump XMM registers no matter
YMM/ZMM
在 2021/3/23 上午9:56, Cindy Lu 写道:
Add call back function for configure interrupt.
Set the notifier's fd to the kernel driver when vdpa start.
also set -1 while vdpa stop. then the kernel will release
the related resource
Signed-off-by: Cindy Lu
---
hw/virtio/trace-events| 2 ++
在 2021/3/23 上午9:56, Cindy Lu 写道:
Add support for configure interrupt, use kvm_irqfd_assign and set the
gsi to kernel. When the configure notifier was eventfd_signal by host
kernel, this will finally inject an msix interrupt to guest
Signed-off-by: Cindy Lu
---
hw/virtio/virtio-pci.c | 171 +
Patchew URL:
https://patchew.org/QEMU/1616567465-153141-1-git-send-email-robert...@linux.intel.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1616567465-153141-1-git-send-email-robert...@linux.intel.com
Subject: [
"Dr. David Alan Gilbert" writes:
> * Markus Armbruster (arm...@redhat.com) wrote:
>> "Zhang, Chen" writes:
>>
>> >> -Original Message-
>> >> From: Markus Armbruster
>> [...]
>> >> Naming the argument type L4_Connection is misleading.
>> >>
>> >> Even naming the match arguments L4_Conn
Replaced the allocation and deallocation of fuse_session structs
from calloc() and free() calls to g_try_new0() and g_free().
Signed-off-by: Mahmoud Mandour
---
tools/virtiofsd/fuse_lowlevel.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/virtiofsd/fuse_lowlevel
And gladly this was only added in >=5.9 and we have Groovy (5.8) and
Hirsute (5.11) so only the Hirsute kernel is needed to adapt, but
further backports are not needed.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.laun
Markus Armbruster writes:
> "Dr. David Alan Gilbert" writes:
[...]
>> I think there should also beb
>> a separate type that represents an IP address+port, so that what you end
>> up with is:
>>
>> IPFlowSpec
>> ID
>> Protocol
>> Source
>>
@Sadoon - yes, that is the same fix that Laurent pointed to a few hours
before.
@Frank - the kernel I had before was 5.11.0-11-generic (failing). I've
tested "5.11.0-13-generic #14~lp1920784" from your PPA and can confirm
that this fixes the issue.
Thanks Laurent for identifying the fix and thank
Zhang Chen writes:
> Add L4_Connection struct for other QMP commands.
> Except protocol field is necessary, other fields are optional.
>
> Signed-off-by: Zhang Chen
> ---
> qapi/net.json | 26 ++
> 1 file changed, 26 insertions(+)
>
> diff --git a/qapi/net.json b/qapi/ne
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