From: David Edmondson
If a new bitmap entry is allocated, requiring the entire block to be
written, avoiding leaking the buffer allocated for the block should
the write fail.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: David Edmondson
Message-Id: <20210309144015.557477-2-david.edmond...
From: David Edmondson
Test that downgrading an rwlock does not result in a failure to
schedule coroutines queued on the rwlock.
The diagram associated with test_co_rwlock_downgrade() describes the
intended behaviour, but what was observed previously corresponds to:
| c1 | c2 | c3
An invariant of the current rwlock is that if multiple coroutines hold a
reader lock, all must be runnable. The unlock implementation relies on
this, choosing to wake a single coroutine when the final read lock
holder exits the critical section, assuming that it will wake a
coroutine attempting to
On Wednesday, 2021-03-17 at 19:00:12 +01, Paolo Bonzini wrote:
> Test that rwlock upgrade is fair, and readers go back to sleep if a writer
> is in line.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: David Edmondson
> ---
> tests/unit/test-coroutine.c | 62
On Thu, Mar 11, 2021 at 5:29 AM Georg Kotheimer
wrote:
>
> The current two-stage lookup detection in riscv_cpu_do_interrupt falls
> short of its purpose, as all it checks is whether two-stage address
> translation either via the hypervisor-load store instructions or the
> MPRV feature would be all
On 3/17/21 2:17 AM, BALATON Zoltan wrote:
> To allow reusing ISA bridge emulation for vt8231_isa move the device
> state of vt82c686b_isa emulation in an abstract via_isa class. This
> change breaks migration back compatibility but this is not an issue
> for Fuloong2E machine which is not versioned
On Tue, 16 Mar 2021 at 10:50, Gerd Hoffmann wrote:
>
> The following changes since commit 2615a5e433aeb812c300d3a48e1a88e1303e2339:
>
> Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-reque=
> st' into staging (2021-03-15 19:23:00 +)
>
> are available in the Git reposit
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/a32-uncond.decode| 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{ => tcg}/m-nocp.decode
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/meson.build | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 0bd4e9d954..3b4146d079 100644
--- a/target/arm/tcg/meson.build
+++
Signed-off-by: Claudio Fontana
---
target/arm/cpregs.h | 54 ++---
target/arm/cpregs.c | 60 ++
target/arm/tcg/cpregs.c | 253 ++--
3 files changed, 241 insertions(+), 126 deletions(-)
diff --git a/target/arm/cpregs.h b/target/arm/cpregs.
We do not move psci.c to tcg/ because we expect other
hypervisors to use it (waiting for HVF enablement).
Signed-off-by: Claudio Fontana
Cc: Alexander Graf
---
target/arm/meson.build | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 01
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
[claudio: moved vec_internal.h and op_addsub.h to tcg/ too]
Signed-off-by: Claudio Fontana
---
meson.build | 1 +
target/arm/{ => tcg}/op_addsub.h | 0
target/arm/tcg/trace.h | 1 +
tar
Signed-off-by: Claudio Fontana
---
target/arm/tcg/meson.build| 3 +++
target/arm/tcg/sysemu/meson.build | 3 +++
target/arm/tcg/user/meson.build | 3 +++
3 files changed, 9 insertions(+)
create mode 100644 target/arm/tcg/sysemu/meson.build
create mode 100644 target/arm/tcg/user/meson.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-mmu.h| 3 +-
target/arm/cpu-mmu-sysemu.c | 149
2 files changed, 101 insertions(+), 51 deletions(-)
diff --git a/target/arm/cpu-mmu.h b/target/arm/cpu-mmu.h
index fdedc8fb92..01b060613a 100644
--- a/
of note, cpreg lists were previously initialized by TCG first,
and then thrown away and replaced with the data coming from KVM.
Now we just initialize once, either for TCG or for KVM.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c | 32 ++--
target/arm/kvm.c
Here a new version of the series that enables kvm-only builds.
The goal here is to enable the KVM-only build, but there is
some additional cleanup too.
In this iteration we add more cleanups and refactoring:
restriction of ELFCLASS64 to TARGET_AARCH64,
split of exception code to its own module,
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 41 +
target/arm/tcg/helper.c | 29 -
target/arm/meson.build | 1 +
3 files changed, 42 insertions(+), 29 deletions(-)
create mode 100644 target/arm/cpu-common.c
di
we need as a result to move switch_mode too,
so we put an implementation into cpu_user and cpu_sysemu.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h| 2 +
target/arm/cpu-common.c | 192 +++
target/arm/cpu-sysemu.c | 30 ++
target/arm/cpu-user.
this should go away once the configuration and hw/arm is clean
Signed-off-by: Claudio Fontana
---
hw/arm/boot.c | 5 -
target/arm/arm-powerctl.c | 8 +---
target/arm/kvm/helper-stubs.c | 6 ++
3 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/hw/arm/
we need this for KVM too.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 60
target/arm/cpu-user.c | 5
target/arm/tcg/helper.c | 61 -
3 files changed, 65 insertions(+), 61 deletions(-)
diff
and arm_phys_excp_target_el since it is tied up inside the
same #ifdef block.
aarch64_sync_32_to_64 and aarch64_sync_64_to_32 are
mixed in with the TCG helpers, but they shouldn't, as they
are needed for KVM too.
kvm_arch_get_registers()
{
if (!is_a64(env)) {
aarch64_sync_64_to_32(env
move work is needed later on to split things into
tcg-specific portions and kvm-specific portions of this
Signed-off-by: Claudio Fontana
---
target/arm/internals.h | 8 ++-
target/arm/cpu-sysemu.c | 105
target/arm/cpu.c| 83 --
On 3/12/21 7:28 PM, Philippe Mathieu-Daudé wrote:
> The flash mmio region is exposed as an AddressSpace.
> AddressSpaces must not be sysbus-mapped, therefore map
> the region using an alias.
>
> Signed-off-by: Philippe Mathieu-Daudé
That does the trick but you need an extra change in the model.
The QEMU PSCI implementation is not used for KVM,
we do not need the kvm constants header.
Signed-off-by: Claudio Fontana
---
target/arm/arm-powerctl.h | 2 --
target/arm/psci.c | 1 -
2 files changed, 3 deletions(-)
diff --git a/target/arm/arm-powerctl.h b/target/arm/arm-powerctl.h
ind
at least the armv7m one should go away with proper
configuration changes (only enabling possible boards for KVM).
Signed-off-by: Claudio Fontana
---
target/arm/kvm/helper-stubs.c | 27 +++
target/arm/kvm/meson.build| 3 +++
target/arm/meson.build| 1 +
3 fil
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-common.c | 42 +
target/arm/tcg/helper.c | 41
2 files changed, 42 insertions(+), 41 deletions(-)
diff --git a/target/arm/cpu-common.
sve_tests_sve_max_vq_8,
sve_tests_sve_off,
test_query_cpu_model_expansion
all require TCG to run. Skip them for KVM-only builds.
Signed-off-by: Claudio Fontana
---
tests/qtest/arm-cpu-features.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tests/qtest/arm-cpu-features.c
cpu.c,
cpu32.c,
cpu64.c,
tcg/sysemu/tcg-cpu.c,
all need a good cleanup when it comes to included header files.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c| 8 ++--
target/arm/cpu32.c | 14 --
target/arm/cpu64.c | 6 --
targ
it is required by arch-dump.c and cpu.c, so apparently
we need this for KVM too
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 43 +
target/arm/tcg/helper.c | 33 ---
2 files changed, 43 insertions(+), 33 deletions
provide helper functions there to initialize 32bit models,
and export the a15 cpu model.
We still need to keep around a15 until we sort out the board configurations.
cpu.c will continue to contain the common parts between
32 and 64.
Note that we need to build cpu32 also for TARGET_AARCH64,
becau
test is TCG-only.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
---
tests/qtest/bios-tables-test.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index e020c83d2a..bd7b85909c 100644
--- a/tests/qtest/bios-ta
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c | 4
target/arm/kvm/kvm-cpu.c | 1 +
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 3d6501c2c5..ac01fa0bae 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -786,10 +786
cpu-vfp.c: vfp_get_fpsr and vfp_set_fpsr are needed also for KVM,
so create a new cpu-vfp.c
tcg/cpu-vfp.c: vfp_get_fpscr_from_host and vv are TCG-only, so we
move the implementation to tcg/cpu-vfp.c
kvm/helper-stubs.c: vfp_get_fpscr_from_host and vv stubs for KVM.
Signe
After this patch it is possible to build only kvm:
./configure --disable-tcg --enable-kvm
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
index eb928832a
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
start by moving minimal init and realizefn code.
Signed-off-by: Claudio Fontana
---
target/arm/internals.h | 1 -
target/arm/cpu-sysemu.c| 32 --
target/arm/cpu.c | 43 +++--
target/arm/kvm/kvm-cpu.c | 122 +
target/arm/
this function is used for kvm too, add it to the
cpu-common module.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 11 +++
target/arm/tcg/helper.c | 11 ---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/arm/cpu-common.c b/target/arm/cpu-com
move exception code out of tcg/
as we need part of it for KVM too.
put the exception code into separate cpu modules as appropriate,
including:
cpu-sysemu.c
tcg/tcg-cpu.c
tcg/sysemu/tcg-cpu.c
to avoid naming confusion with the existing cpu_tcg.c,
containg cpu models definitions for 32bit TCG-only
move the call for sysemu specifically in machine_run_board_init,
mirror the calling sequence for user mode too.
Suggested-by: Paolo Bonzini
Signed-off-by: Claudio Fontana
---
bsd-user/main.c | 2 +-
hw/core/machine.c | 1 +
linux-user/main.c | 2 +-
softmmu/vl.c | 1 -
4 files changed, 3
This reverts commit 6e937ba7f8fb90d66cb3781f7fed32fb4239556a
This change breaks quickly at startup, as all interfaces in boards
are checked in vl.c in select_machine():
{
GSList *machines = object_class_get_list(TYPE_MACHINE, false);
}
In order to restrict v8M IDAU to TCG,
we need to first disa
Signed-off-by: Claudio Fontana
---
target/arm/cpu-mmu.c| 95 +
target/arm/tcg/helper.c | 95 -
2 files changed, 95 insertions(+), 95 deletions(-)
diff --git a/target/arm/cpu-mmu.c b/target/arm/cpu-mmu.c
index f46
start by moving minimal init and realizefn code.
Signed-off-by: Claudio Fontana
Cc: Paolo Bonzini
---
target/arm/tcg/tcg-cpu.h| 4 ++-
target/arm/cpu.c| 38 +++
target/arm/tcg/sysemu/tcg-cpu.c | 27 +++
target/arm/tcg/tcg-cpu-mode
and adapt the code including the header references,
and trace-events / trace.h
Signed-off-by: Claudio Fontana
---
meson.build | 2 +-
target/arm/cpu.h | 2 +-
target/arm/{ => kvm}/kvm-consts.h | 0
target/arm/{ => kvm}/kvm_arm.h| 0
target/arm/kvm/t
while on x86 all CPU classes can use the same set of TCGCPUOps,
on ARM the right accel behavior depends on the type of the CPU.
So we need a way to specialize the accel behavior according to
the CPU. Therefore, add a second initialization, after the
accel_cpu->cpu_class_init, that allows to do thi
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/cpu-sysemu.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
index 126263dbf4..eb928832a9 100644
--- a/target/arm/cpu-sysemu.
we need to be careful not to use
if (tcg_enabled())
here, because of the VMSTATE definitions in machine.c,
which are only protected by CONFIG_TCG, and thus
it would break the --enable-tcg --enable-kvm build.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/tcg-cpu.h| 1 +
target/arm/
There might be more than just KVM and TCG in the future,
so where appropriate, replace broad "else" statements
with the appropriate if (accel_enabled()) check.
Also invert some checks for !kvm_enabled() or !tcg_enabled()
where it seems appropriate to do so.
Note that to make qtest happy we need t
when TARGET_AARCH64 is not defined, it is helpful to make
is_aa64() and arm_el_is_aa64 macros defined to "false".
This way we can make more code TARGET_AARCH64-only.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h| 37 -
target/arm/cpu-mmu-sys
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
all the features in arm_cpu_finalize_features are actually
TARGET_AARCH64-only, since KVM is now only supported on 64bit.
Therefore move the function to cpu64, and rename it to
aarch64_cpu_finalize_features.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h | 3 +-
target/arm/kvm/kvm
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