Hello all,
This is a continuation of some of the questions I had about the clock
record-replay handling process in QEMU. My previous post is here -
https://www.mail-archive.com/qemu-discuss@nongnu.org/msg06231.html
My experiment involves two steps. In the first step, I start QEMU in KVM
mode, s
Connect one shakti uart to the shakti_c machine.
Signed-off-by: Vijai Kumar K
---
hw/riscv/shakti_c.c | 7 +++
include/hw/riscv/shakti_c.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index e96436a3bf..07cc42a380 100644
--- a/hw/ris
C-Class is a member of the SHAKTI family of processors from Indian
Institute of Technology - Madras(IIT-M).
It is an extremely configurable and commercial-grade 5-stage in-order
core supporting the standard RV64GCSUN ISA extensions.
Add support for emulating Shakti SoC based on C-class running on
This series adds initial suppport for emulating shakti soc[1] running
on arty 100T.
Shakti SoC uses Shakti C class core[2] and Shakti Uart[3]
[1] https://gitlab.com/shaktiproject/cores/shakti-soc/-/blob/master/README.rst
[2] https://gitlab.com/shaktiproject/cores/c-class/-/blob/master/README.md
[
The Detailed Timing Descriptor has only 12 bits to store the
resolution. This limits the guest to 4095 pixels.
This patch adds support for the DisplayID extension, that has 2 full
bytes for that purpose, thus allowing 5k resolutions and above.
Based-on: <20210303152948.59943-2-akihiko.od...@gmail
This is the initial implementation of Shakti UART.
TX tested and works fine. RX is untested.
Signed-off-by: Vijai Kumar K
---
MAINTAINERS | 2 +
hw/char/meson.build | 1 +
hw/char/shakti_uart.c | 204 ++
hw/char/trace-event
2021年3月14日(日) 18:12 Konstantin Nazarov :
>
> The Detailed Timing Descriptor has only 12 bits to store the
> resolution. This limits the guest to 4095 pixels.
>
> This patch adds support for the DisplayID extension, that has 2 full
> bytes for that purpose, thus allowing 5k resolutions and above.
>
On Fri, Mar 12, 2021 at 11:39:49PM +0100, Igor Mammedov wrote:
> happens on current master,
>
> to reproduce start
> ./x86_64-softmmu/qemu-system-x86_64 -enable-kvm -m 1g -M pc -vnc localhost:0 \
> -snapshot -cdrom Fedora-Workstation-Live-x86_64-33-1.2.iso
>
> connect to guest using 'Remote
On 13/03/2021 16:54, Philippe Mathieu-Daudé wrote:
From: Heecheol Yang
Add some of these features for AVR GPIO:
- GPIO I/O : PORTx registers
- Data Direction : DDRx registers
- DDRx toggling : PINx registers
Following things are not supported yet:
- MCUR registers
Signed-off-by:
On Thu, 11 Mar 2021 at 22:21, Laurent Vivier wrote:
>
> The following changes since commit f4abdf32714d1845b7c01ec136dd2b04c2f7db47:
>
> Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-up=
> dates-100321-2' into staging (2021-03-11 16:20:58 +)
>
> are available in th
On Fri, 12 Mar 2021 at 06:16, Jason Wang wrote:
>
> The following changes since commit f4abdf32714d1845b7c01ec136dd2b04c2f7db47:
>
> Merge remote-tracking branch
> 'remotes/stsquad/tags/pull-testing-docs-xen-updates-100321-2' into staging
> (2021-03-11 16:20:58 +)
>
> are available in the
Thanks for the test case - looks like the problem occurs because a
command hasn't been submitted before initiating a DMA transfer, and TC
is set to a value higher than the size of cmdfifo. Can you confirm that
the following fix works for you?
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 507ab3
I no longer work for IBM so I can't be sure, but I'm not aware of virtio
support in AIX 7.1.
As said in another comment, the "Unimplemented SPAPR hcall 0x02b8"
trace reflects that QEMU doesn't implement PEM (Partition Energy Management) as
described in section 14.14 of LoPAPR.
I can'
Patchew URL:
https://patchew.org/QEMU/161572198360.18482.17163668289458544283.mal...@soybean.canonical.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 161572198360.18482.17163668289458544283.mal...@soybean.canonica
Hi Xingang,
On 3/11/21 12:57 PM, Wang Xingang wrote:
> Hi Eric,
>
> On 2021/3/10 18:18, Auger Eric wrote:
>> Hi Xingang,
>>
>> On 3/10/21 3:13 AM, Wang Xingang wrote:
>>> Hi Eric,
>>>
>>> On 2021/3/9 22:36, Auger Eric wrote:
Hi,
On 2/27/21 9:33 AM, Wang Xingang wrote:
> From: Xingan
Hi Xingang
On 3/11/21 1:24 PM, Wang Xingang wrote:
> Hi Eric,
>
> On 2021/3/10 18:24, Auger Eric wrote:
>> Hi Xingang,
>>
>> On 2/27/21 9:33 AM, Wang Xingang wrote:
>>> From: Xingang Wang
>>>
>>> This add iommu option for pci root bus, including primary bus
>>> and pxb root bus. Default option i
QEMU ppce500 machine can dynamically instantiate an eTSEC device
if "-device eTSEC" is given to QEMU.
This series updates the fixed-link ethernet PHY driver as well as
the Freescale eTSEC driver to support the QEMU ppce500 board.
3 patches related to fixed phy in v1 are dropped in v2 as the chang
From: Vitaly Chipounov
This enables higher resolutions. The default is still 8MB for
backwards compatibility with existing snapshots.
The property name "vgamem_fb" is similar to that of the other
graphic adapters.
seabios/vgasrc/svgamodes.c needs to be updated as well.
For example, adding the f
Thanks, drew. I'll be more careful in the future.
Keqian.
On Fri, Mar 12, 2021 at 11:39:49PM +0100, Igor Mammedov wrote:
> happens on current master,
>
> to reproduce start
> ./x86_64-softmmu/qemu-system-x86_64 -enable-kvm -m 1g -M pc -vnc localhost:0 \
> -snapshot -cdrom Fedora-Workstation
On Sun, 14 Mar 2021, vit...@cyberhaven.com wrote:
From: Vitaly Chipounov
This enables higher resolutions. The default is still 8MB for
backwards compatibility with existing snapshots.
The property name "vgamem_fb" is similar to that of the other
Isn't that vgamem_mb? Code has that so it's ju
Yes, it's a typo in the commit message, sorry.
Vitaly
On 3/14/21 1:45 PM, BALATON Zoltan wrote:
On Sun, 14 Mar 2021, vit...@cyberhaven.com wrote:
From: Vitaly Chipounov
This enables higher resolutions. The default is still 8MB for
backwards compatibility with existing snapshots.
The propert
On Sun, 14 Mar 2021, Akihiko Odaki wrote:
ui/cocoa used to raise all keys before it resigns active to prevent a
stuck key problem caused by key up events it does not see while it is
inactive. The problem is solved by checking -[NSEvent modifierFlags] in
commit 6d73bb643aa725348aabe6a885ac5fb0b7f7
On Thu, 11 Mar 2021 at 18:09, Hao Wu wrote:
>
> This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm
> test. It tests whether the MFT module can measure correct fan values
> for a PWM fan in NPCM7XX boards.
>
> Reviewed-by: Doug Evans
> Reviewed-by: Tyrone Ting
> Signed-off-by: Ha
in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20210314
for you to fetch changes up to 6500ac13ff8e5c64ca69f5ef5d456028cfda6139:
hw/display/pxa2xx: Inline template header (2021-03-14 13:1
From: Philippe Mathieu-Daudé
Remove these confusing and unused definitions.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210127224255.3505711-4-f4...@amsat.org>
Signed-off-by: Bastian Koppelmann
---
target/tricore/cpu.h | 12
1 file change
From: Philippe Mathieu-Daudé
cpu_get_phys_page_debug() uses 'DATA LOAD' MMU access type.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210127224255.3505711-2-f4...@amsat.org>
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.c | 3 ++-
1 file
From: Philippe Mathieu-Daudé
'int access_type' and ACCESS_INT are unused, drop them.
Provide the mmu_idx argument to match other targets.
'int rw' is actually the MMUAccessType, rename it.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210127224255.3505711
tags/pull-tricore-20210314
for you to fetch changes up to a21993c7f98862823280d1eb6d3e93cf6267896f:
target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 (2021-03-14 14:49:01 +0100)
- Added triboard with tc27x_soc
- Cleaned up get_physic
From: Andreas Konopik
Reviewed-by: Bastian Koppelmann
Signed-off-by: Andreas Konopik
Signed-off-by: David Brenken
Signed-off-by: Georg Hofstetter
Signed-off-by: Robert Rasche
Signed-off-by: Lars Biermanski
Message-Id: <20201109165055.10508-2-david.bren...@efs-auto.org>
Signed-off-by: Bastia
if r3+1 and r2 are the same then we would overwrite r2 with our first
move and use the wrong result for the shift. Thus we store the result
from the mov in a temp.
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 8 +++-
1 file changed, 7 ins
From: Andreas Konopik
According to the TC 1.3.1. Architecture Manual [1; page 174], results are
undefined, if pos + width > 32 and not 31 or if width = 0.
We found this error because of a different behavior between qemu-tricore
and the real tricore processor. For pos + width = 32, qemu-tricore d
if width was 0 we would run into the assertion:
qemu-system-tricore: tcg/tcg-op.c:217: tcg_gen_sari_i32: Assertion `arg2 >= 0
&& arg2 < 32' failed.o
The instruction manual specifies undefined behaviour for this case. So
we bring this in line with the golden Infineon simlator 'tsim', which
simply
ranch-for-6.0-pull-request' into staging
> (2021-03-11 18:55:27 +)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20210314
>
> for you to fetch changes up to 6500ac13ff8e5c64ca69f5ef5d456028cf
On Sat, Mar 13, 2021 at 7:23 PM Mahmoud Mandour wrote:
>
> Replaced the calls to malloc() and their respective calls to
> free() with GLib's allocation and deallocation functions.
>
> Removed null checking before calling g_free() because it's
> not necessary and generates style errors.
>
> Signed-
The function is_surface_bgr() is no longer used anywhere,
so we can delete it.
Signed-off-by: Peter Maydell
---
include/ui/console.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/ui/console.h b/include/ui/console.h
index c960b7066cc..810ce7988c0 100644
--- a/include/ui/c
> -Original Message-
> From: Richard Henderson
> Sent: Sunday, February 14, 2021 12:32 PM
> To: Taylor Simpson ; qemu-devel@nongnu.org
> Cc: phi...@redhat.com; alex.ben...@linaro.org; laur...@vivier.eu;
> a...@rev.ng; Brian Cain
> Subject: Re: [PATCH v8 13/35] Hexagon (target/hexagon) i
On Fri, 12 Mar 2021 at 17:24, Thomas Huth wrote:
>
> The following changes since commit 363fc963054d8e82cfd55fa9b9aa130692a8dbd7:
>
> Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210309'
> into staging (2021-03-11 11:18:27 +)
>
> are available in the Git repository at:
gen_semantics is an executable, not an input. Meson 0.57 special cases
the first argument and @INPUT@ is not expanded there. Fix that by
not including it in the input, only in the command.
Signed-off-by: Paolo Bonzini
---
target/hexagon/meson.build | 6 ++
1 file changed, 2 insertions(+),
The main advantage of 0.57 is that it fixes
https://github.com/mesonbuild/meson/pull/7900, thus avoiding unnecessary
rebuilds after running meson.
Signed-off-by: Paolo Bonzini
---
meson | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson b/meson
index 776acd2a80..7182685b22
Python scripts are not inputs, and putting them in @INPUT@. This
puts requirements on the command line format, keeping all inputs
close to the name of the script. Avoid that by not including the
script in the command and not in the inputs.
Also wrap "PYTHONPATH" usage with "env", since setting t
Meson 0.57.0 does not need b_staticpic=$pie anymore, and has
stabilized the keyval module. Remove the workaround and use a few
replacements for features deprecated in the 0.57.0 release cycle.
The CentOS 7 dockerfile change forces the rebuild of the container.
Reviewed-by: Marc-André Lureau
Sig
This feature is new in meson 0.57 and allows getting rid of the "env" wrapper.
Signed-off-by: Paolo Bonzini
---
target/hexagon/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build
index bb0b4fb621..aaeee11ac1 10
The following changes since commit 0436c55edf6b357ff56e2a5bf688df8636f83456:
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into
staging (2021-03-08 13:51:41 +)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream-meson-0
Clean up everything that touches hflags, fixing quite a few
other bugs in the process.
Changes for v3:
* Fixes for linux-user, signal handling and startup.
-- Oops, the directory in which I did testing for v2
had a reduced set of targets.
Changes for v2:
* Do not put tcg internal state
Move the functions to a new file, helper_regs.c.
Note int_helper.c was relying on helper_regs.h to
indirectly include qemu/log.h.
Signed-off-by: Richard Henderson
---
target/ppc/helper_regs.h | 184 ++--
target/ppc/helper_regs.c | 197
Keep all hflags computation in one place, as this will be
especially important later.
Introduce a new POWERPC_FLAG_HID0_LE bit to indicate when
LE should be taken from HID0. This appears to be set if
and only if POWERPC_FLAG_RTC_CLK is set, but we're not
short of bits and having both names will a
Because these bits were not in hflags, the code generated
for single-stepping on BookE was essentially random.
Recompute hflags when storing to dbcr0.
Signed-off-by: Richard Henderson
---
target/ppc/helper_regs.c | 20 +++-
target/ppc/misc_helper.c | 3 +++
target/ppc/translate.
Nothing within the translator -- or anywhere else for that
matter -- checks MSR_SA or MSR_AP on the 602. This may be
a mistake. However, for the moment, we need not record these
bits in hflags.
This allows us to simplify HFLAGS_VSX computation by moving
it to overlap with MSR_VSX.
Signed-off-by
As per hreg_compute_hflags:
We 'forget' FE0 & FE1: we'll never generate imprecise exceptions
remove the hflags marker from the respective comments.
Signed-off-by: Richard Henderson
---
target/ppc/cpu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu.h b
In ppc_store_msr we call hreg_compute_hflags, which itself
calls hreg_compute_mem_idx. Rely on ppc_store_msr to update
everything required by the msr update.
Signed-off-by: Richard Henderson
---
target/ppc/machine.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/targe
Perform the test against FSCR_SCV at runtime, in the helper.
This means we can remove the incorrect set against SCV in
ppc_tr_init_disas_context and do not need to add an HFLAGS bit.
Signed-off-by: Richard Henderson
---
target/ppc/helper.h | 1 +
target/ppc/excp_helper.c | 9 +
t
It will be stored in tb->flags, which is also uint32_t,
so let's use the correct size.
Signed-off-by: Richard Henderson
---
target/ppc/cpu.h | 4 ++--
target/ppc/misc_helper.c | 2 +-
target/ppc/translate.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/p
Copying flags directly from msr has drawbacks: (1) msr bits
mean different things per cpu, (2) msr has 64 bits on 64 cpus
while tb->flags has only 32 bits.
Create a enum to define these bits. Document the origin of each bit.
This fixes the truncation of env->hflags to tb->flags, because we no
lon
Match cpu_post_load in using ppc_store_msr to set all of
the cpu state implied by the value of msr. Do not restore
hflags or hflags_nmsr, as we recompute them in ppc_store_msr.
Signed-off-by: Richard Henderson
---
target/ppc/machine.c | 13 +++--
1 file changed, 11 insertions(+), 2 dele
Only one of the three places in hw/ppc that modify msr updated
hflags. Even in that case, use the official interface instead
of a direct call to hreg_compute_hflags.
Signed-off-by: Richard Henderson
---
Cc: Cédric Le Goater
Cc: Greg Kurz
---
hw/ppc/pnv_core.c| 3 ++-
hw/ppc/spapr_hcall.c
We weren't recording MSR_GS in hflags, which means that BookE
memory accesses were essentially random vs Guest State.
Instead of adding this bit directly, record the completed mmu
indexes instead. This makes it obvious that we are recording
exactly the information that we need.
This also means t
Because this bit was not in hflags, the privilege check
for tlb instructions was essentially random.
Recompute hflags when storing to LPCR.
Signed-off-by: Richard Henderson
---
target/ppc/cpu.h | 1 +
target/ppc/helper_regs.c | 3 +++
target/ppc/mmu-hash64.c | 3 +++
target/ppc/translat
In save_user_regs, there are two bugs where we OR in a bit number
instead of the bit, clobbering the low bits of MSR. However:
The MSR_VR and MSR_SPE bits control the availability of the insns.
If the bits were not already set in MSR, then any attempt to access
those registers would result in SIG
We have eliminated all normal uses of hflags_nmsr. We need
not even compute it except when we want to migrate. Rename
the field to emphasize this.
Remove the fixme comment for migrating access_type. This value
is only ever used with the current executing instruction, and
is never live when the
Verify that hflags was updated correctly whenever we change
cpu state that is used by hflags.
Signed-off-by: Richard Henderson
---
target/ppc/cpu.h | 5 +
target/ppc/helper_regs.c | 29 +++--
2 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/tar
On 3/13/21 6:41 PM, Taylor Simpson wrote:
+#define fGEN_TCG_L2_loadrub_pr(SHORTCODE) SHORTCODE
+#define fGEN_TCG_L2_loadrub_pi(SHORTCODE) SHORTCODE
+#define fGEN_TCG_L2_loadrb_pr(SHORTCODE) SHORTCODE
+#define fGEN_TCG_L2_loadrb_pi(SHORTCODE) SHORTCODE;
+#define fGEN_TCG_L2_l
2021年3月14日(日) 21:55 BALATON Zoltan :
>
> On Sun, 14 Mar 2021, Akihiko Odaki wrote:
> > ui/cocoa used to raise all keys before it resigns active to prevent a
> > stuck key problem caused by key up events it does not see while it is
> > inactive. The problem is solved by checking -[NSEvent modifierFl
On Sat, 13 Mar 2021 at 09:50, Laurent Vivier wrote:
>
> The following changes since commit 3f8d1885e48e4d72eab0688f604de62e0aea7a38:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210311-pull-request'=
> into staging (2021-03-12 13:53:44 +)
>
> are available in the Git repositor
LGTM,
Reviewed-by: Dmitry Fomichev
> -Original Message-
> From: Klaus Jensen
> Sent: Wednesday, March 10, 2021 4:54 AM
> To: qemu-devel@nongnu.org
> Cc: Stefan Hajnoczi ; Klaus Jensen
> ; Fam Zheng ; Max Reitz
> ; Kevin Wolf ; qemu-
> bl...@nongnu.org; Gollu Appalanaidu ; Keith
> Busch ;
On Sat, Mar 6, 2021 at 11:29 AM Samuel Thibault
wrote:
> Hello,
>
> Doug Evans, le ven. 05 mars 2021 17:00:13 -0800, a ecrit:
> > Is it possible for QEMU to lazily determine the guest's IPv6
> > address? I.e., postpone the ""->guest address mapping until it's
> > needed and then, say, take the fi
Both functions don't check the personality of the interface (legacy or
modern) before accessing the configuration memory and always use
virtio_config_readX()/virtio_config_writeX().
With this patch, they now check the personality and in legacy mode
call virtio_config_readX()/virtio_config_writeX()
Changes for v2:
* Move tcg_init_ctx someplace more private (patch 29)
* Round result of tb_size based on qemu_get_host_physmem (patch 26)
Blurb for v1:
It took a few more patches than imagined to unify the two
places in which we manipulate the tcg code_gen buffer, but
the result is surel
Instead of delaying tcg_region_init until after tcg_prologue_init
is complete, do tcg_region_init first and let tcg_prologue_init
shrink the first region by the size of the generated prologue.
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-all.c | 11 -
accel/tcg/translate-all.
All callers immediately assert on error, so move the assert
into the function itself.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 0a2e5710d
This has only one user, but will make more sense after some
code motion.
Always leave the tcg_init_ctx initialized to the first region,
in preparation for tcg_prologue_init(). This also requires
that we don't re-allocate the region for the first cpu, lest
we hit the assertion for total number of
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
meson.build | 9 ++---
tcg/meson.build | 13 +
2 files changed, 15 insertions(+), 7 deletions(-)
create mode 100644 tcg/meson.build
diff --git a/meson.build b/meson.build
index a7d2dd429d..742f45c8d8
Finish the divorce of tcg/ from hw/, and do not take
the max cpu value from MachineState; just remember what
we were passed in tcg_init.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/internal.h | 3 ++-
tcg/region.c | 6 +++---
tcg/tcg.c | 23 ++--
It consists of one function call and has only one caller.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/translate-all.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index b905
There is only one caller, and shortly we will need access
to the MachineState, which tcg_init_machine already has.
Signed-off-by: Richard Henderson
---
accel/tcg/internal.h | 2 ++
include/sysemu/tcg.h | 2 --
accel/tcg/tcg-all.c | 14 +-
accel/tcg/translate-all.c |
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
meson.build | 4 +---
fpu/meson.build | 1 +
2 files changed, 2 insertions(+), 3 deletions(-)
create mode 100644 fpu/meson.build
diff --git a/meson.build b/meson.build
index 742f45c8d8..bfa24b836e 100644
--- a/meson.b
Give the field a name reflecting its actual meaning.
Signed-off-by: Richard Henderson
---
tcg/region.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index 8e4dd0480b..23261561a1 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -46,
Remove the ifdef ladder and move each define into the
appropriate header file.
Signed-off-by: Richard Henderson
---
v2: Retain comment about M_C_G_B_S constraint (balaton)
---
tcg/aarch64/tcg-target.h | 1 +
tcg/arm/tcg-target.h | 1 +
tcg/i386/tcg-target.h| 2 ++
tcg/mips/tcg-target.
Shortly, the full code_gen_buffer will only be visible
to region.c, so move in_code_gen_buffer out-of-line.
Move the debugging versions of tcg_splitwx_to_{rx,rw}
to region.c as well, so that the compiler gets to see
the implementation of in_code_gen_buffer.
This leaves exactly one use of in_code_
Change the interface from a boolean error indication to a
negative error vs a non-negative protection. For the moment
this is only interface change, not making use of the new data.
Signed-off-by: Richard Henderson
---
tcg/region.c | 63 +++-
1 fil
Move the call out of the N versions of alloc_code_gen_buffer
and into tcg_region_init.
Signed-off-by: Richard Henderson
---
tcg/region.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index 3ca0d01fa4..994c083343 100644
--- a/tcg/re
This has only one user, and currently needs an ifdef,
but will make more sense after some code motion.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 2b631fccdf..3316a22bde 100644
--- a
We only need guard pages in the rw buffer to avoid buffer overruns.
Let the rx buffer keep large pages all the way through.
Signed-off-by: Richard Henderson
---
tcg/region.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index 994c083343..2
Do not mess around with setting values within tcg_init_ctx.
Put the values into 'region' directly, which is where they
will live for the lifetime of the program.
Signed-off-by: Richard Henderson
---
tcg/region.c | 64 ++--
1 file changed, 27 insert
Signed-off-by: Richard Henderson
---
tcg/internal.h | 37
tcg/region.c| 570
tcg/tcg.c | 545 +
tcg/meson.build | 1 +
4 files changed, 611 insertions(+), 542 deletions(-)
create mode
Do not handle protections on a case-by-case basis in the
various alloc_code_gen_buffer instances; do it within a
single loop in tcg_region_init.
Signed-off-by: Richard Henderson
---
tcg/region.c | 40 +---
1 file changed, 29 insertions(+), 11 deletions(-)
dif
Buffer management is integral to tcg. Do not leave the allocation
to code outside of tcg/. This is code movement, with further
cleanups to follow.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 2 +-
accel/tcg/translate-all.c | 414 +
tcg
We shortly want to use tcg_init for something else.
Since the hook is called init_machine, match that.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-all.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/tcg-all.c b/accel
Perform both tcg_context_init and tcg_region_init.
Do not leave this split to the caller.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 3 +--
tcg/internal.h| 1 +
accel/tcg/translate-all.c | 3 +--
tcg/tcg.c | 9 -
4 files changed, 11 inser
Start removing the include of hw/boards.h from tcg/.
Pass down the max_cpus value from tcg_init_machine,
where we have the MachineState already.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 2 +-
tcg/internal.h | 2 +-
accel/tcg/tcg-all.c
Compute the value using straight division and bounds,
rather than a loop. Pass in tb_size rather than reading
from tcg_init_ctx.code_gen_buffer_size,
Signed-off-by: Richard Henderson
---
tcg/region.c | 29 -
1 file changed, 12 insertions(+), 17 deletions(-)
diff --g
Return output buffer and size via output pointer arguments,
rather than returning size via tcg_ctx->code_gen_buffer_size.
Signed-off-by: Richard Henderson
---
tcg/region.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index 23b345
A size is easier to work with than an end point,
particularly during initial buffer allocation.
Signed-off-by: Richard Henderson
---
tcg/region.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index ae22308290..8e4d
If qemu_get_host_physmem returns an odd number of pages,
then physmem / 8 will not be a multiple of the page size.
The following was observed on a gitlab runner:
ERROR qtest-arm/boot-serial-test - Bail out!
ERROR:../util/osdep.c:80:qemu_mprotect__osdep: \
assertion failed: (!(size & ~qemu_real_
There's a change in mprotect() behaviour [1] in the latest macOS
on M1 and it's not yet clear if it's going to be fixed by Apple.
In this case, instead of changing permissions of N guard pages,
we change permissions of N rwx regions. The same number of
syscalls are required either way.
[1] https
These variables belong to the jit side, not the user side.
Since tcg_init_ctx is no longer used outside of tcg/, move
the declaration to tcg/internal.h.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 -
tcg/internal.h| 1 +
a
On 3/14/21 5:39 PM, Peter Maydell wrote:
> The function is_surface_bgr() is no longer used anywhere,
> so we can delete it.
>
> Signed-off-by: Peter Maydell
> ---
> include/ui/console.h | 10 --
> 1 file changed, 10 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 3/14/21 10:27 PM, Richard Henderson wrote:
> These variables belong to the jit side, not the user side.
>
> Since tcg_init_ctx is no longer used outside of tcg/, move
> the declaration to tcg/internal.h.
>
> Suggested-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> inc
For --enable-tcg-interpreter on Windows, we will need this.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/osdep.h | 1 +
util/osdep.c | 9 +
2 files changed, 10 insertions(+)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index
On 3/14/21 10:27 PM, Richard Henderson wrote:
> Change the interface from a boolean error indication to a
> negative error vs a non-negative protection. For the moment
> this is only interface change, not making use of the new data.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/region.c | 63
Patchew URL:
https://patchew.org/QEMU/20210314212724.1917075-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210314212724.1917075-1-richard.hender...@linaro.org
Subject: [PATCH v2 00/29
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