From: John Snow
Signed-off-by: John Snow
Message-Id: <20210216021809.134886-16-js...@redhat.com>
Reviewed-by: Markus Armbruster
[Doc string improvements squashed in]
Signed-off-by: Markus Armbruster
---
scripts/qapi/introspect.py | 20
1 file changed, 20 insertions(+)
di
On Fri, Feb 19, 2021 at 01:15:25PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/19/21 1:00 PM, Daniel P. Berrangé wrote:
> > On Fri, Feb 19, 2021 at 12:44:21PM +0100, Philippe Mathieu-Daudé wrote:
> >> Hi,
> >>
> >> This series aims to improve user experience by providing
> >> a better error message
From: John Snow
It is easier to give a name to all of the dictly-typed objects we pass
around in introspect.py by removing this helper, as it does not return
an object that has any knowable type by itself.
Inline it into its only caller instead.
Signed-off-by: John Snow
Message-Id: <2021021602
From: John Snow
_make_tree might receive a dict (a SchemaInfo object) or some other type
(usually, a string) for its obj parameter. Adding features information
should arguably be performed by the caller at such a time when we know
the type of the object and don't have to re-interrogate it.
Signe
From: John Snow
Presently, we use a tuple to attach a dict containing annotations
(comments and compile-time conditionals) to a tree node. This is
undesirable because dicts are difficult to strongly type; promoting it
to a real class allows us to name the values and types of the
annotations we ar
From: John Snow
Returning two different types conditionally can be complicated to
type. Return one type for consistency.
Signed-off-by: John Snow
Message-Id: <20210216021809.134886-7-js...@redhat.com>
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
scripts/qapi/introspect
From: John Snow
Optional[List] is clunky; an empty sequence can more elegantly convey
"no variants". By downgrading "List" to "Sequence", we can also accept
tuples; this is useful for the empty tuple specifically, which we may
use as a default parameter because it is immutable.
Signed-off-by: Jo
From: John Snow
The types will be used in forthcoming patches to add typing. These types
describe the layout and structure of the objects passed to
_tree_to_qlit, but lack the power to describe annotations until the next
commit.
Signed-off-by: John Snow
Message-Id: <20210216021809.134886-10-js.
Am 16.02.2021 um 18:16 hat Alberto Garcia geschrieben:
> Signed-off-by: Alberto Garcia
> diff --git a/tests/qemu-iotests/235 b/tests/qemu-iotests/235
> index 20d16dbf38..f5c73b9c17 100755
> --- a/tests/qemu-iotests/235
> +++ b/tests/qemu-iotests/235
> @@ -57,7 +57,7 @@ vm.add_args('-drive', 'id=s
On Fri, 19 Feb 2021 at 11:58, Daniel P. Berrangé wrote:
> Is the behaviour reported really related to KVM specifically, as opposed
> to all hardware based virt backends ?
>
> eg is it actually a case of some machine types being "tcg_only" ?
Interesting question. At least for Arm the major items
On Fri, Feb 19, 2021 at 01:00:21PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/19/21 12:09 PM, Thomas Huth wrote:
> > We're building a lot of containers in the gitlab-CI that we never use.
> > This takes away network bandwidth and CPU time from other jobs for no
> > use, so let's remove them for no
On Fri, Feb 19, 2021 at 12:08:05PM +, Peter Maydell wrote:
> On Fri, 19 Feb 2021 at 11:58, Daniel P. Berrangé wrote:
> > Is the behaviour reported really related to KVM specifically, as opposed
> > to all hardware based virt backends ?
> >
> > eg is it actually a case of some machine types bei
On 2/19/21 12:44 PM, Philippe Mathieu-Daudé wrote:
> Hi,
>
> This series aims to improve user experience by providing
> a better error message when the user tries to enable KVM
> on machines not supporting it.
>
> Regards,
>
> Phil.
Hi Philippe, not sure if it fits in this series,
but also the
On Thu, 18 Feb 2021 19:46:54 -0500
Chris Browy wrote:
> > On Feb 18, 2021, at 2:11 PM, Jonathan Cameron
> > wrote:
> >
> > On Fri, 12 Feb 2021 16:58:21 -0500
> > Chris Browy wrote:
> >
> >>> On Feb 12, 2021, at 11:24 AM, Jonathan Cameron
> >>> wrote:
> >>>
> >>> On Tue, 9 Feb 2021 15:35
On Thu, Feb 18, 2021 at 10:22 PM Peter Maydell wrote:
>
> On Thu, 18 Feb 2021 at 14:07, Bin Meng wrote:
> > On Thu, Feb 18, 2021 at 9:26 PM Peter Maydell
> > wrote:
> > > Fails to compile, 32 bit hosts:
> > >
> > > ../../hw/riscv/virt.c: In function 'virt_machine_init':
> > > ../../hw/riscv/vir
From: Stefan Sandstrom
Add and fix deallocation of temporary TCG registers in CRIS code
generation.
Tested-by: Edgar E. Iglesias
Reviewed-by: Edgar E. Iglesias
Change-Id: I17fce5d95bdc4418337ba885d53ba97afb1bafcc
Signed-off-by: Stefan Sandström
---
target/cris/translate.c | 124 +
On 2/18/21 8:56 PM, Philippe Mathieu-Daudé wrote:
On 2/19/21 12:23 AM, Taylor Simpson wrote:
How do I get a wiki account for wiki.qemu.org? Going forward, I’d like
to be able to add information about the Hexagon target.
As any user with access to the wiki can create user accounts,
I created yo
On Fri 19 Feb 2021 01:04:00 PM CET, Max Reitz wrote:
> Two Python syntax nit picks below.
>> ret = vm.qmp('object-add', qom_type='throttle-group', id='tg',
>> - props={'x-bps-read': 4096})
>> + x_bps_read = 4096)
>
> To stay consistent, I think there shouldn’
On Fri 19 Feb 2021 01:21:49 PM CET, Kevin Wolf wrote:
>> log(vm.qmp('object-add', qom_type='throttle-group', id='tg0',
>> - props={ 'x-bps-total': size }))
>> + x_bps_total=size))
>
> x-bps-total isn't a stable interface, I'd prefer to use limits.
>
> My patch from November [1
From: Bin Meng
Currently machine->ram_size is a ram_addr_t, whose size is 64 bits
if either (a) the host is 64 bits or (b) CONFIG_XEN_BACKEND is
enabled, so it's effectively only 32 bits on 32-bit-not-x86.
commit 4be403c8158e ("Make target_phys_addr_t 64 bits unconditionally")
did the change for
Hi Paolo,
currently we have use of CONFIG_TCG in tests/,
but is that variable available at all in there?
I have to adapt some qemu/tests/qtest/* to work also without tcg for ARM,
but I think I am not seeing CONFIG_TCG filtering through, and I wonder whether
all the checks in there are actually
Markus Armbruster writes:
> Kevin Wolf writes:
[...]
>> Yes, don't use optional objects in the middle of the path of a wildcard
>> alias unless there is no semantic difference between empty object and
>> absent object.
>
> Aha! So my spidey-sense wasn't entirely wrong.
Like optional members, u
On 19/02/2021 13.00, Philippe Mathieu-Daudé wrote:
On 2/19/21 12:09 PM, Thomas Huth wrote:
We're building a lot of containers in the gitlab-CI that we never use.
This takes away network bandwidth and CPU time from other jobs for no
use, so let's remove them for now. The individual containers cou
On 2/19/21 1:18 PM, Daniel P. Berrangé wrote:
> On Fri, Feb 19, 2021 at 01:15:25PM +0100, Philippe Mathieu-Daudé wrote:
>> On 2/19/21 1:00 PM, Daniel P. Berrangé wrote:
>>> On Fri, Feb 19, 2021 at 12:44:21PM +0100, Philippe Mathieu-Daudé wrote:
Hi,
This series aims to improve user ex
On 2/19/21 2:04 PM, Claudio Fontana wrote:
> Hi Paolo,
>
> currently we have use of CONFIG_TCG in tests/,
>
> but is that variable available at all in there?
>
> I have to adapt some qemu/tests/qtest/* to work also without tcg for ARM,
>
> but I think I am not seeing CONFIG_TCG filtering throug
The vdagent protocol allows the guest agent (spice-vdagent) and the
spice client exchange messages to implement features which require
guest cooperation, for example clipboard support.
This is a qemu implementation of the spice client side. This allows
the spice guest agent talk to qemu directly
This patch adds support for clipboard messages to the qemu vdagent
implementation, which allows the guest exchange clipboard data with
qemu. Clipboard support can be enabled/disabled using the new
'clipboard' parameter for the vdagent chardev. Default is off.
Signed-off-by: Gerd Hoffmann
---
c
On Fri, 19 Feb 2021 at 12:52, Bin Meng wrote:
>
> From: Bin Meng
>
> Currently machine->ram_size is a ram_addr_t, whose size is 64 bits
> if either (a) the host is 64 bits or (b) CONFIG_XEN_BACKEND is
> enabled, so it's effectively only 32 bits on 32-bit-not-x86.
>
> commit 4be403c8158e ("Make ta
This patch adds support for mouse messages to the vdagent
implementation. This can be enabled/disabled using the new
'mouse' parameter for the vdagent chardev. Default is on.
Signed-off-by: Gerd Hoffmann
---
chardev/char.c | 3 ++
ui/vdagent.c | 141
Add some infrastructure to manage the clipboard in qemu.
TODO: Add API docs.
Signed-off-by: Gerd Hoffmann
---
include/ui/clipboard.h | 68 +++
ui/clipboard.c | 92 ++
ui/meson.build | 1 +
3 files changed, 161
On 2/19/21 2:04 PM, Claudio Fontana wrote:
> Hi Paolo,
>
> currently we have use of CONFIG_TCG in tests/,
>
> but is that variable available at all in there?
>
> I have to adapt some qemu/tests/qtest/* to work also without tcg for ARM,
>
> but I think I am not seeing CONFIG_TCG filtering throug
Fist sketch of cut+paste support for vnc. On the guest side we are
going to reuse the spice vdagent, so things should work out-of-the-box
with guests in the wild. So this patch set brings a qemu implemenation
of the vdagent protocol.
Beside that there is the clipboard infrastructure of course.
This patch adds support for cut+paste to the qemu vnc server, which
allows the vnc client exchange clipbaord data with qemu and other peers
like the qemu vdagent implementation.
Signed-off-by: Gerd Hoffmann
---
ui/vnc.h | 24
ui/vnc-clipboard.c | 326 +
Want place gtk clipboard code in a separate C file, which in turn
requires GtkDisplayState being in a header file. So move it. No
functional change.
Signed-off-by: Gerd Hoffmann
---
include/ui/gtk.h | 57
ui/gtk.c | 55 --
On 2/19/21 2:14 PM, Philippe Mathieu-Daudé wrote:
> On 2/19/21 2:04 PM, Claudio Fontana wrote:
>> Hi Paolo,
>>
>> currently we have use of CONFIG_TCG in tests/,
>>
>> but is that variable available at all in there?
>>
>> I have to adapt some qemu/tests/qtest/* to work also without tcg for ARM,
>>
>
Am 19.02.2021 um 13:45 hat Alberto Garcia geschrieben:
> On Fri 19 Feb 2021 01:21:49 PM CET, Kevin Wolf wrote:
> >> log(vm.qmp('object-add', qom_type='throttle-group', id='tg0',
> >> - props={ 'x-bps-total': size }))
> >> + x_bps_total=size))
> >
> > x-bps-total isn't a stable
This patch adds clipboard support to the qemu gtk ui.
Signed-off-by: Gerd Hoffmann
---
include/ui/gtk.h | 9
ui/gtk-clipboard.c | 124 +
ui/gtk.c | 1 +
ui/meson.build | 2 +-
4 files changed, 135 insertions(+), 1 deletion(-)
Hi Edgar,
> On 19 Feb 2021, at 12:19, Edgar E. Iglesias wrote:
>
> On Fri, Feb 19, 2021 at 11:53:48AM +0100, Stefan Sandström wrote:
>> From: Stefan Sandstrom
>>
>> Add and fix deallocation of temporary TCG registers in CRIS code
>> generation.
>
> Thanks Stefan,
>
> There's still a couple o
Hi Peter,
[+John/Richards/Paolo/Gueunter]
On 2/18/21 3:22 PM, Peter Maydell wrote:
> On Thu, 18 Feb 2021 at 14:07, Bin Meng wrote:
>> On Thu, Feb 18, 2021 at 9:26 PM Peter Maydell
>> wrote:
>>> Fails to compile, 32 bit hosts:
>>>
>>> ../../hw/riscv/virt.c: In function 'virt_machine_init':
>>>
On 19/02/2021 14.04, Claudio Fontana wrote:
Hi Paolo,
currently we have use of CONFIG_TCG in tests/,
but is that variable available at all in there?
I have to adapt some qemu/tests/qtest/* to work also without tcg for ARM,
but I think I am not seeing CONFIG_TCG filtering through, and I wonder
Patchew URL:
https://patchew.org/QEMU/20210219131349.3993192-1-kra...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210219131349.3993192-1-kra...@redhat.com
Subject: [PATCH 0/7] ui: add vdagent implement
The Measurement Block Origin inside the SCHIB is used when
Measurement Block format 1 is in used and must be aligned
on 64 bytes otherwise an operand exception is recognized
when issuing the Modify Sub CHannel (MSCH) instruction.
Signed-off-by: Pierre Morel
---
target/s390x/ioinst.c | 6 ++
Hi,
By testing Measurement with KVM unit tests I fall on this:
we forgot to test the alignment of the MBO for measurement format 1.
The last 6 bits of the MBO must be null, i.e. an aligned on 64 bytes
of the MBO, otherwise an operand exception is recognized when issuing
a msch instruction.
Regar
On 19/02/2021 14.39, Pierre Morel wrote:
The Measurement Block Origin inside the SCHIB is used when
Measurement Block format 1 is in used and must be aligned
on 64 bytes otherwise an operand exception is recognized
when issuing the Modify Sub CHannel (MSCH) instruction.
Signed-off-by: Pierre Mor
On Fri, 19 Feb 2021 at 13:31, Philippe Mathieu-Daudé wrote:
>
> Hi Peter,
>
> [+John/Richards/Paolo/Gueunter]
>
> On 2/18/21 3:22 PM, Peter Maydell wrote:
> > On Thu, 18 Feb 2021 at 14:07, Bin Meng wrote:
> >> On Thu, Feb 18, 2021 at 9:26 PM Peter Maydell
> >> wrote:
> >>> Fails to compile, 32
On 2/19/21 2:10 PM, Thomas Huth wrote:
> On 19/02/2021 13.00, Philippe Mathieu-Daudé wrote:
>> On 2/19/21 12:09 PM, Thomas Huth wrote:
>>> We're building a lot of containers in the gitlab-CI that we never use.
>>> This takes away network bandwidth and CPU time from other jobs for no
>>> use, so let
On 2/19/21 2:17 PM, Claudio Fontana wrote:
> On 2/19/21 2:14 PM, Philippe Mathieu-Daudé wrote:
>> On 2/19/21 2:04 PM, Claudio Fontana wrote:
>>> Hi Paolo,
>>>
>>> currently we have use of CONFIG_TCG in tests/,
>>>
>>> but is that variable available at all in there?
>>>
>>> I have to adapt some qemu
On 2/19/21 2:48 PM, Philippe Mathieu-Daudé wrote:
> On 2/19/21 2:17 PM, Claudio Fontana wrote:
>> On 2/19/21 2:14 PM, Philippe Mathieu-Daudé wrote:
>>> On 2/19/21 2:04 PM, Claudio Fontana wrote:
Hi Paolo,
currently we have use of CONFIG_TCG in tests/,
but is that variable a
> > I think there are people using QEMU to run old MacOS versions on MacOS
> > X/macOS and may not follow this mailing list but I'm sure they'll complain
> > once you break it.
>
> It was not clear what "full screen APIs" refer to in my patch. Today
> macOS have three different methods to enter fu
Commit 3e7a84eeccc ("Hexagon build infrastructure") added Hexagon
definitions that should be poisoned on target independent device
code, but forgot to update "exec/poison.h". Do it now.
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/poison.h | 2 ++
1 file changed, 2 insertions(+)
diff
Hi,
> > Maybe we need a type_register_mayfail() variant which doesn't abort in
> > case the parent isn't found (see also commit
> > 501093207eb1ed4845e0a65ee1ce7db7b9676e0b).
>
> I was also thinking along the same lines last night, and came up with
> this workaround:
>
> diff --git a/hw/s390x/
On Fri, Feb 12, 2021 at 09:07:06AM +0900, Akihiko Odaki wrote:
> Old Macs were not equipped with mice with an ability to perform
> "right clicks" and ui/cocoa interpreted left button down with
> left command key pressed as right button down as a workaround.
>
> The workaround has an obvious downsi
On Fri, Feb 19, 2021 at 05:44:19PM +0900, Akihiko Odaki wrote:
> There is no need of dynamic allocation as dcl is a small singleton.
> Static allocation reduces code size and makes hacking with ui/cocoa a
> bit easier.
Added to UI patch queue.
thanks,
Gerd
On 2/19/21 12:07 PM, Max Reitz wrote:
> On 13.02.21 22:54, Fam Zheng wrote:
>> On 2021-02-11 15:26, Philippe Mathieu-Daudé wrote:
>>> The null-co driver doesn't zeroize buffer in its default config,
>>> because it is designed for testing and tests want to run fast.
>>> However this confuses securit
On Fri, Feb 19, 2021 at 06:47:02PM +0900, Akihiko Odaki wrote:
> It is not used, and it is unlikely that a new use case will emerge
> anytime soon because the scope of OpenGL contexts are limited due to
> the nature of the frontend, VirGL, processing simple commands from the
> guest.
>
> Remove th
On Fri, Feb 19, 2021 at 08:28:41PM +0900, Akihiko Odaki wrote:
> kCGColorSpaceGenericRGB | Apple Developer Documentation
> https://developer.apple.com/documentation/coregraphics/kcgcolorspacegenericrgb
> > Deprecated
> > Use kCGColorSpaceSRGB instead.
>
> This change also removes the legacy color
On Fri, Feb 19, 2021 at 06:48:03PM +0900, Akihiko Odaki wrote:
> OpenGL ES does not support conversion from the given data format
> to the internal format with glTexImage2D.
>
> Use the given data format as the internal format, and ignore
> the given alpha channels with GL_TEXTURE_SWIZZLE_A in cas
19.02.2021 14:47, Denis V. Lunev wrote:
On 2/16/21 7:45 PM, Vladimir Sementsov-Ogievskiy wrote:
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/parallels.h | 6 +-
block/parallels-ext.c | 286 ++
block/parallels.c | 18 +++
block/mes
19.02.2021 14:56, Denis V. Lunev wrote:
On 2/16/21 7:45 PM, Vladimir Sementsov-Ogievskiy wrote:
Test support for reading bitmap from parallels image format.
parallels-with-bitmap.bz2 is generated on Virtuozzo by
parallels-with-bitmap.sh
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
.../sam
On Fri, Feb 19, 2021 at 11:50:54AM +, Luis Henriques wrote:
> Vivek Goyal writes:
>
> > Hi,
> >
> > This is V2 of the patches. Changes since v1 are.
> >
> > - Rebased on top of latest master.
> > - Took care of Miklos's comments to block acl xattrs if user
> > explicitly disabled posix acl.
On 2/19/21 12:58 PM, Peter Maydell wrote:
> On Fri, 19 Feb 2021 at 11:51, Philippe Mathieu-Daudé wrote:
>>
>> We hint the 'has_rpu' property is no longer required since commit
>> 6908ec448b4 ("xlnx-zynqmp: Properly support the smp command line
>> option") which was released in QEMU v2.11.0.
>>
>>
Kevin Wolf writes:
> When looking for an object in a struct in the external representation,
> check not only the currently visited struct, but also whether an alias
> in the current StackObject matches and try to fetch the value from the
> alias then. Providing two values for the same object thro
We hint the 'has_rpu' property is no longer required since commit
6908ec448b4 ("xlnx-zynqmp: Properly support the smp command line
option") which was released in QEMU v2.11.0.
Beside, this device is marked 'user_creatable = false', so the
only thing that could be setting the property is the board
This patchseries implements a model of the AN547 FPGA image for the
MPS3 board. The main benefit of this new board is that it uses the
Cortex-M55 CPU and so it allows running guests which use a v8.1M CPU.
This FPGA image is based on the SSE-300, so most of the series is
really implementing the SS
Add a new callback event type ClockPreUpdate, which is called on
period changes before the period is updated.
Signed-off-by: Peter Maydell
Reviewed-by: Luc Michel
Reviewed-by: Hao Wu
Reviewed-by: Philippe Mathieu-Daudé
---
docs/devel/clocks.rst | 9 -
include/hw/clock.h| 1 +
hw/c
The Clock framework allows users to specify a callback which is
called after the clock's period has been updated. Some users need to
also have a callback which is called before the clock period is
updated.
As the first step in adding support for notifying Clock users on
pre-update events, add an
Use the new clock_ns_to_ticks() function in npcm7xx_timer where
appropriate.
Signed-off-by: Peter Maydell
Reviewed-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Hao Wu
---
hw/timer/npcm7xx_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/tim
For SSE-300, the SYSINFO register block has two new registers:
* SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3;
since the SSE-300 can only be configured with a single CPU it
is always zero
* IIDR is the subsystem implementation identity register;
its value is set by th
Add a clock_ns_to_ticks() function which does the opposite of
clock_ticks_to_ns(): given a duration in nanoseconds, it returns the
number of clock ticks that would happen in that time. This is useful
for devices that have a free running counter register whose value can
be calculated when it is rea
The versions of the Secure Access Configuration Register Block
and Non-secure Access Configuration Register Block in the SSE-300
are the same as those in the SSE-200, but the CIDR/PIDR ID
register values are different.
Plumb through the sse-version property and use it to select
the correct ID regi
The SSE-300 includes a counter module; implement a model of it.
This counter is documented in the SSE-123 Example Subsystem
Technical Reference Manual:
https://developer.arm.com/documentation/101370/latest/
Signed-off-by: Peter Maydell
---
include/hw/timer/sse-counter.h | 105
hw/time
Remove the is_sse200 flag in favour of just directly testing the new
sse_version field.
Since some of these registers exist in the SSE-300 but some do not or
have different behaviour, we expand out the if() statements in the
read and write functions into switch()es, so we have an easy place to
put
The SSE-300 has only one CPU and so no INITSVTOR1. It does
have INITSVTOR0, but unlike the SSE-200 this register now
has a LOCK bit which can be set to 1 to prevent any further
writes to the register. Implement these differences.
Signed-off-by: Peter Maydell
---
hw/misc/iotkit-sysctl.c | 26
The version of the SYSINFO Register Block in the SSE-300 has
different CIDR/PIDR register values to the SSE-200; pass in
the sse-version property and use it to select the correct
ID register values.
Signed-off-by: Peter Maydell
---
include/hw/misc/iotkit-sysinfo.h | 1 +
hw/arm/armsse.c
In the SSE-300 the CPU_WAIT and NMI_ENABLE registers have
moved offsets, so they are now where the SSE-200's WICCTRL
and EWCTRL were. The SSE-300 does not have WICCTLR or EWCTRL
at all, and the old offsets are reserved:
OffsetSSE-200 SSE-300
---
0x118
We model Arm "Subsystems for Embedded" SoC subsystems using generic
code which is split into various sub-devices which are configurable
by QOM properties to handle the behaviour differences between the SSE
subsystems we implement. Currently the only sub-device which needs
to change is the IOTKIT_S
The sysctl PDCM_PD_*_SENSE registers control various power domains in
the system and allow the guest to configure which conditions keep a
power domain awake and what power state to use when the domain is in
a low power state. QEMU doesn't model power domains, so for us these
registers are dummy re
In the SSE-300, the format of the SYS_CONFIG0 register has changed again;
pass through the correct value to the SYSINFO register block device.
We drop the old SysConfigFormat enum, which was implemented in the
hope that different flavours of SSE would share the same format;
since they all seem to
The SSE uses 32 interrupts for its own devices, and then passes through
its expansion IRQ inputs to the CPU's interrupts 33 and upward.
Add a define for the number of IRQs the SSE uses for itself, instead
of hardcoding 32.
Signed-off-by: Peter Maydell
---
include/hw/arm/armsse.h | 5 -
hw/ar
The SSE-200 and SSE-300 have different PID register values from the
IoTKit for the sysctl register block. We incorrectly implemented the
SSE-200 with the same PID values as IoTKit. Fix the SSE-200 bug and
report these register values for SSE-300.
Signed-off-by: Peter Maydell
---
hw/misc/iotkit
The SSE-300's iokit-sysctl device is similar to the SSE-200, but
some registers have moved address or have different behaviours.
In this commit we add case statements for the registers where
the SSE-300 and SSE-200 have the same behaviour. Some registers
are the same on all SSE versions and so need
Convert the apb_ppc0 and apb_ppc1 fields in the ARMSSE state struct
to use an array instead of two separate fields. We already had one
place in the code that wanted to be able to refer to the PPC by
index, and we're about to add more code like that.
Signed-off-by: Peter Maydell
---
include/hw/a
The ARMSSE_CPUID and ARMSSE_MHU Kconfig stanzas are for the devices
implmemented by hw/misc/cpuid.c and hw/misc/armsse-mhu.c. Move them
to hw/misc/Kconfig where they belong.
Signed-off-by: Peter Maydell
---
hw/arm/Kconfig | 6 --
hw/misc/Kconfig | 6 ++
2 files changed, 6 insertions(+)
The SSE-300 has a new register block CPU_PWRCTRL. There is one
instance of this per CPU in the system (so just one for the SSE-300),
and as well as the usual CIDR/PIDR ID registers it has just one
register, CPUPWRCFG. This register allows the guest to configure
behaviour of the system in power-do
The SSE-300 includes some timers which are a different kind to
those in the SSE-200. Model them.
These timers are documented in the SSE-123 Example Subsystem
Technical Reference Manual:
https://developer.arm.com/documentation/101370/latest/
Signed-off-by: Peter Maydell
---
include/hw/timer/sse
The SSE-300 has a slightly different set of shared-per-CPU interrupts,
allow the irq_is_common[] array to be different per SSE variant.
Signed-off-by: Peter Maydell
---
hw/arm/armsse.c | 39 +--
1 file changed, 21 insertions(+), 18 deletions(-)
diff --git a/h
Move the CMSDK watchdog device handling into the data-driven device
placement framework. This is slightly more complicated because these
devices might wire their IRQs up to the NMI line, and because one of
them uses the slow 32KHz clock rather than the main clock.
Signed-off-by: Peter Maydell
--
The SSE-300 has a new PWRCTRL register at offset 0x1fc (previously
reserved). This register controls accessibility of some registers
in the Power Policy Units (PPUs). Since QEMU doesn't implement
the PPUs, we don't need to implement any real behaviour for this
register, so we just handle the UNLOCK
The SSE-300 is mostly the same as the SSE-200, but it has moved some
of the devices in the memory map and uses different device types in
some cases. To accommodate this, add a framework where the placement
and wiring of some devices can be specified in a data table.
This commit adds the framework
The SSE-300 has a system counter device; add support for SSE
variants having this device.
As with the existing devices like the cache control block, CPUID
block, etc, we don't try to make the MMIO addresses configurable. We
can do that if and when we need to model a future SSE variant which
has t
Move the sysctl register block into the data-driven device placement
framework.
Signed-off-by: Peter Maydell
---
hw/arm/armsse.c | 44
1 file changed, 28 insertions(+), 16 deletions(-)
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 91f30b1fdc4.
Implement the minor changes required to the SCC block for AN547 images:
* CFG2 and CFG5 exist (like AN524)
* CFG3 is reserved (like AN524)
* CFG0 bit 1 is CPU_WAIT; we don't implement it, but note this
in the TODO comment
Signed-off-by: Peter Maydell
---
hw/misc/mps2-scc.c | 15 +--
Move the CMSDK dualtimer device handling into the data-driven
device placement framework.
Signed-off-by: Peter Maydell
---
hw/arm/armsse.c | 35 +--
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 22dd437a4ba
The SSE-300 has four timers of type TYPE_SSE_TIMER; add support in
the code for having these in an ARMSSEDeviceInfo array.
Signed-off-by: Peter Maydell
---
include/hw/arm/armsse.h | 2 ++
hw/arm/armsse.c | 15 +++
2 files changed, 17 insertions(+)
diff --git a/include/hw/ar
Move the sysinfo register block into the data-driven framework.
While we are moving the code for configuring this device around,
regularize on using &error_abortw when setting the integer
properties: they are all simple DEFINE_PROP_UINT32 properties so the
setting can never fail.
Signed-off-by: P
On Fri, Feb 19, 2021 at 07:17:02PM +0900, Akihiko Odaki wrote:
> ui/console used to accept NULL as graphic console surface, but its
> semantics was inconsistent among displays:
> - cocoa and gtk-egl perform NULL dereference.
> - egl-headless, spice and spice-egl do nothing.
> - gtk releases underly
Move the CMSDK timer that uses the S32K slow clock into the data-driven
device placement framework.
Signed-off-by: Peter Maydell
---
include/hw/arm/armsse.h | 3 +--
hw/arm/armsse.c | 31 ---
2 files changed, 13 insertions(+), 21 deletions(-)
diff --git a/in
Support SSE variants like the SSE-300 with an ARMSSE_CPU_PWRCTRL register
block. Because this block is per-CPU and does not clash with any of the
SSE-200 devices, we handle it with a has_cpu_pwrctrl flag like the
existing has_cachectrl, has_cpusectrl and has_cpuid, rather than
trying to add per-CPU
Move the PPUs into the data-driven device placement framework.
We don't implement them, so they are just TYPE_UNIMPLEMENTED stubs.
Because the SSE-200 and the IotKit diverge here (the IoTKit does
not have the PPUs) we need to separate out the ARMSSEDeviceInfo
for the two variants, and only add the
From: John Snow
Optional[List] is clunky; an empty sequence can more elegantly convey
"no variants". By downgrading "List" to "Sequence", we can also accept
tuples; this is useful for the empty tuple specifically, which we may
use as a default parameter because it is immutable.
Signed-off-by: Jo
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