Merely a testing pre-requisite to prove consistency for docstrings in
QAPI refactors, not intended for review or merge.
John Snow (3):
[DO-NOT-MERGE] docs: replace single backtick (`) with double-backtick
(``)
[DO-NOT-MERGE] docs/sphinx: change default role to "any"
[DO-NOT-MERGE] docs:
This interprets single-backtick syntax in all of our Sphinx docs as a
cross-reference to *something*, including Python symbols.
Signed-off-by: John Snow
---
docs/conf.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/conf.py b/docs/conf.py
index d40d8ff37bab..d0a8f78f6ead 100644
---
This is just POC to prove that the docstrings, where they are written,
are correct to some minimum standard. It is included here for
reviewing/testing convenience.
Signed-off-by: John Snow
---
docs/conf.py | 3 ++-
docs/devel/index.rst | 1 +
docs/deve
Hi,
In this series, we have incorporated the changes Marc-Andre proposed to
improve the code in v12. Following is a changelog that outlines the
differences between v12 and v13.
CHANGELOG:
[PATCH v13 02/19] multi-process: add configure and usage information
- Dropped “tests
when boxed is true, expr.py asserts that we must have
arguments. Ultimately, this should mean that if boxed is True, that
arg_type should be defined. Mypy cannot infer this, and does not support
'stateful' type inference, e.g.:
```
if x:
assert y is not None
...
if x:
y.etc()
```
does n
Hi, this patchset enables strict optional checking in mypy for
everything we have typed so far.
In general, this patchset seeks to eliminate Optional[T] in favor of T
wherever possible. Optional types used for object properties,
function/method parameters and return values where we expect, in most
Actually, the arg_type can indeed be Optional.
Signed-off-by: John Snow
---
scripts/qapi/events.py | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/scripts/qapi/events.py b/scripts/qapi/events.py
index 599f3d1f564b..9851653b9d11 100644
--- a/scripts/qapi/events.py
Mypy cannot understand that this match can never be None, so help it
along.
Signed-off-by: John Snow
---
scripts/qapi/main.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/scripts/qapi/main.py b/scripts/qapi/main.py
index 42517210b805..271d9e84da94 100644
--- a/scripts/qa
Use this in preference to 'None', which helps remove some edge cases in
the typing.
Signed-off-by: John Snow
---
scripts/qapi/gen.py | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/scripts/qapi/gen.py b/scripts/qapi/gen.py
index a6dc991b1d03..0c5
We use None to represent an object that has no source information
because it's a builtin. This complicates interface typing, since many
interfaces expect that there is an info object available to print errors
with.
Introduce a special QAPISourceInfo that represents these built-ins so
that if an er
We already assert this in end_if, but that's opaque to mypy. Do it in
_wrap_ifcond instead. Same effect at runtime, but mypy can now infer
the type in _wrap_ifcond's body.
Signed-off-by: John Snow
---
scripts/qapi/gen.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts
Many places assume they can access these fields without checking them
first to ensure they are defined. Eliminating the _genc and _genh fields
and replacing them with functional properties that check for correct
state can ease the typing overhead by eliminating the Optional[T] return
type.
Signed-
QAPIGenC and QAPIGenH in particular depend on fname being defined, but
we have a usage of QAPIGenCCode that isn't intended to be associated
with a particular file.
No problem, move the write method down to the class that actually needs
it, and keep QAPIGenCCode more abstract.
Signed-off-by: John
In the modules that we are checking so far, we can be stricter about the
difference between Optional[T] and T types. Enable that check.
Enabling it now will assist review on further typing and cleanup work.
Signed-off-by: John Snow
---
scripts/qapi/mypy.ini | 1 -
1 file changed, 1 deletion(-)
A forthcoming patch is going to allow the empty string as a name for the
builtin module, and quotes will help us see that in test output. Without
this, git will be upset about trailing empty spaces in test output, so
the quotes are necessary.
Signed-off-by: John Snow
---
tests/qapi-schema/commen
--
events.py had an info to route, was it by choice that it wasn't before?
Signed-off-by: John Snow
---
scripts/qapi/events.py | 2 +-
scripts/qapi/schema.py | 23 +--
scripts/qapi/types.py | 9 +
scripts/qapi/visit.py | 6 +++---
4 files changed, 22 insertions(+
Instead of using None as the built-in module filename, use an empty
string instead. This allows us to clarify the type of various interfaces
dealing with module names as always taking a string, which saves us from
having to use Optional[str] everywhere.
Signed-off-by: John Snow
---
scripts/qapi/
On Mon, Dec 14, 2020 at 08:30:50PM +, Peter Maydell wrote:
> This commit is the result of running the timer-del-timer-free.cocci
> script on the whole source tree.
For the ipmi portion:
Acked-by: Corey Minyard
>
> Signed-off-by: Peter Maydell
> ---
> I could split this up into multiple pa
This patch series include a few more NPCM7XX devices including
- Analog Digital Converter (ADC)
- Pulse Width Modulation (PWM)
We also modified the CLK module to generate clock values using qdev_clock.
These clocks are used to determine various clocks in NPCM7XX devices.
Thank you for your revie
This patch allows NPCM7XX CLK module to compute clocks that are used by
other NPCM7XX modules.
Add a new struct NPCM7xxClockConverterState which represents a
single converter. Each clock converter in CLK module represents one
converter in NPCM7XX CLK Module(PLL, SEL or Divider). Each converter
ta
We add a qtest for the PWM in the previous patch. It proves it works as
expected.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
tests/qtest/meson.build| 1 +
tests/qtest/npcm7xx_pwm-test.c | 490 +
2 files changed, 4
This patch makes NPCM7XX Timer to use a the timer clock generated by the
CLK module instead of the magic number TIMER_REF_HZ.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx.c | 5 +
hw/timer/npcm7xx_timer.c | 23 +++
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequency and duty_cycle. Both are computed using inputs
from software side.
This module does not model detail pulse signals since it is expens
On Mon, Dec 14, 2020 at 4:13 PM Hao Wu wrote:
> This patch allows NPCM7XX CLK module to compute clocks that are used by
> other NPCM7XX modules.
>
> Add a new struct NPCM7xxClockConverterState which represents a
> single converter. Each clock converter in CLK module represents one
> converter in
The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores it in the ADC_DATA register when enabled.
Users can alter input value by using qom-set QMP command.
Reviewed-by: Havard Skinnemoen
Revi
On Mon, Dec 14, 2020 at 4:13 PM Hao Wu wrote:
> The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
> identical PWM modules. Each module contains 4 PWM entries. Each PWM has
> two outputs: frequency and duty_cycle. Both are computed using inputs
> from software side.
>
> This mo
On Mon, Dec 14, 2020 at 4:13 PM Hao Wu wrote:
> This patch series include a few more NPCM7XX devices including
>
> - Analog Digital Converter (ADC)
> - Pulse Width Modulation (PWM)
>
> We also modified the CLK module to generate clock values using qdev_clock.
> These clocks are used to determine
On Mon, Dec 14, 2020 at 4:13 PM Hao Wu wrote:
> We add a qtest for the PWM in the previous patch. It proves it works as
> expected.
>
> Reviewed-by: Havard Skinnemoen
> Reviewed-by: Tyrone Ting
> Signed-off-by: Hao Wu
> ---
> tests/qtest/meson.build| 1 +
> tests/qtest/npcm7xx_pwm-t
On Mon, Dec 14, 2020 at 4:13 PM Hao Wu wrote:
> The ADC is part of NPCM7XX Module. Its behavior is controled by the
> ADC_CON register. It converts one of the eight analog inputs into a
> digital input and stores it in the ADC_DATA register when enabled.
>
> Users can alter input value by using q
On Tue, 08 Dec 2020 14:56:08 PST (-0800), Alistair Francis wrote:
The RISC-V QEMU port currently has lot of preprocessor directives that
check if we are targetting a 32-bit or 64-bit CPU. This means that the
64-bit RISC-V target can not run 32-bit CPUs. This is different to most
other QEMU archit
On Mon, Dec 14, 2020 at 4:13 PM Hao Wu wrote:
> This patch makes NPCM7XX Timer to use a the timer clock generated by the
> CLK module instead of the magic number TIMER_REF_HZ.
>
> Reviewed-by: Havard Skinnemoen
> Reviewed-by: Tyrone Ting
> Signed-off-by: Hao Wu
> ---
> hw/arm/npcm7xx.c
On 11/7/20 12:08 AM, Cleber Rosa wrote:
And this seems like another change.
- Cleber.
Fair enough.
On 11/23/2020 05:36 PM, Quentin Grolleau wrote:
Hello,
In our company, we are hosting a large number of Vm, hosted behind
Openstack (so libvirt/qemu).
A large majority of our Vms are runnign with local data only, stored
on NVME, and most of them are RAW disks.
With Qemu 4.0(can be even with
On Mon, Dec 14, 2020 at 6:02 AM Richard Henderson
wrote:
>
> This has been a tcg-specific function, but is also in use
> by hardware accelerators via physmem.c. This can cause
> link errors when tcg is disabled.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Joelle van Dyne
On Mon, Dec 14, 2020 at 6:02 AM Richard Henderson
wrote:
>
> We are shortly going to have a split rw/rx jit buffer. Depending
> on the host, we need to flush the dcache at the rw data pointer and
> flush the icache at the rx code pointer.
>
> For now, the two passed pointers are identical, so the
On Mon, Dec 14, 2020 at 6:03 AM Richard Henderson
wrote:
>
> For darwin, the CTR_EL0 register is not accessible, but there
> are system routines that we can use.
>
> For other hosts, copy the single pointer implementation from
> libgcc and modify it to support the double pointer interface
> we req
On Mon, Dec 14, 2020 at 6:02 AM Richard Henderson
wrote:
>
> This value is constant across all thread-local copies of TCGContext,
> so we might as well move it out of thread-local storage.
>
> Use the correct function pointer type, and name the variable
> tcg_qemu_tb_exec, which means that we are
On Mon, Dec 14, 2020 at 6:02 AM Richard Henderson
wrote:
>
> This value is constant across all thread-local copies of TCGContext,
> so we might as well move it out of thread-local storage.
>
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg.h| 2 +-
> accel/tcg/tcg-runtime.c
OpenTitan is currently only avalible on an FPGA platform and the memory
addresses have changed. Update to use the new memory addresses.
Signed-off-by: Alistair Francis
---
include/hw/riscv/opentitan.h | 23 +++---
hw/riscv/opentitan.c | 81 +---
2 file
Should qemu-options.hx be updated?
-j
On Mon, Dec 14, 2020 at 6:02 AM Richard Henderson
wrote:
>
> Plumb the value through to alloc_code_gen_buffer. This is not
> supported by any os or tcg backend, so for now enabling it will
> result in an error.
>
> Signed-off-by: Richard Henderson
> ---
>
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Tuesday, December 15, 2020 12:20 AM
> To: ganqixin
> Cc: qemu-arm ; QEMU Developers
> ; Chenqun (kuhn)
> ; Zhanghailiang
> ; Euler Robot
> ; Beniamino Galvani
> Subject: Re: [PATCH 1/7] allwinner-a10-pit:
- Original Message -
> Hi!
>
> 07.12.2020, 08:52, "Jason Wang" :
> > On 2020/11/9 上午7:59, Alexey Kirillov wrote:
> >> +#ifdef CONFIG_SLIRP
> >> + case NET_BACKEND_USER: {
> >> + size_t len = strchr(ni->u.user.net, '/') - ni->u.user.net;
> >> + char *net = g_strndup(ni->u.user.net, l
Hi, Philippe,
On Mon, Dec 14, 2020 at 9:49 PM Philippe Mathieu-Daudé wrote:
>
> On 12/14/20 3:37 AM, Huacai Chen wrote:
> > Hi, Philippe,
> >
> > On Mon, Dec 14, 2020 at 7:09 AM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> On 12/13/20 11:17 PM, Philippe Mathieu-Daudé wrote:
> >>> On 12/11/20 12:
Hi, Daniel
Thanks for your reply.
I have just ended my trip, sorry for my late response.
I will send out the v4.
Daniel P. Berrangé 于2020年12月11日周五 上午12:55写道：
>
> On Fri, Dec 11, 2020 at 12:38:19AM +0800, Li Feng wrote:
> > This patch addresses this issue:
> > When accessing a volume on an NFS fil
Same here on macOS 11.0.1 when specifying accel=hvf. Crash report is
attached.
$ qemu-system-x86_64 -machine accel=hvf -smp 2 -m 2G -hda current.qcow -boot d
-cdrom ubuntu-18.04.5-desktop-amd64.iso
qemu-system-x86_64: Error: HV_ERROR
[1]2912 abort qemu-system-x86_64 -machine accel=hvf
v2:
A big reconstruction. rewrite helpers with CPU feature and sepreate
changesets.
Jiaxun Yang (8):
hw/mips: Make bootloader addresses unsgined
hw/mips/malta: Use address translation helper to calculate
bootloader_run_addr
hw/mips: Use address translation helper to handle ENVP_ADDR
hw
Address should be unsigned anyway, otherwise it may carry
calculations wrongly.
Signed-off-by: Jiaxun Yang
---
hw/mips/fuloong2e.c | 12 ++--
hw/mips/malta.c | 22 +++---
2 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fu
So it will sign extend adresses properly.
Signed-off-by: Jiaxun Yang
---
hw/mips/malta.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 7db009a3e9..1fbb8a3220 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1302,9 +1302,9 @@
It will signed extend vaddr properly.
Signed-off-by: Jiaxun Yang
---
hw/mips/fuloong2e.c | 24 +-
hw/mips/malta.c | 62 ++---
2 files changed, 43 insertions(+), 43 deletions(-)
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
ind
Add a bootloader helper to generate simple bootloaders for kernel.
It can help us reduce inline hex hack and also keep MIPS release 6
compatibility easier.
Signed-off-by: Jiaxun Yang
---
hw/mips/bootloader.c | 157 +++
hw/mips/meson.build | 2 +-
Translate embedded assembly into IO writes which is more
readable.
Signed-off-by: Jiaxun Yang
---
hw/mips/malta.c | 68 ++---
1 file changed, 19 insertions(+), 49 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index ffd67b8293..2799bc36c7
Translate embedded assembly into IO writes which is more
readable.
Also hardcode cm_base at boot time instead of reading from CP0.
Signed-off-by: Jiaxun Yang
---
hw/mips/boston.c | 45 -
1 file changed, 12 insertions(+), 33 deletions(-)
diff --git a/
It's useful for bootloader to do IO opreations.
Signed-off-by: Jiaxun Yang
---
target/mips/addr.c | 10 ++
target/mips/cpu.h | 2 ++
2 files changed, 12 insertions(+)
diff --git a/target/mips/addr.c b/target/mips/addr.c
index 27a6036c45..86f1c129c9 100644
--- a/target/mips/addr.c
+++
Replace embedded binary with generated code.
Signed-off-by: Jiaxun Yang
---
hw/mips/boston.c| 17 ++---
hw/mips/fuloong2e.c | 28
hw/mips/malta.c | 41 ++---
3 files changed, 16 insertions(+), 70 deletions(-)
d
This patch addresses this issue:
When accessing a volume on an NFS filesystem without supporting the file lock,
tools, like qemu-img, will complain "Failed to lock byte 100".
In the original code, the qemu_has_ofd_lock will test the lock on the
"/dev/null" pseudo-file. Actually, the file.locking i
When handle dirty log, we face qemu_real_host_page_size and
TARGET_PAGE_SIZE. The first one is the granule of KVM dirty
bitmap, and the second one is the granule of QEMU dirty bitmap.
Generally speaking, qemu_real_host_page_size >= TARGET_PAGE_SIZE,
so misuse TARGET_PAGE_SIZE to init kvmslot dirty
> -Original Message-
> From: Alistair Francis [mailto:alistai...@gmail.com]
> Sent: Wednesday, December 9, 2020 6:19 AM
> To: Jiangyifei
> Cc: qemu-devel@nongnu.org Developers ; open
> list:RISC-V ; Zhangxiaofeng (F)
> ; Sagar Karandikar
> ; open list:Overall ;
> libvir-l...@redhat.com; B
> -Original Message-
> From: Alistair Francis [mailto:alistai...@gmail.com]
> Sent: Wednesday, December 9, 2020 6:22 AM
> To: Jiangyifei
> Cc: qemu-devel@nongnu.org Developers ; open
> list:RISC-V ; Zhangxiaofeng (F)
> ; Sagar Karandikar
> ; open list:Overall ;
> libvir-l...@redhat.com; B
The parameters start and size are transfered from QEMU memory
emulation layer. It can promise that they are TARGET_PAGE_SIZE
aligned. However, KVM needs they are qemu_real_page_size aligned.
Though no caller breaks this aligned requirement currently, we'd
better add an explicit check to avoid futu
Keqian Zhu (2):
accel: kvm: Fix memory waste under mismatch page size
accel: kvm: Add aligment check for kvm_log_clear_one_slot
accel/kvm/kvm-all.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
--
2.23.0
On 2020/12/14 23:36, Peter Xu wrote:
> On Mon, Dec 14, 2020 at 10:14:11AM +0800, zhukeqian wrote:
>
> [...]
>
> Though indeed I must confess I don't know how it worked in general when
> host
> page size != target page size, at least for migration. For example, I
> believe
>>>
Hi, Dave.
Since qemu 6.0 is open and some patches of this series have been reviewed,
might you have time to continue reviewing rest of them ?
On 2020/10/25 10:29, Zheng Chuan wrote:
>
>
> On 2020/10/24 3:02, Dr. David Alan Gilbert wrote:
>> * Zheng Chuan (zhengch...@huawei.com) wrote:
>>>
>>>
> -Original Message-
> From: Alistair Francis [mailto:alistai...@gmail.com]
> Sent: Wednesday, December 9, 2020 6:26 AM
> To: Jiangyifei
> Cc: qemu-devel@nongnu.org Developers ; open
> list:RISC-V ; Zhangxiaofeng (F)
> ; Sagar Karandikar
> ; open list:Overall ;
> libvir-l...@redhat.com; B
> -Original Message-
> From: Alistair Francis [mailto:alistai...@gmail.com]
> Sent: Wednesday, December 9, 2020 6:30 AM
> To: Jiangyifei
> Cc: qemu-devel@nongnu.org Developers ; open
> list:RISC-V ; Zhangxiaofeng (F)
> ; Sagar Karandikar
> ; open list:Overall ;
> libvir-l...@redhat.com; B
Hi Keqian, Peter,
On 2020/12/15 15:23, zhukeqian wrote:
On 2020/12/14 23:36, Peter Xu wrote:
On Mon, Dec 14, 2020 at 10:14:11AM +0800, zhukeqian wrote:
[...]
Though indeed I must confess I don't know how it worked in general when host
page size != target page size, at least for migration.
On Sun, Dec 13, 2020 at 10:30:16PM +0100, Fabrice Fontaine wrote:
> USBDEVFS_GET_SPEED is used since version 5.2.0 and
> https://gitlab.com/qemu-project/qemu/-/commit/202d69a715a4b1824dcd7ec1683d027ed2bae6d3
> resulting in the following build failure with kernel < 5.0:
>
> ../hw/usb/host-libusb.c:
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