[PULL 05/30] spapr: Make PHB placement functions and spapr_pre_plug_phb() return status

2020-12-10 Thread David Gibson
From: Greg Kurz Read documentation in "qapi/error.h" and changelog of commit e3fe3988d785 ("error: Document Error API usage rules") for rationale. Signed-off-by: Greg Kurz Message-Id: <20201120234208.683521-7-gr...@kaod.org> Signed-off-by: David Gibson --- hw/ppc/spapr.c | 40

[PULL 04/30] spapr: Do NVDIMM/PC-DIMM device hotplug sanity checks at pre-plug only

2020-12-10 Thread David Gibson
From: Greg Kurz Pre-plug of a memory device, be it an NVDIMM or a PC-DIMM, ensures that the memory slot is available and that addresses don't overlap with existing memory regions. The corresponding DRCs in the LMB and PMEM namespaces are thus necessarily attachable at plug time. Pass &error_abor

[PULL 08/30] target/ppc: replaced the TODO with LOG_UNIMP and add break for silence warnings

2020-12-10 Thread David Gibson
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: target/ppc/mmu_helper.c: In function ‘dump_mmu’: target/ppc/mmu_helper.c:1351:12: warning: this statement may fall through [-Wimplicit-fallthrough=] 1351 | if (ppc64_v3_radix(env_archcpu(env)))

[PULL 02/30] spapr/xics: Drop unused argument to xics_kvm_has_broken_disconnect()

2020-12-10 Thread David Gibson
From: Greg Kurz Never used from the start. Signed-off-by: Greg Kurz Message-Id: <20201120174646.619395-6-gr...@kaod.org> Reviewed-by: Cédric Le Goater Signed-off-by: David Gibson --- hw/intc/xics_kvm.c | 2 +- hw/ppc/spapr_irq.c | 2 +- include/hw/ppc/xics_spapr.h | 2 +- 3

[PULL 00/30] ppc-for-6.0 queue 20201211

2020-12-10 Thread David Gibson
The following changes since commit 2ecfc0657afa5d29a373271b342f704a1a3c6737: Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-12-10' into staging (2020-12-10 17:01:05 +) are available in the Git repository at: https://gitlab.com/dgibson/qemu.git tags/ppc-for-6.0-20201211

[PULL 07/30] spapr: Do TPM proxy hotplug sanity checks at pre-plug

2020-12-10 Thread David Gibson
From: Greg Kurz There can be only one TPM proxy at a time. This is currently checked at plug time. But this can be detected at pre-plug in order to error out earlier. This allows to get rid of error handling in the plug handler. Signed-off-by: Greg Kurz Message-Id: <20201120234208.683521-9-gr.

[PULL 11/30] ppc/translate: Turn the helper macros into functions

2020-12-10 Thread David Gibson
From: LemonBoy Suggested-by: Richard Henderson Signed-off-by: Giuseppe Musacchio Reviewed-by: Richard Henderson Message-Id: <20201112230130.65262-3-thatle...@gmail.com> Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 228 ++-- 1 file changed, 123

[PULL 09/30] ppc: Add a missing break for PPC6xx_INPUT_TBEN

2020-12-10 Thread David Gibson
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: hw/ppc/ppc.c: In function ‘ppc6xx_set_irq’: hw/ppc/ppc.c:118:16: warning: this statement may fall through [-Wimplicit-fallthrough=] 118 | if (level) { |^ hw/ppc/ppc.c:

[PULL 10/30] ppc/translate: Fix unordered f64/f128 comparisons

2020-12-10 Thread David Gibson
From: LemonBoy According to the PowerISA v3.1 reference, Table 68 "Actions for xscmpudp - Part 1: Compare Unordered", whenever one of the two operands is a NaN the SO bit is set while the other three bits are cleared. Apply the same change to xscmpuqp. The respective ordered counterparts are un

[PULL 06/30] spapr: Do PHB hoplug sanity check at pre-plug

2020-12-10 Thread David Gibson
From: Greg Kurz We currently detect that a PHB index is already in use at plug time. But this can be decteted at pre-plug in order to error out earlier. This allows to pass &error_abort to spapr_drc_attach() and to end up with a plug handler that doesn't need to report errors anymore. Signed-of

[PULL 16/30] xive: Add trace events

2020-12-10 Thread David Gibson
From: Cédric Le Goater I have been keeping those logging messages in an ugly form for while. Make them clean ! Beware not to activate all of them, this is really verbose. Signed-off-by: Cédric Le Goater Message-Id: <20201123163717.1368450-1-...@kaod.org> Signed-off-by: David Gibson --- hw/in

[PULL 12/30] ppc/translate: Delay NaN checking after comparison

2020-12-10 Thread David Gibson
From: LemonBoy Since we always perform a comparison between the two operands avoid checking for NaN unless the result states they're unordered. Suggested-by: Richard Henderson Signed-off-by: Giuseppe Musacchio Reviewed-by: Richard Henderson Message-Id: <20201112230130.65262-4-thatle...@gmail.

[PULL 14/30] ppc/translate: Rewrite gen_lxvdsx to use gvec primitives

2020-12-10 Thread David Gibson
From: LemonBoy Make the implementation match the lxvwsx one. The code is now shorter smaller and potentially faster as the translation will use the host SIMD capabilities if available. No functional change. Signed-off-by: Giuseppe Musacchio Message-Id: Reviewed-by: Richard Henderson Signed-

[PULL 13/30] ppc/translate: Raise exceptions after setting the cc

2020-12-10 Thread David Gibson
From: LemonBoy The PowerISA reference states that the comparison operators update the FPCC, CR and FPSCR and, if VE=1, jump to the exception handler. Moving the exception-triggering code after the CC update sequence solves the problem. Signed-off-by: Giuseppe Musacchio Reviewed-by: Richard Hen

[PULL 19/30] spapr: Simplify error path of spapr_core_plug()

2020-12-10 Thread David Gibson
From: Greg Kurz spapr_core_pre_plug() already guarantees that the slot for the given core ID is available. It is thus safe to assume that spapr_find_cpu_slot() returns a slot during plug. Turn the error path into an assertion. It is also safe to assume that no device is attached to the correspond

[PULL 15/30] hw/ppc/spapr_tpm_proxy: Fix hexadecimal format string specifier

2020-12-10 Thread David Gibson
From: Philippe Mathieu-Daudé The '%u' conversion specifier is for decimal notation. When prefixing a format with '0x', we want the hexadecimal specifier ('%x'). Inspired-by: Dov Murik Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20201103112558.2554390-4-phi...@redhat.com> Reviewed-by: Gr

[PULL 18/30] spapr: Abort if ppc_set_compat() fails for hot-plugged CPUs

2020-12-10 Thread David Gibson
From: Greg Kurz When a CPU is hot-plugged, we set its compat mode to match the boot CPU, which was either set by machine reset or by CAS. This is currently handled in the plug handler after the core got realized. Potential errors of ppc_set_compat() are propagated to the hot-plug logic. Handling

[PULL 22/30] hw/ppc: Do not re-read the clock on pre_save if doing savevm

2020-12-10 Thread David Gibson
From: Greg Kurz A guest with enough RAM, eg. 128G, is likely to detect savevm downtime and to complain about stalled CPUs. This happens because we re-read the timebase just before migrating it and we thus don't account for all the time between VM stop and pre-save. A very similar situation was a

[PULL 17/30] spapr: Fix pre-2.10 dummy ICP hack

2020-12-10 Thread David Gibson
From: Greg Kurz This hack registers dummy VMState entries of ICPs in order to support migration of old pseries machine types that used to create all smp.max_cpus possible ICPs at machine init. Part of the work is to unregister the dummy entries when plugging an actual vCPU core, and to register

[PULL 20/30] spapr: spapr_drc_attach() cannot fail

2020-12-10 Thread David Gibson
From: Greg Kurz All users are passing &error_abort already. Document the fact that spapr_drc_attach() should only be passed a free DRC, which is supposedly the case if appropriate checking is done earlier. Signed-off-by: Greg Kurz Message-Id: <20201201113728.885700-5-gr...@kaod.org> Signed-off-

[PULL 29/30] spapr: Pass sPAPR machine state to some RTAS events handling functions

2020-12-10 Thread David Gibson
From: Greg Kurz Some functions in hw/ppc/spapr_events.c get a pointer to the machine state using qdev_get_machine(). Convert them to get it from their caller when possible. Signed-off-by: Greg Kurz Message-Id: <20201209170052.1431440-6-gr...@kaod.org> Signed-off-by: David Gibson --- hw/ppc/sp

[PULL 24/30] ppc/e500: Free irqs array to avoid memleak

2020-12-10 Thread David Gibson
From: Gan Qixin When running qom-test, a memory leak occurred in the ppce500_init function, this patch free irqs array to fix it. ASAN shows memory leak stack: Direct leak of 40 byte(s) in 1 object(s) allocated from: #0 0xfffc5ceee1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0)

[PULL 23/30] MAINTAINERS: Add Greg Kurz as co-maintainer for ppc

2020-12-10 Thread David Gibson
Greg has agreed to be co-maintainer of the ppc target and machines. This should avoid repeats of the problem we had in qemu-5.2 where a last minute fix was needed while I was on holiday. Signed-off-by: David Gibson Acked-by: Greg Kurz --- MAINTAINERS | 17 - 1 file changed, 16 i

[PULL 21/30] target/ppc: Remove "compat" property of server class POWER CPUs

2020-12-10 Thread David Gibson
From: Greg Kurz This property has been deprecated since QEMU 5.0 by commit 22062e54bb68. We only kept a legacy hack that internally converts "compat" into the official "max-cpu-compat" property of the pseries machine type. According to our deprecation policy, we could have removed it for QEMU 5.

[PULL 28/30] spapr: Don't use qdev_get_machine() in spapr_msi_write()

2020-12-10 Thread David Gibson
From: Greg Kurz spapr_phb_realize() passes the sPAPR machine state as opaque data for the I/O callbacks: memory_region_init_io(&sphb->msiwindow, OBJECT(sphb), &spapr_msi_ops, spapr, ^ "msi", msi_windo

[PULL 26/30] target/ppc: Introduce an mmu_is_64bit() helper

2020-12-10 Thread David Gibson
From: Greg Kurz Callers don't really need to know how 64-bit MMU model enums are computed. Hide this in a helper. Signed-off-by: Greg Kurz Message-Id: <20201209173536.1437351-3-gr...@kaod.org> Signed-off-by: David Gibson --- target/ppc/cpu-qom.h| 5 + target/ppc/excp_helper.c

[PULL 30/30] spapr.c: set a 'kvm-type' default value instead of relying on NULL

2020-12-10 Thread David Gibson
From: Daniel Henrique Barboza spapr_kvm_type() is considering 'vm_type=NULL' as a valid input, where the function returns 0. This is relying on the current QEMU machine options handling logic, where the absence of the 'kvm-type' option will be reflected as 'vm_type=NULL' in this function. This i

[PULL 25/30] ppc/translate: Use POWERPC_MMU_64 to detect 64-bit MMU models

2020-12-10 Thread David Gibson
From: Stephane Duverger The ppc_tr_init_disas_context() function currently checks whether the MMU is 64-bit by ANDing its model type with POWERPC_MMU_64B. This is wrong : POWERPC_MMU_64B isn't a mask, it is the generic MMU model for pre-PowerISA-2.03 64-bit CPUs (ie. PowerPC 970 in QEMU). Use PO

[PULL 27/30] spapr: Pass sPAPR machine state down to spapr_pci_switch_vga()

2020-12-10 Thread David Gibson
From: Greg Kurz This allows to drop a user of qdev_get_machine(). Signed-off-by: Greg Kurz Message-Id: <20201209170052.1431440-4-gr...@kaod.org> Signed-off-by: David Gibson --- hw/ppc/spapr_hcall.c | 7 --- hw/ppc/spapr_pci.c | 3 +-- include/hw/ppc/spapr.h | 2 +- 3 files changed,

Re: [PATCH v3 07/13] compiler.h: explicit case for Clang printf attribute

2020-12-10 Thread Michael Tokarev
10.12.2020 16:47, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau Since clang doesn't support gnu_printf, make that case explicitely and drop GCC version check. Not a technical comment, - spelling "explicitely", extra "e". /mjt

[PATCH 2/2] target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU

2020-12-10 Thread Rebecca Cran
Enable FEAT_DIT for the "max" AARCH64 CPU. Signed-off-by: Rebecca Cran --- target/arm/cpu64.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 649213082ff9..223e0bfd22c2 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -641,6 +641,

[PATCH 0/2] target/arm: Add support for DIT (Data Independent Timing)

2020-12-10 Thread Rebecca Cran
This series adds support for DIT (Data Independent Timing), and then enables it for the "max" aarch64 CPU type. Rebecca Cran (2): target/arm: add support for FEAT_DIT, Data Independent Timing target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU target/arm/cpu.h

[PATCH 1/2] target/arm: add support for FEAT_DIT, Data Independent Timing

2020-12-10 Thread Rebecca Cran
Add support for FEAT_DIT. DIT (Data Independent Timing) is a required feature for ARMv8.4. Since virtual machine execution is largely nondeterministic, it's implemented as a NOP. Signed-off-by: Rebecca Cran --- target/arm/cpu.h | 20 +- target/arm/helper.c| 28 +

Re: [PATCH] hw/block: m25p80: Fix fast read for SST flashes

2020-12-10 Thread Bin Meng
Hi Francisco, On Fri, Dec 4, 2020 at 7:28 PM Francisco Iglesias wrote: > > Hello Bin, > > On [2020 Dec 04] Fri 18:52:50, Bin Meng wrote: > > Hi Francisco, > > > > On Fri, Dec 4, 2020 at 6:46 PM Francisco Iglesias > > wrote: > > > > > > Hello Bin, > > > > > > On [2020 Dec 04] Fri 15:52:12, Bin Me

Re: [PATCH] hw/block: m25p80: Implement AAI-WP command support for SST flashes

2020-12-10 Thread Bin Meng
Hi Francisco, On Thu, Dec 3, 2020 at 8:54 PM Francisco Iglesias wrote: > > Hello Bin, > > On [2020 Dec 02] Wed 22:30:37, Bin Meng wrote: > > From: Xuzhou Cheng > > > > Auto Address Increment (AAI) Word-Program is a special command of > > SST flashes. AAI-WP allows multiple bytes of data to be pr

Re: [PATCH v2 2/8] gitlab: include aarch64-softmmu and ppc64-softmmu cross-system-build

2020-12-10 Thread Thomas Huth
On 10/12/2020 20.04, Alex Bennée wrote: > Otherwise we miss coverage of KVM support in the cross build. To > balance it out add arm-softmmu (no kvm, subset of aarch64), > cris-softmmu and ppc-softmmu to the exclude list which do get coverage > elsewhere. > > Signed-off-by: Alex Bennée > --- > .g

Re: [PATCH v2 7/8] gitlab: add --without-default-features build

2020-12-10 Thread Thomas Huth
On 10/12/2020 20.04, Alex Bennée wrote: > Signed-off-by: Alex Bennée > > --- > v2 > - swap with centos8, don't include --without-default-devuces > --- > .gitlab-ci.yml | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml > index 2134453717..229545bc0

Re: [PATCH v2 6/8] gitlab: move --without-default-devices build from Travis

2020-12-10 Thread Thomas Huth
On 10/12/2020 20.04, Alex Bennée wrote: > Signed-off-by: Alex Bennée > > --- > v2 > - move to centos8 > --- > .gitlab-ci.yml | 7 +++ > .travis.yml| 8 > 2 files changed, 7 insertions(+), 8 deletions(-) Reviewed-by: Thomas Huth

Re: [PATCH v2 1/8] configure: include moxie-softmmu in deprecated_targets_list

2020-12-10 Thread Thomas Huth
On 10/12/2020 20.04, Alex Bennée wrote: > We still build it but there is no point including it in the normal > builds as it is ushered out of the door. > > Fixes: 4258c8e221 ("docs/system/deprecated: Mark the 'moxie' CPU as > deprecated") > Signed-off-by: Alex Bennée > --- > configure | 2

[PATCH v2 1/2] hw/block: m25p80: Don't write to flash if write is disabled

2020-12-10 Thread Bin Meng
From: Bin Meng When write is disabled, the write to flash should be avoided in flash_write8(). Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device") Signed-off-by: Bin Meng --- Changes in v2: - new patch: honor write enable flag in flash write hw/block/m25p80.c | 1 + 1

[PATCH v2 2/2] hw/block: m25p80: Implement AAI-WP command support for SST flashes

2020-12-10 Thread Bin Meng
From: Xuzhou Cheng Auto Address Increment (AAI) Word-Program is a special command of SST flashes. AAI-WP allows multiple bytes of data to be programmed without re-issuing the next sequential address location. Signed-off-by: Xuzhou Cheng Signed-off-by: Bin Meng --- Changes in v2: - add aai_en

[PATCH v3 2/2] hw/block: m25p80: Implement AAI-WP command support for SST flashes

2020-12-10 Thread Bin Meng
From: Xuzhou Cheng Auto Address Increment (AAI) Word-Program is a special command of SST flashes. AAI-WP allows multiple bytes of data to be programmed without re-issuing the next sequential address location. Signed-off-by: Xuzhou Cheng Signed-off-by: Bin Meng --- Changes in v3: - initialize

[PATCH v3 1/2] hw/block: m25p80: Don't write to flash if write is disabled

2020-12-10 Thread Bin Meng
From: Bin Meng When write is disabled, the write to flash should be avoided in flash_write8(). Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device") Signed-off-by: Bin Meng --- (no changes since v2) Changes in v2: - new patch: honor write enable flag in flash write hw/

Re: [PATCH v11 00/13] hw/block/nvme: Support Namespace Types and Zoned Namespace Command Set

2020-12-10 Thread Klaus Jensen
On Dec 10 19:25, Dmitry Fomichev wrote: > > -Original Message- > > From: Klaus Jensen > > Sent: Wednesday, December 9, 2020 4:58 AM > > To: Dmitry Fomichev > > Cc: Keith Busch ; Klaus Jensen > > ; Kevin Wolf ; Philippe > > Mathieu-Daudé ; Max Reitz ; > > Maxim Levitsky ; Fam Zheng ; > > N

Re: [PATCH] audio: Simplify audio_bug() removing old code

2020-12-10 Thread Marc-André Lureau
On Fri, Dec 11, 2020 at 2:35 AM Philippe Mathieu-Daudé wrote: > > This code (introduced in commit 1d14ffa97ea, Oct 2005) > is likely unused since years. Time to remove it. If > the condition is true, simply call abort(). > > Suggested-by: Gerd Hoffmann > Signed-off-by: Philippe Mathieu-Daudé I

Re: [PATCH v2 4/8] configure: add --without-default-features

2020-12-10 Thread Thomas Huth
On 10/12/2020 20.04, Alex Bennée wrote: > By default QEMU enables a lot of features if it can probe and find the > support libraries. It also enables a bunch of features by default. > This patch adds the ability to build --without-default-features which > can be paired with a --without-default-devi

Re: [PATCH v2 8/8] tests/tcg: build tests with -Werror

2020-12-10 Thread Thomas Huth
On 10/12/2020 20.04, Alex Bennée wrote: > Hopefully this will guard against sloppy code getting into our tests. > > Suggested-by: Paolo Bonzini > Signed-off-by: Alex Bennée > --- > tests/tcg/Makefile.target | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tests/tcg/Make

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