On 10/16/20 8:51 AM, Huacai Chen wrote:
From: Jiaxun Yang
LDC2/SDC2 opcodes have been rewritten as "load & store with offset"
group of instructions by loongson-ext ASE.
This patch add implementation of these instructions:
gslbx: load 1 bytes to GPR
gslhx: load 2 bytes to GPR
gslwx: load 4 byte
Hello Darren, all
+-- On Thu, 1 Oct 2020, Darren Kenny wrote --+
| On Thursday, 2020-10-01 at 16:05:58 +0530, P J P wrote:
| > - A list member triaging such issue, would have to select their individual
| > keys for each reply.
|
| Maybe, honestly not had to deal with it personally.
"Ideal
Hi Huacai,
On 10/16/20 8:51 AM, Huacai Chen wrote:
Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a
UEFI-like interface for BIOS-Kernel boot parameters) helpers first.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
From the kernel documentation [*] on the "Co-d
On 10/16/20 8:52 AM, Huacai Chen wrote:
Add Loongson-3A CPU models and Loongson-3 based machine description.
Signed-off-by: Huacai Chen
---
docs/system/cpu-models-mips.rst.inc | 10 --
docs/system/target-mips.rst | 10 ++
2 files changed, 18 insertions(+), 2 deletion
15.10.2020 20:37, Andrey Shinkevich wrote:
On 15.10.2020 18:56, Max Reitz wrote:
On 14.10.20 20:57, Andrey Shinkevich wrote:
On 14.10.2020 15:01, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
Limit COR operations by the base node in the backing chain when the
overlay base node
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant
---
hw/mips/cps.c
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant
---
include/hw/semihosting/semiho
On 201016 1532, Paolo Bonzini wrote:
> On 15/10/20 15:41, Alexander Bulekov wrote:
> > +typedef struct general_fuzz_config {
> > +const char *name, *args, *objects;
> > +} general_fuzz_config;
> > +
> > +GArray *get_general_fuzz_configs(void);
>
> Can't it be even a "const struct general_fuzz_
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant
---
hw/intc/xics_pnv.c |
Public bug reported:
As of commit 3e407488349:
$ avocado --show=console run -t machine:malta
tests/acceptance/boot_linux_console.py
console: [0.00] Linux version 4.5.0-2-4kc-malta
(debian-ker...@lists.debian.org) (gcc version 5.3.1 20160519 (Debian 5.3.1-20)
) #1 Debian 4.5.5-1 (20
Hi,
I have a problem with the RISC-V HTIF device.
Every binary I have compiled for Spike on riscv32 fails with the following
error message: "HTIF tohost must be 8 bytes"
This happens regardless of which program I have translated for Spike. This is
also the case with the official riscv-complia
- Background
The VM Generation ID is a feature defined by Microsoft (paper:
http://go.microsoft.com/fwlink/?LinkId=260709) and supported by
multiple hypervisor vendors.
The feature is required in virtualized environments by apps that work
with local copies/caches of world-unique data such as rand
Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
reporting a STORE/AMO Access Fault.
This region is used by the PolarFire SoC port of U-Boot to
interact with the FPGA system controller.
Signed-off-by: Ivan Griffin
---
hw/riscv/microchip_pfsoc.c | 6 ++
include/hw/ris
On Tue, Oct 13, 2020 at 10:05:11AM -0400, Jason Andryuk wrote:
> Xen was broken by commit 1583a3898853 ("cpus: extract out qtest-specific
> code to accel/qtest"). Xen relied on qemu_init_vcpu() calling
> qemu_dummy_start_vcpu() in the default case, but that was replaced by
> g_assert_not_reached()
Sorry, I forgot to add a few people interested in this and the KVM ML to CC.
Added them.
On 16/10/2020, 17:33, "Catangiu, Adrian Costin" wrote:
- Background
The VM Generation ID is a feature defined by Microsoft (paper:
http://go.microsoft.com/fwlink/?LinkId=260709) and suppor
On 15.10.2020 20:16, Andrey Shinkevich wrote:
On 14.10.2020 19:24, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
[...]
---
block/stream.c | 93
+-
tests/qemu-iotests/030 | 51 +++--
tests/qem
On 10/16/20 8:51 AM, Huacai Chen wrote:
From: Jiaxun Yang
LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.
This patch add implementation of these instructions:
gslq: load 16 bytes to GPR
gssq: store 16 bytes f
On Fri, Oct 16, 2020 at 02:33:15PM +, Catangiu, Adrian Costin wrote:
> +config VMGENID
> + tristate "Virtual Machine Generation ID driver"
> + depends on ACPI
> + default M
Unless this is required to boot a machine, this should be removed.
> + help
> + This is a Virtual
On 10/16/20 8:51 AM, Huacai Chen wrote:
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page si
Hi Cédric,
On 9/19/20 2:30 PM, Philippe Mathieu-Daudé wrote:
On 9/12/20 3:40 PM, Philippe Mathieu-Daudé wrote:
Hello,
These patches are part of the GSoC unselected 'QEMU visualizer'
project.
This series introduce a LED device that can be easily connected
to a GPIO output.
[...]
Philippe Mat
Ping again, as no progress since september 22.
http://patchwork.ozlabs.org/project/qemu-devel/list/?series=203284
21.09.2020, 22:19, "Alexey Kirillov" :
> This patch series introduces a new QMP command "query-netdev" to get
> information about currently attached backend network devices (netdevs).
On Thu, 15 Oct 2020 09:16:07 -0400
Matthew Rosato wrote:
> Currently, a subsystem reset event leaves PCI devices enabled, causing
> issues post-reset in the guest (an example would be after a kexec). These
> devices need to be reset during a subsystem reset, allowing them to be
> properly re-ena
On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> xen-save-devices-state doesn't currently generate a vmdesc, so restore
> always triggers "Expected vmdescription section, but got 0". This is
> not a problem when restore comes from a file. However, when QEMU runs
> in a linux stubd
On 10/15/20 1:25 PM, Pavel Dovgalyuk wrote:
This patch adds MIPS-targeted acceptance tests for
record/replay functions.
Signed-off-by: Pavel Dovgalyuk
---
0 files changed
diff --git a/tests/acceptance/replay_kernel.py
b/tests/acceptance/replay_kernel.py
index 952f429cac..6c3d1ec3fb 100644
-
15.10.2020 20:16, Andrey Shinkevich wrote:
On 14.10.2020 19:24, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
[...]
---
block/stream.c | 93 +-
tests/qemu-iotests/030 | 51 +++--
tests/qemu-iot
The following changes since commit 3e40748834923798aa57e3751db13a069e2c617b:
Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20201014' into staging
(2020-10-15 20:30:24 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fe
From: Yonggang Luo
Signed-off-by: Yonggang Luo
Message-Id: <20201015220626.418-4-luoyongg...@gmail.com>
Signed-off-by: Paolo Bonzini
---
configure | 59 ---
docs/meson.build | 46
meson.build | 30 +
On Fri, Oct 16, 2020 at 11:38 AM Anthony PERARD
wrote:
>
> On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> > xen-save-devices-state doesn't currently generate a vmdesc, so restore
> > always triggers "Expected vmdescription section, but got 0". This is
> > not a problem when rest
Chetan Pant writes:
> There is no "version 2" of the "Lesser" General Public License.
> It is either "GPL version 2.0" or "Lesser GPL version 2.1".
> This patch replaces all occurrences of "Lesser GPL version 2" with
> "Lesser GPL version 2.1" in comment section.
>
> Signed-off-by: Chetan Pant
On Fri, Oct 16, 2020 at 8:04 AM Ivan Griffin wrote:
>
> Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
> reporting a STORE/AMO Access Fault.
>
> This region is used by the PolarFire SoC port of U-Boot to
> interact with the FPGA system controller.
>
> Signed-off-by: Ivan Griffin
Richard Henderson writes:
> Because of FloatParts, there will only ever be one caller.
Isn't that admitting defeat - after all the logic here will be the same
as the login in the up coming float128_muladd code and we only seem to
need additional information:
> Inlining allows us to re-use abc
I don't know why it isn't documented in that PDF (or in the register map), but
if you check
https://github.com/polarfire-soc/polarfire-soc-bare-metal-library/blob/master/src/platform/drivers/mss_sys_services/mss_sys_services.h
you'll see the following
```
typedef struct
{
volatile uint32_t
Richard Henderson writes:
> Signed-off-by: Richard Henderson
> ---
> include/fpu/softfloat.h | 2 +
> fpu/softfloat.c | 416 +++-
> tests/fp/fp-test.c | 2 +-
> tests/fp/wrap.c.inc | 12 ++
> 4 files changed, 430 insertions(+), 2 delet
On Fri, Oct 16, 2020 at 9:31 AM Ivan Griffin wrote:
>
> I don't know why it isn't documented in that PDF (or in the register map),
> but if you check
> https://github.com/polarfire-soc/polarfire-soc-bare-metal-library/blob/master/src/platform/drivers/mss_sys_services/mss_sys_services.h
> you'll
On 10/16/20 9:20 AM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> Because of FloatParts, there will only ever be one caller.
>
> Isn't that admitting defeat - after all the logic here will be the same
> as the login in the up coming float128_muladd code and we only seem to
> need addit
On Thu, 15 Oct 2020 at 13:55, Gerd Hoffmann wrote:
>
> The following changes since commit 57c98ea9acdcef5021f5671efa6475a5794a51c4:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201014-pull-request'
> into staging (2020-10-14 13:56:06 +0100)
>
> are available in the Git repository
** Description changed:
**Description:**
Any attempt to work with video in aarch64 architecture emulated on x86_64
leads currently to the error "Function not implemented". For example:
```
# v4l2-ctl -l --verbose
Failed to open /dev/video0: Function not implemented
root@12dd9b6f
On Fri, Oct 16, 2020 at 12:01:47PM -0400, Jason Andryuk wrote:
> On Fri, Oct 16, 2020 at 11:38 AM Anthony PERARD
> wrote:
> >
> > On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> > > xen-save-devices-state doesn't currently generate a vmdesc, so restore
> > > always triggers "Expec
On 10/12/20 11:57 AM, Philippe Mathieu-Daudé wrote:
Since v3:
- Introduced mips_cpu_create_with_clock() helper (Huacai)
- Added R-b tags
Since v2:
- Renamed "clk" -> "clk-in"
- Renamed "cpuclk-out -> "cpu-refclk"
Missing review: patches 7, 10-13, 15-21
~~~
All the MIPS cores emulated by QEMU
On 10/16/20 8:51 AM, Huacai Chen wrote:
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we just
On 10/16/20 5:40 PM, Philippe Mathieu-Daudé wrote:
On 10/15/20 1:25 PM, Pavel Dovgalyuk wrote:
This patch adds MIPS-targeted acceptance tests for
record/replay functions.
Signed-off-by: Pavel Dovgalyuk
---
0 files changed
diff --git a/tests/acceptance/replay_kernel.py
b/tests/acceptance/re
Cc'ing qemu-trivial@ since this patch is reviewed.
On 10/15/20 8:12 PM, Philippe Mathieu-Daudé wrote:
ping^2...
On 10/1/20 7:31 PM, Philippe Mathieu-Daudé wrote:
ping qemu-block or qemu-arm?
On 9/15/20 7:16 PM, Philippe Mathieu-Daudé wrote:
This is the QEMU equivalent of this Linux commit (b
On 10/16/20 9:31 AM, Alex Bennée wrote:
>> +static void float128_unpack(FloatParts128 *p, float128 a, float_status
>> *status)
>> +{
>> +p->sign = extractFloat128Sign(a);
>> +p->exp = extractFloat128Exp(a);
>> +p->frac0 = extractFloat128Frac0(a);
>> +p->frac1 = extractFloat128Frac1
On Fri, Oct 16, 2020 at 12:44 PM Anthony PERARD
wrote:
>
> On Fri, Oct 16, 2020 at 12:01:47PM -0400, Jason Andryuk wrote:
> > On Fri, Oct 16, 2020 at 11:38 AM Anthony PERARD
> > wrote:
> > >
> > > On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> > > > xen-save-devices-state doesn'
On 9/25/20 5:20 PM, Richard Henderson wrote:
No reason to set values in 'a', when we already
have float_class_inf in 'c', and can flip that sign.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
fpu/softfloat.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
reporting a STORE/AMO Access Fault.
This region is used by the PolarFire SoC port of U-Boot to
interact with the FPGA system controller.
Signed-off-by: Ivan Griffin
---
hw/riscv/microchip_pfsoc.c | 10 ++
include/h
v3:
08: update comment, add Alberto's r-b
09: update comment, add Alberto's and Greg's r-bs
10: add Alberto's r-b
12: Update commit msg, add Alberto's and Greg's r-bs
13: add Greg's r-b
Vladimir Sementsov-Ogievskiy (13):
block: return status from bdrv_append and friends
block: use return statu
We leak local_err and don't report failure to the caller. It's
definitely wrong, let's fix.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
blockdev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/blockdev.c b/blockdev.
On 10/11/20 8:26 PM, Luc Michel wrote:
On 18:18 Sat 10 Oct , Philippe Mathieu-Daudé wrote:
On 10/10/20 3:57 PM, Luc Michel wrote:
Those reset values have been extracted from a Raspberry Pi 3 model B
v1.2, using the 2020-08-20 version of raspios. The dump was done using
the debugfs interface
The recommended use of qemu error api assumes returning status together
with setting errp and avoid void functions with errp parameter. Let's
improve bdrv_append and some friends to reduce error-propagation
overhead in further patches.
Choose int return status, because bdrv_replace_node() has call
This patch is generated by cocci script:
@@
symbol bdrv_open_child, errp, local_err;
expression file;
@@
file = bdrv_open_child(...,
-&local_err
+errp
);
- if (local_err)
+ if (!file)
{
...
- error_propagate(err
Now bdrv_append returns status and we can drop all the local_err things
around it.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
block.c | 5 +
block/backup-top.c | 20
block/commit.c
Don't use error propagation in qcow2_get_specific_info(). For this
refactor qcow2_get_bitmap_info_list, its current interface is rather
weird.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
block/qcow2.h| 4 ++--
block/qcow2-bitmap.c
Better to return status together with setting errp. It allows to avoid
error propagation in the caller.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
include/block/blockjob.h | 2 +-
blockjob.c | 18 --
2 files
bdrv_set_backing_hd now returns status, let's use it.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
block.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/block.c b/block.c
index 7b6818c681..a35dc80dd4 100644
--- a
On 10/15/20 11:05 AM, Alexey Baturo wrote:
> Meanwhile, do you think applying **MTE *masks while reading CSR values is a
> good solution for now?
Yes.
r~
It's better to return status together with setting errp. It makes
possible to avoid error propagation.
While being here, put ERRP_GUARD() to fix error_prepend(errp, ...)
usage inside qcow2_store_persistent_dirty_bitmaps() (see the comment
above ERRP_GUARD() definition in include/qapi/error.h)
Sig
On 10/15/20 11:56 AM, Victor Kamensky (kamensky) via wrote:
> Is possible to come back to 34Kf route, doing
> very small localized very well defined change
> of bumping TLBs number for model that we know
> works well for us?
Yes, thanks for testing.
I think we should also add a property to enable
Let's check return value of mirror_start_job to check for failure
instead of local_err.
Rename ret to job, as ret is usually integer variable.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
block/mirror.c | 12 +---
1 file changed, 5
It's recommended for bool functions with errp to return true on success
and false on failure. Non-standard interfaces don't help to understand
the code. The change is also needed to reduce error propagation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Gre
qcow2_do_open correctly sets errp on each failure path. So, we can
simplify code in qcow2_co_invalidate_cache() and drop explicit error
propagation.
Add ERRP_GUARD() as mandated by the documentation in
include/qapi/error.h so that error_prepend() is actually called even if
errp is &error_fatal.
S
Set errp always on failure. Generic bdrv_open_driver supports driver
functions which can return negative value and forget to set errp.
That's a strange thing.. Let's improve bdrv_qed_do_open to not behave
this way. This allows to simplify code in
bdrv_qed_co_invalidate_cache().
Signed-off-by: Vlad
It's better to return status together with setting errp. It allows to
reduce error propagation.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Greg Kurz
Reviewed-by: Alberto Garcia
---
block/qcow2.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --gi
On 10/10/20 3:57 PM, Luc Michel wrote:
[...]
Hi,
This series add the BCM2835 CPRMAN clock manager peripheral to the
Raspberry Pi machine.
Series:
Tested-by: Philippe Mathieu-Daudé
On 10/16/20 6:33 AM, Philippe Mathieu-Daudé wrote:
> Per "MIPS32 34K Processor Core Family Software User's Manual,
> Revision 01.13" page 8 in "Joint TLB (JTLB)" section:
>
> "The JTLB is a fully associative TLB cache containing 16, 32,
>or 64-dual-entries mapping up to 128 virtual pages to
On Fri, Oct 16, 2020 at 10:10 AM Ivan Griffin wrote:
>
> Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
> reporting a STORE/AMO Access Fault.
>
> This region is used by the PolarFire SoC port of U-Boot to
> interact with the FPGA system controller.
>
> Signed-off-by: Ivan Griffin
A small update:
As per Stefano's suggestion, disabling io_uring support from QEMU from
the configuration step did fix the problem and I'm no longer having
hangs.
Looks like it __is__ an io_uring issue :(
Btw, I used liburing fe50048 for linking QEMU.
Thanks.
On Fri, Oct 2, 2020 at 4:35 PM Ste
On 10/16/20 12:04 PM, Ju Hyung Park wrote:
> A small update:
>
> As per Stefano's suggestion, disabling io_uring support from QEMU from
> the configuration step did fix the problem and I'm no longer having
> hangs.
>
> Looks like it __is__ an io_uring issue :(
Would be great if you could try 5.4
On Fri, Oct 16, 2020 at 7:59 AM Peer Adelt wrote:
>
> Hi,
>
> I have a problem with the RISC-V HTIF device.
>
> Every binary I have compiled for Spike on riscv32 fails with the following
> error message: "HTIF tohost must be 8 bytes"
>
> This happens regardless of which program I have translated
After a migration the clock offset is updated, but we also
need to re-arm the alarm if needed.
Signed-off-by: Laurent Vivier
---
hw/rtc/goldfish_rtc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c
index 0f4e8185a796..e07ff0164e0c 100644
--- a
This patchset is inspired by Philippe's "hw/rtc/m48t59: Simplify m48t59_init()"
patchset at https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg04493.html
but goes further: rather than tidy-up the legacy init functions, convert the
callers to use qdev properties directly so they can simply be
Signed-off-by: Mark Cave-Ayland
---
hw/sparc64/sun4u.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index ad5ca2472a..05e659c8a4 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -671,10 +671,13 @@ static void sun4uv_
This function is no longer used within the codebase.
Signed-off-by: Mark Cave-Ayland
---
hw/rtc/m48t59-isa.c | 25 -
include/hw/rtc/m48t59.h | 2 --
2 files changed, 27 deletions(-)
diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c
index cae315e488..dc21fb10a5
Signed-off-by: Mark Cave-Ayland
---
hw/sparc/sun4m.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 54a2b2f9ef..a9bb60f2b2 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -966,7 +966,13 @@ static void sun4m_hw_init(cons
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/ppc405_boards.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 6198ec1035..4687715b15 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -28,6 +28,8 @@
Now that all of the callers of this function have been switched to use qdev
properties, this legacy init function can now be removed.
Signed-off-by: Mark Cave-Ayland
---
hw/rtc/m48t59.c | 35 ---
include/hw/rtc/m48t59.h | 4
2 files changed, 39 delet
The kernel abi for this was merged in v5.8, just as the qemu 5.1
merge window was closing, so this slipped to the next dev cycle.
Changes from v10:
* Include Phil's plug of interp_name memory leak.
* Convert error reporting to Error api.
* Mirror the kernel's code structure for parsing notes
The kernel sets btype for the signal handler as if for a call.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
linux-user/aarch64/signal.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c
ind
From: Philippe Mathieu-Daudé
Fix an unlikely memory leak in load_elf_image().
Fixes: bf858897b7 ("linux-user: Re-use load_elf_image for the main binary.")
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201003174944.1972444-1-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
linux-us
The second loop uses a loop induction variable, and the first
does not. Transform the first to match the second, to simplify
a following patch moving code between them.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff
Fixing this now will clarify following patches.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 1a3150df7c..290ef70222 100644
--- a/linux-user/elfload.c
++
For BTI, we need to know if the executable is static or dynamic,
which means looking for PT_INTERP earlier.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 60 +++-
1 file changed, 31 insertions(+), 29 deletions(-)
diff --git a/linux-user/elfl
These are all of the defines required to parse
GNU_PROPERTY_AARCH64_FEATURE_1_AND, copied from binutils.
Other missing defines related to other GNU program headers
and notes are elided for now.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/elf.h | 22 ++
This is a bit clearer than open-coding some of this
with a bare c string.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 37 -
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 107a62
Transform the prot bit to a qemu internal page bit, and save
it in the page tables.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
v10: Add PAGE_BTI define (pmm).
---
include/exec/cpu-all.h | 2 ++
linux-user/syscall_defs.h | 4
target/arm/cpu.h | 5 +
This is generic support, with the code disabled for all targets.
Signed-off-by: Richard Henderson
---
v9: Only map the startup executable with BTI; anything else must be
handled by the interpreter.
v10: Split out preparatory patches (pmm).
v11: Mirror(-ish) the kernel's code structure (pmm).
This is slightly clearer than just using strerror, though
the different forms produced by error_setg_file_open and
error_setg_errno isn't entirely convenient.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --g
Use the new generic support for NT_GNU_PROPERTY_TYPE_0.
Signed-off-by: Richard Henderson
---
v11: Split out aarch64 bits from generic patch.
---
linux-user/elfload.c | 48 ++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/linux-user/elflo
The note test requires gcc 10 for -mbranch-protection=standard.
The mmap test uses PROT_BTI and does not require special compiler support.
Acked-by: Alex Bennée
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
v9: Expect and require gcc 10.
v11: Squash mmap smoke test.
---
tests
Patchew URL:
https://patchew.org/QEMU/20201016184207.786698-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201016184207.786698-1-richard.hender...@linaro.org
Subject: [PATCH v11 00/12]
On Thu, 15 Oct 2020 at 15:50, Kevin Wolf wrote:
>
> The following changes since commit 57c98ea9acdcef5021f5671efa6475a5794a51c4:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201014-pull-request'
> into staging (2020-10-14 13:56:06 +0100)
>
> are available in the Git repository at:
On Fri, Oct 16, 2020 at 11:16 AM Laurent Vivier wrote:
>
> After a migration the clock offset is updated, but we also
> need to re-arm the alarm if needed.
>
> Signed-off-by: Laurent Vivier
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/rtc/goldfish_rtc.c | 2 ++
> 1 file changed, 2 inser
On 10/9/20 4:47 PM, Philippe Mathieu-Daudé wrote:
Hi Aleksandar,
On 10/7/20 10:37 PM, Aleksandar Markovic wrote:
This change causes slighlty better performance of emulation of fp
comparison instructions via better compiler optimization of refactored
code. The functionality is otherwise unchange
Le 16/10/2020 à 20:27, Mark Cave-Ayland a écrit :
This patchset is inspired by Philippe's "hw/rtc/m48t59: Simplify m48t59_init()"
patchset at https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg04493.html
but goes further: rather than tidy-up the legacy init functions, convert the
callers to
Replace the --enable-git-update and --disable-git-update configure params
with the param --with-git-submodules=(update|validate|ignore) to
allow 3 options for building from a git repo.
This is needed because downstream packagers, e.g. Debian, Ubuntu, etc,
also keep the source code in git, but do n
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/ppc405_boards.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 6198ec1035..4687715b15 100644
--- a/hw/ppc/ppc405_boards.c
++
On Fri, Oct 2, 2020 at 9:11 AM Daniel P. Berrangé wrote:
>
> On Wed, Sep 30, 2020 at 09:28:54PM -0400, Dan Streetman wrote:
> > On Tue, Sep 22, 2020 at 12:34 PM Daniel P. Berrangé
> > wrote:
> > >
> > > On Wed, Jul 29, 2020 at 03:58:29PM -0400, Dan Streetman wrote:
> > > > The --disable-git-upda
Since the FAR_ELx fix at 38d931687fa1, it is reported that
page granularity flushing is broken.
This makes sense, since TCG will record the entire virtual
address in its TLB, not simply the 56 significant bits.
With no other TCG support, the ARM backend should require
256 different page flushes to
When TBI is enabled in a given regime, 56 bits of the address
are significant and we need to clear out any other matching
virtual addresses with differing tags.
The other uses of tlb_flush_page (without mmuidx) in this file
are only used by aarch32 mode.
Fixes: 38d931687fa1
Reported-by: Jordan Fr
On ARM, the Top Byte Ignore feature means that only 56 bits of
the address are significant in the virtual address. We are
required to give the entire 64-bit address to FAR_ELx on fault,
which means that we do not "clean" the top byte early in TCG.
This new interface allows us to flush all 256 pos
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