On Sun, Oct 11, 2020 at 09:03:32PM +0200, Philippe Mathieu-Daudé wrote:
> The Grackle PCI host model expects the interrupt controller
> being set, but does not verify it is present. Add a check to
> help developers using this model.
I don't think thaqt's very likely, but, sure, applied to ppc-for-
On 29/09/2020 20:35, Alexey Kardashevskiy wrote:
On 16/07/2020 23:22, David Gibson wrote:
On Thu, Jul 16, 2020 at 07:04:56PM +1000, Alexey Kardashevskiy wrote:
Ping? I kinda realize it is not going to replace SLOF any time soon but
still...
Yeah, I know. I just haven't had time to cons
On Sat, Oct 10, 2020 at 09:36:17AM +0200, Philippe Mathieu-Daudé wrote:
> On 10/9/20 10:55 PM, Cleber Rosa wrote:
> > On with certain versions of "pip", package installations will attempt
> > to create wheels. And, on environments without a "complete" Python
> > installation (as described in the a
On 2020/9/28 下午11:32, Stefan Hajnoczi wrote:
On Mon, Sep 28, 2020 at 03:21:56PM +0400, Marc-André Lureau wrote:
On Mon, Sep 28, 2020 at 1:25 PM Stefan Hajnoczi
Where this converges with multi-process QEMU
At this point QEMU can run ad-hoc vhost-use
On Sat, Oct 10, 2020 at 10:07:41AM +0200, Philippe Mathieu-Daudé wrote:
> Avocado documentation referred returns 404 error.
> Update the broken links.
>
Thanks!
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cleber Rosa
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On Sat, Oct 10, 2020 at 09:54:16AM +0200, Philippe Mathieu-Daudé wrote:
> On 10/9/20 10:29 PM, Eduardo Habkost wrote:
> > Add a simple test case that will run QEMU directly (without QMP)
> > just to check for crashes when using `-object`.
> >
> > Signed-off-by: Eduardo Habkost
> > ---
> > Changes
When parsing the topology, the right default value of 1 is given to
dies, but if an invalid number such as 0 is given, QEMU will crash
with a floating point exception.
The alternative approach is to silently set dies to a valid value,
as it's done with cores and threads.
Signed-off-by: Cleber Ros
Simple patch (and test) to avoid crashes when and invalid number
of dies is given.
Cleber Rosa (1):
hw/i386: prevent crash when an invalid number of dies is given
hw/i386/pc.c | 5 +
tests/acceptance/cpu_topology_dies.py | 31 +++
2 files c
On 2020/9/30 下午4:07, Michael S. Tsirkin wrote:
On Tue, Sep 29, 2020 at 07:38:24PM +0100, Stefan Hajnoczi wrote:
On Tue, Sep 29, 2020 at 06:04:34AM -0400, Michael S. Tsirkin wrote:
On Tue, Sep 29, 2020 at 09:57:51AM +0100, Stefan Hajnoczi wrote:
On Tue, Sep 29, 2020 at 02:09:55AM -0400, Micha
On Sat, Oct 10, 2020 at 08:53:00AM -0700, Elena Afanasova wrote:
> On Sat, 2020-10-10 at 17:07 +1100, David Gibson wrote:
> > On Fri, Oct 09, 2020 at 07:02:56AM -0700, Elena Afanasova wrote:
> > > > From 09905773a00e417d3a37c12350d9e55466fdce8a Mon Sep 17 00:00:00
> > > > 2001
> > > From: Elena Afa
On Sun, Oct 11, 2020 at 10:23:49AM +0800, Li Qiang wrote:
> David Gibson 于2020年10月10日周六 下午2:34写道：
> >
> > On Fri, Oct 09, 2020 at 07:02:56AM -0700, Elena Afanasova wrote:
> > > >From 09905773a00e417d3a37c12350d9e55466fdce8a Mon Sep 17 00:00:00 2001
> > > From: Elena Afanasova
> > > Date: Fri, 9 O
在 2020/10/11 上午4:43, Philippe Mathieu-Daudé 写道:
Currently the CP0 timer period is fixed at 10 ns, corresponding
to a fixed CPU frequency of 200 MHz (using half the speed of the
CPU).
In few commits we will be able to use a different CPU frequency.
In preparation, move the cp0_count_ns variabl
On Fri, Oct 09, 2020 at 07:57:32AM +0200, Cédric Le Goater wrote:
> On 10/9/20 2:23 AM, David Gibson wrote:
> > On Mon, Oct 05, 2020 at 06:51:41PM +0200, Cédric Le Goater wrote:
> >> Hello,
> >>
> >> When an interrupt has been handled, the OS notifies the interrupt
> >> controller with an EOI seque
在 2020/10/11 上午4:43, Philippe Mathieu-Daudé 写道:
The CP0 timer period is a function of the CPU frequency.
Start using the default values, which will be replaced by
properties in the next commits.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Jiaxun Yang
---
[...]
Thanks
- Jiaxun
在 2020/10/11 上午4:43, Philippe Mathieu-Daudé 写道:
The CPU frequency is normally provided by the firmware in the
"cpuclock" environment variable. The 2E board can handles up
to 660MHz, but be conservative and take the same value used
by the Linux kernel: 533 MHz.
Signed-off-by: Philippe Mathieu-
Acked-by: Subbaraya Sundeep
Thanks,
Sundeep
On Sun, Oct 4, 2020 at 11:55 PM Philippe Mathieu-Daudé wrote:
>
> These individual contributors have a number of contributions,
> add them to the 'individual' group map.
>
> Cc: Ahmed Karaman
> Cc: Aleksandar Markovic
> Cc: Alistair Francis
> Cc: A
On 10/12/20 12:34 AM, David Gibson wrote:
On Sun, Oct 11, 2020 at 09:03:32PM +0200, Philippe Mathieu-Daudé wrote:
The Grackle PCI host model expects the interrupt controller
being set, but does not verify it is present. Add a check to
help developers using this model.
I don't think thaqt's ver
On Tue, Oct 06, 2020 at 12:03:26PM +0200, Igor Mammedov wrote:
> On Thu, 1 Oct 2020 10:28:29 +0200
> Gerd Hoffmann wrote:
>
> > Wire up "usb=on" machine option, when enabled add
> > a sysbus xhci controller with 8 ports.
>
> first pci, and now usb - not so micro anymore.
Both pcie and usb are
On Fri, Oct 02, 2020 at 04:38:01PM +0100, Daniel P. Berrangé wrote:
> On Fri, Oct 02, 2020 at 02:47:44PM +0200, Gerd Hoffmann wrote:
> > On Thu, Oct 01, 2020 at 07:39:33PM +0200, Paolo Bonzini wrote:
> > > On 01/10/20 19:32, Yonggang Luo wrote:
> > > > And also convert related configure script to
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