[PATCH 0/3] Allow to specify the PHY number to use with a specific i.MX FEC/ENET Ethernet device

2020-06-28 Thread Jean-Christophe Dubois
The PHY device associated to a specific i.MX Ethernet device is not necessarily at address 0 on the MDIO bus. This patch series adds the ability to set the PHY number on the MDIO bus for any i.MX6UL based board. Jean-Christophe Dubois (3): Add a phy-num property to the i.MX FEC emulator Add

[PATCH 2/3] Add the ability to select a different PHY for each i.MX6UL FEC interface

2020-06-28 Thread Jean-Christophe Dubois
Add properties to the i.MX6UL processor to be able to select a particular PHY on the MDIO bus for each FEC device. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 10 ++ include/hw/arm/fsl-imx6ul.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/hw/arm/fs

[PATCH 1/3] Add a phy-num property to the i.MX FEC emulator

2020-06-28 Thread Jean-Christophe Dubois
We need a solution to use an Ethernet PHY that is not the first device on the MDIO bus (device 0 on MDIO bus). As an example with the i.MX6UL the NXP SOC has 2 Ethernet devices but only one MDIO bus on which the 2 related PHY are connected but at unique addresses. Signed-off-by: Jean-Christophe D

[PATCH 3/3] Select MDIO device 2 and 1 as PHY devices for i.MX6UL EVK board.

2020-06-28 Thread Jean-Christophe Dubois
The i.MX6UL EVK 14x14 board uses: - PHY 2 for FEC 1 - PHY 1 for FEC 2 Signed-off-by: Jean-Christophe Dubois --- hw/arm/mcimx6ul-evk.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 2f845cedfce..9033d3f8f38 100644 --- a/hw/arm/mcimx6ul-ev

[PATCH 0/2] tosa: fix Coverity CID 1421929

2020-06-28 Thread Peter Maydell
This series fixes Coverity issue CID 1421929, which pointed out that the 'outsignals' in tosa_gpio_setup() were leaked, in the same way that the equivalent bug for spitz was fixed in the series I posted earlier: instead of using qemu_allocate_irqs() we create a device to encapsulate the handling of

[PATCH 1/2] hw/arm/tosa.c: Detabify

2020-06-28 Thread Peter Maydell
Remove the hardcoded tabs from hw/arm/tosa.c. There aren't many, but since they're all in constant #defines they're not going to go away with our usual "only when we touch a function" policy on reformatting. Signed-off-by: Peter Maydell --- hw/arm/tosa.c | 44 ++--

[PATCH 2/2] hw/arm/tosa: Encapsulate misc GPIO handling in a device

2020-06-28 Thread Peter Maydell
Currently we have a free-floating set of IRQs and a function tosa_out_switch() which handle the GPIO lines on the tosa board which connect to LEDs, and another free-floating IRQ and tosa_reset() function to handle the GPIO line that resets the system. Encapsulate this behaviour in a simple QOM dev

[PATCH] tests: Inject test name also when the test fails

2020-06-28 Thread Havard Skinnemoen
If a test is unsuccessful, the result is "not ok", which does not match the regex because it includes a space. This regex matches both "ok" and "not ok". Signed-off-by: Havard Skinnemoen --- tests/Makefile.include | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/Makefil

[PATCH 2/2] hw/arm/palm.c: Encapsulate misc GPIO handling in a device

2020-06-28 Thread Peter Maydell
Replace the free-floating set of IRQs and palmte_onoff_gpios() function with a simple QOM device that encapsulates this behaviour. This fixes Coverity issue CID 1421944, which points out that the memory returned by qemu_allocate_irqs() is leaked. Signed-off-by: Peter Maydell --- hw/arm/palm.c |

[PATCH 0/2] hw/arm/palm.c: Fix Coverity issue CID 1421944

2020-06-28 Thread Peter Maydell
As for spitz and tosa, fix the Coverity issue CID 1421944 which points out that memory returned from qemu_allocate_irqs() is leaked by encapsulating the GPIO handling into a simple device. As with the other series, detabify the file first. thanks -- PMM Peter Maydell (2): hw/arm/palm.c: Detabif

[PATCH 1/2] hw/arm/palm.c: Detabify

2020-06-28 Thread Peter Maydell
Remove hard-tabs from palm.c. Signed-off-by: Peter Maydell --- hw/arm/palm.c | 64 +-- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 97ca105d297..569836178f6 100644 --- a/hw/arm/palm.c +++ b/hw/

[Bug 1883268] Re: random errors on aarch64 when executing __aarch64_cas8_acq_rel

2020-06-28 Thread Richard Henderson
FWIW, I cannot reproduce the problem with x86_64 host, but I can reproduce it on a 32-bit i686 host. ** Changed in: qemu Status: New => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/

Re: [PULL 00/63] riscv-to-apply queue

2020-06-28 Thread Alistair Francis
On Sun, Jun 28, 2020 at 7:30 AM Peter Maydell wrote: > > On Fri, 26 Jun 2020 at 22:53, Alistair Francis > wrote: > > > > The following changes since commit 553cf5d7c47bee05a3dec9461c1f8430316d516b: > > > > Merge remote-tracking branch > > 'remotes/pmaydell/tags/pull-target-arm-20200626' into

[Bug 1883268] Re: random errors on aarch64 when executing __aarch64_cas8_acq_rel

2020-06-28 Thread Richard Henderson
There's nothing wrong with the atomic operation, which makes sense since it's against a NULL pointer. The problem that I see is in the unwinding -- the catch never happens and std::terminate gets called. There must be some sort of 32-bit TCG error though, because the same binary works on x86_64 h

[PATCH v2 2/2] hw/net: Added basic IPv6 fragmentation

2020-06-28 Thread andrew
From: Andrew Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1708065 Overall, there was an issue that big frames of IPv6 doesn't sent. With network backend with 'virtual header' - there was an issue in 'plen' field. Overall, during TSO, 'plen' would be changed, but with 'vheader' this field

[PATCH v2 1/2] hw/net: Added CSO for IPv6

2020-06-28 Thread andrew
From: Andrew Added fix for checksum offload for IPv6 if a backend doesn't have a virtual header. This patch is a part of IPv6 fragmentation. Signed-off-by: Andrew Melnychenko --- hw/net/net_tx_pkt.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/hw/net/net

Re: [PULL 00/63] riscv-to-apply queue

2020-06-28 Thread LIU Zhiwei
On 2020/6/29 6:51, Alistair Francis wrote: On Sun, Jun 28, 2020 at 7:30 AM Peter Maydell wrote: On Fri, 26 Jun 2020 at 22:53, Alistair Francis wrote: The following changes since commit 553cf5d7c47bee05a3dec9461c1f8430316d516b: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-t

[RFC] secure boot: is it necessary to let qemu verify EDK2 efi file

2020-06-28 Thread Zhangbo (Oscar)
Hi all:     Secure boot for virtual machine NOWADAYS starts from edk2’s vBIOS, which verifies guest OS’s shim/grub2. Then grub2 verifies guest OS’s kernel.   From the view of the whole complete trust chain, the GUEST part is disconnected from the HOST part, as the verification of vBIOS is missing

[Bug 1882123] Re: ARM cpu emulation regression on QEMU 4.2.0

2020-06-28 Thread Hajin Jang
Dear Peter Maydell (@pmaydell), is there any update on this bug? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1882123 Title: ARM cpu emulation regression on QEMU 4.2.0 Status in QEMU: New Bug

Re: [RFC v2 1/1] memory: Delete assertion in memory_region_unregister_iommu_notifier

2020-06-28 Thread Jason Wang
On 2020/6/28 下午10:47, Peter Xu wrote: On Sun, Jun 28, 2020 at 03:03:41PM +0800, Jason Wang wrote: On 2020/6/27 上午5:29, Peter Xu wrote: Hi, Eugenio, (CCing Eric, Yan and Michael too) On Fri, Jun 26, 2020 at 08:41:22AM +0200, Eugenio Pérez wrote: diff --git a/memory.c b/memory.c index 2f15a4

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