Could be as simple as setting MachineClass->default_display = "none" ...
have you tried whether that's working as expected?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1884507
Title:
'none' machi
> From: Andrew Jones [mailto:drjo...@redhat.com]
> Sent: Tuesday, June 23, 2020 10:01 AM
> To: Salil Mehta
> Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; peter.mayd...@linaro.org;
> sudeep.ho...@arm.com; gs...@redhat.com; m...@redhat.com; jiakern...@gmail.com;
> m...@kernel.org; zhukeqian ; da.
> From: Andrew Jones [mailto:drjo...@redhat.com]
> Sent: Tuesday, June 23, 2020 10:12 AM
> To: Salil Mehta
> Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; peter.mayd...@linaro.org;
> sudeep.ho...@arm.com; gs...@redhat.com; m...@redhat.com; jiakern...@gmail.com;
> m...@kernel.org; zhukeqian ; da.
On Tue, Jun 23, 2020 at 4:57 PM Jason Wang wrote:
>
>
> On 2020/6/22 下午11:37, Cindy Lu wrote:
> > This patch set introduces a new net client type: vhost-vdpa.
> > vhost-vdpa net client will set up a vDPA device which is specified
> > by a "vhostdev" parameter.
> >
> > Signed-off-by: Lingshan Zhu
ping
Sorry, I lost a point in discussion.
As I wrote early, main reason for mix frontend and backend devices is for
easy recreation of current state of network. As we have common structure
for all netdevs (`struct NetClientState`), I think, that it'll be good
idea to iterate using `net_clients`.
If the guest is 32 bit then there is a potential problem if the
host gives us back a 64-bit sized value that we can't fit into
the ABI the guest requires. This is a theoretical issue for many
syscalls, but a real issue for directory reads where the host
is using ext3 or ext4. There the 'offset' val
On 17/06/20 18:09, Jon Doron wrote:
> After doing further tests and looking at the latest HyperV ACPI DSDT.
> Do minor fix to our VMBus ACPI entry.
>
> v2:
> Renamed irq0 to irq now that there is a single IRQ required
>
> Jon Doron (3):
> hyperv: vmbus: Remove the 2nd IRQ
> i386: acpi: vmbus:
Am 23.06.2020 um 09:28 hat Max Reitz geschrieben:
> On 22.06.20 19:44, Alberto Garcia wrote:
> > On Mon 22 Jun 2020 11:47:32 AM CEST, Max Reitz wrote:
> >>> I don't know the internals of qcow2 data_file, but are we really using
> >>> qcow2 metadata when accessing the data file?
> >>
> >> Yes.
> >>
On Fri, 29 May 2020 at 08:22, Linus Walleij wrote:
>
> It was brought to my attention that this bug from 2018 was
> still unresolved: 32 bit emulators like QEMU were given
> 64 bit hashes when running 32 bit emulation on 64 bit systems.
>
> This adds a flag to the fcntl() F_GETFD and F_SETFD opera
On 6/22/20 3:45 PM, Claudio Fontana wrote:
> move arch_init, balloon, cpus, ioport, memory, memory_mapping, qtest.
>
> They are all specific to CONFIG_SOFTMMU.
>
> Signed-off-by: Claudio Fontana
> Reviewed-by: Alex Bennée
> Reviewed-by: Laurent Vivier
Also
Reviewed-by: Thomas Huth
> ---
Hi Shameer,
On 6/22/20 2:41 PM, Shameer Kolothum wrote:
> This adds support for memory(pc-dimm) hot remove on arm/virt that
> uses acpi ged device.
>
> NVDIMM hot removal is not yet supported.
>
> Signed-off-by: Shameer Kolothum
Works fine for me when passing "movable_node" in the guest kernel
Am 22.06.2020 um 17:50 hat Nir Soffer geschrieben:
> On Mon, Jun 22, 2020 at 12:47 PM Max Reitz wrote:
> >
> > On 22.06.20 00:25, Nir Soffer wrote:
> > > On Fri, Jun 19, 2020 at 1:40 PM Max Reitz wrote:
> > >>
> > >> Hi,
> > >>
> > >> As discussed here:
> > >>
> > >> https://lists.nongnu.org/arch
11.05.2020 21:34, Eric Blake wrote:
On 5/11/20 12:17 PM, Alberto Garcia wrote:
On Thu 30 Apr 2020 01:10:21 PM CEST, Vladimir Sementsov-Ogievskiy wrote:
compute 'int tail' via % 'int alignment' - safe
tail = (offset + bytes) % alignment;
both are int64_t, no chance of overflow here?
On 23/06/20 11:34, Liran Alon wrote:
> Having said that, I believe the compatibility risk here is very small
> and therefore because QEMU 5.0 was
> released for a very short time-span before these patches were merged,
> I'm not sure it's really preferable
> to move these flags to hw_compat_5_0[]. B
On 23/06/2020 12:25, Paolo Bonzini wrote:
> On 23/06/20 11:34, Liran Alon wrote:
>> Having said that, I believe the compatibility risk here is very small
>> and therefore because QEMU 5.0 was
>> released for a very short time-span before these patches were merged,
>> I'm not sure it's really prefer
Am 22.06.2020 um 11:48 hat Max Reitz geschrieben:
> On 22.06.20 11:35, Max Reitz wrote:
> > On 19.06.20 18:47, Alberto Garcia wrote:
> >> On Fri 19 Jun 2020 12:40:11 PM CEST, Max Reitz wrote:
> >>> +if (qcow2_opts->data_file_raw &&
> >>> +qcow2_opts->preallocation == PREALLOC_MODE_OFF)
The patches that introduced the properties were submitted when QEMU 5.0
had not been released yet, so they got merged under the wrong heading.
Move them to hw_compat_5_0 so that 5.0 machine types get the pre-patch
behavior.
Reported-by: Laurent Vivier
Cc: Liran Alon
Signed-off-by: Paolo Bonzini
On Sun, 21 Jun 2020 01:51:21 +0530
Kirti Wankhede wrote:
> Call VFIO_IOMMU_DIRTY_PAGES ioctl to start and stop dirty pages tracking
> for VFIO devices.
>
> Signed-off-by: Kirti Wankhede
> Reviewed-by: Dr. David Alan Gilbert
> ---
> hw/vfio/migration.c | 36
On 23/06/2020 12:28, Paolo Bonzini wrote:
> The patches that introduced the properties were submitted when QEMU 5.0
> had not been released yet, so they got merged under the wrong heading.
> Move them to hw_compat_5_0 so that 5.0 machine types get the pre-patch
> behavior.
>
> Reported-by: Laurent
On Tue, 23 Jun 2020 at 10:06, Philippe Mathieu-Daudé wrote:
>
> Since v2:
> - include Drew test fix (addressed Peter review comments)
> - addressed Drew review comments
> - collected R-b/A-b
>
> Andrew Jones (1):
> tests/qtest/arm-cpu-features: Add feature setting tests
>
> Philippe Mathieu-Daud
On Tue, 23 Jun 2020 at 11:15, Auger Eric wrote:
>
> Hi Shameer,
>
> On 6/22/20 2:41 PM, Shameer Kolothum wrote:
> > This adds support for memory(pc-dimm) hot remove on arm/virt that
> > uses acpi ged device.
> >
> > NVDIMM hot removal is not yet supported.
> >
> > Signed-off-by: Shameer Kolothum
On Mon, 22 Jun 2020 at 10:01, Philippe Mathieu-Daudé wrote:
>
> The following changes since commit 06c4cc3660b366278bdc7bc8b6677032d7b1118c:
>
> qht: Fix threshold rate calculation (2020-06-19 18:29:11 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/philmd/qemu.git ta
Richard Henderson writes:
> We will want to share this code when dumping.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Am 22.06.2020 um 23:58 hat Eric Blake geschrieben:
> On 5/5/20 10:30 AM, Eric Blake wrote:
> > On 5/5/20 2:35 AM, Kevin Wolf wrote:
> > > Am 03.04.2020 um 19:58 hat Eric Blake geschrieben:
> > > > qcow has no space in the metadata to store a backing format, and there
> > > > are existing qcow image
As KVM supported extentions those should be the same for
all VMs, it is safe to directly use the global kvm_state
in kvm_check_extension().
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-Daudé
---
accel/kvm/kvm-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
In previous commit we let kvm_check_extension() use the
global kvm_state. Since the KVMState* argument is now
unused, drop it.
Convert callers with this Coccinelle script:
@@
expression kvm_state, extension;
@@
- kvm_check_extension(kvm_state, extension)
+ kvm_check_extension(extens
Following Paolo's idea on kvm_check_extension():
https://www.mail-archive.com/qemu-devel@nongnu.org/msg713794.html
CI:
https://travis-ci.org/github/philmd/qemu/builds/701213438
Philippe Mathieu-Daudé (7):
accel/kvm: Let kvm_check_extension use global KVM state
accel/kvm: Simplify kvm_check_ex
The KVMState* argument is now unused, drop it.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/kvm/kvm-all.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index b6b39b0e92..afd14492a0 100644
--- a/accel/kvm/kvm-all.c
+++ b/acc
The sigmask_len is a property of the accelerator, not the VM.
Simplify by directly using the global kvm_state, remove the
unnecessary KVMState* argument.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/kvm.h | 2 +-
accel/kvm/kvm-all.c | 4 ++--
target/mips/kvm.c| 2 +-
3 files cha
The KVMState* argument is now unused, drop it.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/kvm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 03df6ac3b4..19d3db657a 100644
--- a/target/i386/kvm.c
+++ b/target/i386/k
As the MCE supported capabilities should be the same for
all VMs, it is safe to directly use the global kvm_state.
Remove the unnecessary KVMState* argument.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/kvm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/targ
As the MSR supported features should be the same for all
VMs, it is safe to directly use the global kvm_state.
Remove the unnecessary KVMState* argument.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/kvm.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --gi
* Cornelia Huck (coh...@redhat.com) wrote:
> On Sun, 21 Jun 2020 01:51:21 +0530
> Kirti Wankhede wrote:
>
> > Call VFIO_IOMMU_DIRTY_PAGES ioctl to start and stop dirty pages tracking
> > for VFIO devices.
> >
> > Signed-off-by: Kirti Wankhede
> > Reviewed-by: Dr. David Alan Gilbert
> > ---
> >
On 23/06/2020 13:28, Paolo Bonzini wrote:
The patches that introduced the properties were submitted when QEMU 5.0
had not been released yet, so they got merged under the wrong heading.
Move them to hw_compat_5_0 so that 5.0 machine types get the pre-patch
behavior.
Reported-by: Laurent Vivier
On 6/23/20 10:01 AM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé writes:
>
>> Extract i2c_try_create_slave() and i2c_realize_and_unref()
>> from i2c_create_slave().
>> We can now set properties on a I2CSlave before it is realized.
>>
>> This is in line with the recent qdev/QOM changes merge
On Tue, 23 Jun 2020 12:01:25 +0100
"Dr. David Alan Gilbert" wrote:
> * Cornelia Huck (coh...@redhat.com) wrote:
> > On Sun, 21 Jun 2020 01:51:21 +0530
> > Kirti Wankhede wrote:
> >
> > > Call VFIO_IOMMU_DIRTY_PAGES ioctl to start and stop dirty pages tracking
> > > for VFIO devices.
> > >
>
On Tue, 23 Jun 2020, Philippe Mathieu-Daudé wrote:
Since its introduction in commit 6fc7f77fd2 i2c_start_transfer()
uses incorrectly the direction of the transfer. Fix it now.
Fixes: 6fc7f77fd2 ("introduce aux-bus")
Reported-by: BALATON Zoltan
Suggested-by: BALATON Zoltan
One of the above is
On 6/23/20 9:27 AM, Philippe Mathieu-Daudé wrote:
> Extract i2c_try_create_slave() and i2c_realize_and_unref()
> from i2c_create_slave().
> We can now set properties on a I2CSlave before it is realized.
>
> This is in line with the recent qdev/QOM changes merged
> in commit 6675a653d2e.
>
> Revie
On 6/23/20 9:27 AM, Philippe Mathieu-Daudé wrote:
> We have 2 distinct PCA9552 devices. Set their description
> to distinguish them when looking at the trace events.
>
> Description name taken from:
> https://github.com/open-power/witherspoon-xml/blob/master/witherspoon.xml
>
> Reviewed-by: Cédri
On 6/23/20 10:14 AM, Cédric Le Goater wrote:
> On 6/23/20 9:27 AM, Philippe Mathieu-Daudé wrote:
>> This series add trace events to better display GPIO changes.
>> We'll continue in the following series by connecting LEDs to
>> these GPIOs.
>>
>> This helps me to work on a generic LED device, see:
On 6/23/20 5:39 AM, Paolo Bonzini wrote:
On 12/06/20 10:54, Philippe Mathieu-Daudé wrote:
Missing review: last patch
- #12 "tpm: Move backend code under the 'backends/' directory"
Hi,
Yesterday I started to review some vTPM patches and got very
confused by the files under hw/tpm/. In particula
ydell/qemu-arm.git
tags/pull-target-arm-20200623
for you to fetch changes up to 539533b85fbd269f777bed931de8ccae1dd837e9:
arm/virt: Add memory hot remove support (2020-06-23 11:39:48 +0100)
target-arm queue:
* util/o
From: David CARLIER
>From 3025a0ce3fdf7d3559fc35a52c659f635f5c750c Mon Sep 17 00:00:00 2001
From: David Carlier
Date: Tue, 26 May 2020 21:35:27 +0100
Subject: [PATCH] util/oslib-posix : qemu_init_exec_dir implementation for Mac
Using dyld API to get the full path of the current process.
Signed
From: Andrew Jones
Cc: Cornelia Huck
Signed-off-by: Andrew Jones
Reviewed-by: Cornelia Huck
Message-id: 20200616140803.25515-1-drjo...@redhat.com
Signed-off-by: Peter Maydell
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index caceb1e4a05
Convert the Neon VZIP and VUZP insns in the 2-reg-misc group to
decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-4-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 3 ++
target/arm/translate-neon.inc.c | 74 +
Convert the Neon VREV64 insn from the 2-reg-misc grouping to decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-2-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 12
target/arm/translate-neon.inc.c | 50 ++
Convert to decodetree the insns in the Neon 2-reg-misc grouping which
we implement using gvec.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-8-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 11 +++
target/arm/translate-neon.inc.
Convert the Neon narrowing moves VMQNV, VQMOVN, VQMOVUN in the 2-reg-misc
group to decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-5-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 9
target/arm/translate-neon.inc.c |
Convert the Neon VQABS and VQNEG insns to decodetree.
Since these are the only ones which need cpu_env passing to
the helper, we wrap the helper rather than creating a whole
new do_2misc_env() function.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-
Convert the Neon 2-reg-misc VRINT insns to decodetree.
Giving these insns their own do_vrint() function allows us
to change the rounding mode just once at the start and end
rather than doing it for every element in the vector.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-i
Convert the pairwise ops VPADDL and VPADAL in the 2-reg-misc grouping
to decodetree.
At this point we can get rid of the weird CPU_V001 #define that was
used to avoid having to explicitly list all the arguments being
passed to some TCG gen/helper functions.
Signed-off-by: Peter Maydell
Reviewed-
Convert the Neon insns in the 2-reg-misc group which are
VCVT between f32 and f16 to decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-7-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 3 ++
target/arm/translate-neon.inc.c |
Convert the VREV32 and VREV16 insns in the Neon 2-reg-misc group
to decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-13-peter.mayd...@linaro.org
---
target/arm/translate.h | 1 +
target/arm/neon-dp.decode | 2 ++
target/ar
Convert the VSHLL insn in the 2-reg-misc Neon group to decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-6-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 2 ++
target/arm/translate-neon.inc.c | 52 ++
Convert the Neon VSWP insn to decodetree. Since the new implementation
doesn't have to share a pass-loop with the other 2-reg-misc operations
we can implement the swap with 64-bit accesses rather than 32-bits
(which brings us into line with the pseudocode and is more efficient).
Signed-off-by: Pet
The NeonGenOneOpFn typedef breaks with the pattern of the other
NeonGen*Fn typedefs, because it is a TCGv_i64 -> TCGv_i64 operation
but it does not have '64' in its name. Rename it to NeonGenOne64OpFn,
so that the old name is available for a TCGv_i32 -> TCGv_i32 operation
(which we will need in a s
Convert the remaining ops in the Neon 2-reg-misc group which
can be implemented simply with our do_2misc() helper.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-14-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 10 +
target/arm/
From: Philippe Mathieu-Daudé
Use self-explicit definitions instead of magic values.
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-4-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/i2c/versatile_i2c.c | 7 +--
1 file changed, 5 inser
Convert the Neon-2-reg misc crypto ops (AESE, AESMC, SHA1H, SHA1SU1)
to decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-9-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 12
target/arm/translate-neon.inc.c | 42 +++
All the other typedefs like these spell "Op" with a lowercase 'p';
remane the NeonGenTwoSingleOPFn and NeonGenTwoDoubleOPFn typedefs to
match.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-11-peter.mayd...@linaro.org
---
target/arm/translate.h
Convert the Neon 2-reg-misc insns which are implemented with
simple calls to functions that take the input, output and
fpstatus pointer.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-16-peter.mayd...@linaro.org
---
target/arm/translate.h |
The functions neon_element_offset(), neon_load_element(),
neon_load_element64(), neon_store_element() and
neon_store_element64() are used only in the translate-neon.inc.c
file, so move their definitions there.
Since the .inc.c file is #included in translate.c this doesn't make
much difference curr
Make gen_swap_half() take a source and destination TCGv_i32 rather
than modifying the input TCGv_i32; we're going to want to be able to
use it with the more flexible function signature, and this also
brings it into line with other functions like gen_rev16() and
gen_revsh().
Signed-off-by: Peter Ma
From: Philippe Mathieu-Daudé
Register the GPIO peripherals as unimplemented to better
follow their accesses, for example booting Zephyr:
IN: arm_mps2_pinmux_init
0x1160: f64f 0231 movw r2, #0xf831
0x1164: 4b06 ldr r3, [pc, #0x18]
0x1166:
In commit cfdb2c0c95ae9205b0 ("target/arm: Vectorize SABA/UABA") we
replaced the old handling of SABA/UABA with a vectorized implementation
which returns early rather than falling into the loop-ever-elements
code. We forgot to delete the part of the old looping code that
did the accumulate step, an
From: Philippe Mathieu-Daudé
Since commit d70c996df23f, when enabling the PMU we get:
$ qemu-system-aarch64 -cpu host,pmu=on -M virt,accel=kvm,gic-version=3
Segmentation fault (core dumped)
Thread 1 "qemu-system-aar" received signal SIGSEGV, Segmentation fault.
0xaae356d0 in kvm
Since commit ba3e7926691ed3 it has been unnecessary for target code
to call gen_io_end() after an IO instruction in icount mode; it is
sufficient to call gen_io_start() before it and to force the end of
the TB.
Many now-unnecessary calls to gen_io_end() were removed in commit
9e9b10c6491153b, but
From: Philippe Mathieu-Daudé
Add a trace event to see when a guest disable/enable the watchdog.
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-2-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/watchdog/cmsdk-apb-watchdog.c | 1 +
hw/watc
Convert the fp-compare-with-zero insns in the Neon 2-reg-misc group to
decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-17-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 6
target/arm/translate-neon.inc.c | 28 +++
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-7-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/mps2.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
This PR cleans up header includes in TPM code and moves some backend components
into backends/tpm.
The following changes since commit 292ef18a38270e1cb8e9a3dc06bca589068f293d:
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into
staging (2020-06-18 16:52:10 +0100)
are av
Your pipeline has failed.
Project: QEMU ( https://gitlab.com/qemu-project/qemu )
Branch: master ( https://gitlab.com/qemu-project/qemu/-/commits/master )
Commit: 61fee7f4 (
https://gitlab.com/qemu-project/qemu/-/commit/61fee7f45955cd0bf9b79be9fa9c7ebabb5e6a85
)
Commit Message: Merge remote-tr
Convert the VCVT instructions in the 2-reg-misc grouping to
decodetree.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20200616170844.13318-19-peter.mayd...@linaro.org
---
target/arm/neon-dp.decode | 9 +
target/arm/translate-neon.inc.c | 70 +
From: Philippe Mathieu-Daudé
As we will have various TPM backend files, it is cleaner
to use a single directory.
Suggested-by: Stefan Berger
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 20200612085444.8362-3-phi...@redhat.com
Signed-off-by: Stefan Berger
---
From: Philippe Mathieu-Daudé
The TPMDEV describe TPM backends. Use the TPM_BACKEND config
name which is self-explicit.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 20200612085444.8362-4-phi...@redhat.com
Signed-off-by: Stefan Berger
---
hw/tpm/Kconfig | 12 +++
From: Philippe Mathieu-Daudé
By using the TYPE_* definitions for devices, we can:
- quickly find where devices are used with 'git-grep'
- easily rename a device (one-line change).
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-6-f4...@amsat.org
Reviewed-by: Peter Mayde
Convert the Neon VTRN insn to decodetree. This is the last insn in the
Neon data-processing group, so we can remove all the now-unused old
decoder framework.
It's possible that there's a more efficient implementation of
VTRN, but for this conversion we just copy the existing approach.
Signed-off-
From: Philippe Mathieu-Daudé
We are going to make "tpm_util.h" publicly accessible by
moving it to the include/ directory in a pair of commits.
Keep declarations internals to hw/tpm/ in "tpm_int.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 20200612085444.836
From: Philippe Mathieu-Daudé
To differenciate with the CMSDK APB peripheral region,
rename this region 'CMSDK AHB peripheral region'.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-8-f4...@amsat.org
Signed-off-by: Peter Maydell
---
hw/arm/mp
From: Philippe Mathieu-Daudé
Nothing in "tpm_ppi.h" require declarations from "hw/acpi/tpm.h".
Reduce dependencies and include it only in the files requiring it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 20200612085444.8362-7-phi...@redhat.com
Signed-off-by:
From: Philippe Mathieu-Daudé
Use self-explicit definitions instead of magic values.
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-3-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/i2c/versatile_i2c.c | 14 ++
1 file changed,
From: Philippe Mathieu-Daudé
We are going to make "tpm_util.h" publicly accessible by
moving it to the include/ directory in the next commit.
The DEFINE_PROP_TPMBE() macro is only meaningful for the
TPM hardware files (in hw/tpm/), so keep this macro in a
local header.
Signed-off-by: Philippe Ma
From: Philippe Mathieu-Daudé
Remove unnecessary 'tpm_int.h' header inclusion.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 20200612085444.8362-8-phi...@redhat.com
Signed-off-by: Stefan Berger
---
hw/tpm/tpm_crb.c| 1 -
hw/tpm/tpm_spapr.c | 1 -
hw
From: Philippe Mathieu-Daudé
We already model the CMSDK APB watchdog device, let's use it!
Suggested-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-9-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/mps2.c | 7
From: Philippe Mathieu-Daudé
'ARM SBCon two-wire serial bus interface' is the official
name describing the pair of registers used to bitbanging
I2C in the Versatile boards.
Make the private VersatileI2CState structure as public
ArmSbconI2CState.
Add the TYPE_ARM_SBCON_I2C, alias to our current
T
From: Philippe Mathieu-Daudé
The trace_event_get_state_backends() call is useful to avoid
making extensive calls (usually preparing arguments passed to
the tracing framework. In this case, the extensive work is
done in tpm_util_show_buffer(), and the arguments used to
call it don't involve extra
Am 19.06.2020 um 21:56 hat Eric Blake geschrieben:
> [From John's original cover letter:]
> This is a new (very small) block job that writes a pattern into a
> bitmap. The only pattern implemented is the top allocation information.
>
> This can be used to "recover" an incremental bitmap chain if a
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-11-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/mps2.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index c66
From: Philippe Mathieu-Daudé
>From CODING_STYLE.rst:
Do not include "qemu/osdep.h" from header files since the .c
file will have already included it.
Remove "qemu/osdep.h" from "tpm_tis.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 20200612085444.8362-5
From: Philippe Mathieu-Daudé
We are going to split the TPM backends from the TPM emulated
hardware in the next commit. Make the TPM util helpers accessible
by moving local "tpm_util.h" to global "sysemu/tpm_util.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
Message-id: 2
From: Philippe Mathieu-Daudé
>From 'Application Note AN385', chapter 3.9, SPI:
The SMM implements five PL022 SPI modules.
Two pairs of modules share the same OR-gated IRQ.
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-12-f4...@amsat.org
Reviewed-by: Peter Maydell
S
Am 19.06.2020 um 12:11 hat Stefan Hajnoczi geschrieben:
> Small fixes for qemu-storage-daemon.
Thanks, applied to the block branch.
Kevin
From: Philippe Mathieu-Daudé
TPM subsytem is split into backends (see commit f4ede81eed2)
and frontends (see i.e. 3676bc69b35). Keep the emulated
hardware 'frontends' under hw/tpm/, but move the backends
in the backends/tpm/ directory.
Suggested-by: Marc-André Lureau
Signed-off-by: Philippe Mat
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-14-f4...@amsat.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/mps2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 2f6acbf2c21.
Am 19.06.2020 um 21:56 hat Eric Blake geschrieben:
> Give ourselves an out if we need to tweak the interface, in order to
> gain more experience with what works when libvirt experiments with
> using it.
>
> Signed-off-by: Eric Blake
I thought libvirt wants to consume this as soon as possible? Wi
From: Philippe Mathieu-Daudé
>From 'Application Note AN385', chapter 3.14:
The SMM implements a simple SBCon interface based on I2C.
There are 4 SBCon interfaces on the FPGA APB subsystem.
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20200617072539.32686-13-f4...@amsat.org
Reviewed-by:
Add Loongson-3 based machine support, it use i8259 as the interrupt
controler and use GPEX as the pci controller. Currently it can only
work with KVM, but we will add TCG support in future.
As the machine model is not based on any exiting physical hardware, the
name of the machine is "loongson3-vi
From: Philippe Mathieu-Daudé
>From 'Application Note AN521', chapter 4.7:
The SMM implements four SBCon serial modules:
One SBCon module for use by the Color LCD touch interface.
One SBCon module to configure the audio controller.
Two general purpose SBCon modules, that connect to the
> -Original Message-
> From: Markus Armbruster
> Sent: 23 June 2020 09:41
> To: Jason Andryuk
> Cc: Mark Cave-Ayland ; Anthony PERARD
> ; xen-
> devel ; Paul Durrant ; QEMU
>
> Subject: Re: sysbus failed assert for xen_sysdev
>
> Jason Andryuk writes:
>
> > On Mon, Jun 22, 2020 at 5
From: Andrew Jones
Some cpu features may be enabled and disabled for all configurations
that support the feature. Let's test that.
A recent regression[*] inspired adding these tests.
[*] '-cpu host,pmu=on' caused a segfault
Signed-off-by: Andrew Jones
Signed-off-by: Philippe Mathieu-Daudé
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