Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0944d9c..c42a218 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1092,6 +1092,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F: in
On 5/20/20 8:42 PM, David Gibson wrote:
> This structure is nothing but an empty wrapper around the parent class,
> which by QOM conventions means we don't need it at all.
>
> Signed-off-by: David Gibson
> ---
> target/i386/sev.c | 1 -
> target/i386/sev_i386.h | 5 -
> 2 files changed,
On 5/20/20 8:42 PM, David Gibson wrote:
> Neither QSevGuestInfo nor SEVState (not to be confused with SevState) is
> used anywhere outside target/i386/sev.c, so they might as well live in
> there rather than in a (somewhat) exposed header.
>
> Signed-off-by: David Gibson
> ---
> target/i386/sev.
On 5/20/20 8:42 PM, David Gibson wrote:
> At the moment this is a purely passive object which is just a container for
> information used elsewhere, hence the name. I'm going to change that
> though, so as a preliminary rename it to SevGuestState.
>
> That name risks confusion with both SEVState a
On 5/20/20 8:42 PM, David Gibson wrote:
> Currently SevGuestState contains only configuration information. For
> runtime state another non-QOM struct SEVState is allocated separately.
>
> Simplify things by instead embedding the SEVState structure in
> SevGuestState.
>
> Signed-off-by: David Gib
On 5/20/20 8:42 PM, David Gibson wrote:
> The SEV code uses a pretty ugly global to access its internal state. Now
> that SEVState is embedded in SevGuestState, we can avoid accessing it via
> the global in some cases. In the remaining cases use a new global
> referencing the containing SevGuestS
On 5/20/20 8:42 PM, David Gibson wrote:
> The SEVState structure has cbitpos and reduced_phys_bits fields which are
> simply copied from the SevGuestState structure and never changed. Now that
> SEVState is embedded in SevGuestState we can just access the original copy
> directly.
>
> Signed-off-
On 5/20/20 8:42 PM, David Gibson wrote:
> SEVState::policy is set from the final value of the policy field in the
> parameter structure for the KVM_SEV_LAUNCH_START ioctl(). But, AFAICT
> that ioctl() won't ever change it from the original supplied value which
> comes from SevGuestState::policy.
>
On 5/20/20 8:42 PM, David Gibson wrote:
> The user can explicitly specify a handle via the "handle" property wired
> to SevGuestState::handle. That gets passed to the KVM_SEV_LAUNCH_START
> ioctl() which may update it, the final value being copied back to both
> SevGuestState::handle and SEVState:
Hi Raphael,
I'm sorry. I just end my journey today.
Yes, pls sign off me here.
this patch is nearly the same as my previous patch.
Thanks,
Feng Li
Raphael Norwitz 于2020年5月31日周日 上午8:55写道：
>
> On Thu, May 28, 2020 at 5:13 AM Dima Stepanov wrote:
> >
> > A socket write during vhost-user communica
On 5/20/20 8:42 PM, David Gibson wrote:
> SEVState is contained with SevGuestState. We've now fixed redundancies
> and name conflicts, so there's no real point to the nested structure. Just
> move all the fields of SEVState into SevGuestState.
>
> This eliminates the SEVState structure, which as
On 5/20/20 8:42 PM, David Gibson wrote:
> At the moment AMD SEV sets a special function pointer, plus an opaque
> handle in KVMState to let things know how to encrypt guest memory.
>
> Now that we have a QOM interface for handling things related to guest
> memory protection, use a QOM method on th
Reviewed-by: zhanghailiang
> -Original Message-
> From: Zhang Chen [mailto:chen.zh...@intel.com]
> Sent: Friday, May 15, 2020 12:28 PM
> To: Dr . David Alan Gilbert ; Juan Quintela
> ; Zhanghailiang ;
> qemu-dev
> Cc: Zhang Chen ; Jason Wang
> ; Zhang Chen
> Subject: [PATCH 1/3] migrati
On 5/20/20 8:42 PM, David Gibson wrote:
> +if (object_dynamic_cast(obj, TYPE_GUEST_MEMORY_PROTECTION)) {
> +GuestMemoryProtection *gmpo = GUEST_MEMORY_PROTECTION(obj);
This duplicates the interface check. You should use
gmpo = (GuestMemoryProtection *)
object_dynamic_ca
On 5/20/20 8:42 PM, David Gibson wrote:
> When the "memory-encryption" property is set, we also disable KSM
> merging for the guest, since it won't accomplish anything.
>
> We want that, but doing it in the property set function itself is
> thereoretically incorrect, in the unlikely event of some
On 6/1/20 8:39 PM, Richard Henderson wrote:
> On 5/20/20 8:42 PM, David Gibson wrote:
>> +if (object_dynamic_cast(obj, TYPE_GUEST_MEMORY_PROTECTION)) {
>> +GuestMemoryProtection *gmpo = GUEST_MEMORY_PROTECTION(obj);
>
> This duplicates the interface check. You should use
>
>
On Mon, Jun 01, 2020 at 04:29:22PM +0200, Philippe Mathieu-Daudé wrote:
> Series fully reviewed.
>
> Since v1:
> - Add parenthesis on the Xen patch (Paul Durrant)
> - Add Peter's R-b tags
PCI things:
Reviewed-by: Michael S. Tsirkin
I'll queue pci patches in my tree.
> memory_region_set_size
On Mon, Jun 01, 2020 at 06:29:34PM +0200, Julia Suvorova wrote:
> Check for hot plug capability earlier to avoid removing devices attached
> during the initialization process.
>
> Run qemu with an unattached drive:
> -drive file=$FILE,if=none,id=drive0 \
> -device pcie-root-port,id=rp0,slot=3,
On 5/20/20 8:43 PM, David Gibson wrote:
> +++ b/include/hw/boards.h
> @@ -12,6 +12,8 @@
> #include "qom/object.h"
> #include "hw/core/cpu.h"
>
> +typedef struct GuestMemoryProtection GuestMemoryProtection;
> +
I think this needs to be in include/qemu/typedefs.h,
and the other typedef in patch
On 5/20/20 8:43 PM, David Gibson wrote:
> The kvm_memcrypt_enabled() and kvm_memcrypt_encrypt_data() helper functions
> don't conceptually have any connection to KVM (although it's not possible
> in practice to use them without it).
Yet?
I would expect TCG implementations of these interfaces even
On 5/20/20 8:43 PM, David Gibson wrote:
> This allows failures to be reported richly and idiomatically.
>
> Signed-off-by: David Gibson
> ---
> accel/kvm/kvm-all.c| 4 +++-
> include/exec/guest-memory-protection.h | 2 +-
> target/i386/sev.c | 31 ++
On Fri, May 29, 2020 at 09:39:53AM +0200, Gerd Hoffmann wrote:
> With more microvm memory config tweaks split this into its owns series,
> the microvm acpi patch series is already big enough ...
Okay.
We might want to add pci to microvm and maybe we'll need more space
then, but let's leave this f
Logic reversed: allowed list should just be ignored. Instead we
only take that into account :(
Fixes: e11b06a880ca ("checkpatch: ignore allowed diff list")
Signed-off-by: Michael S. Tsirkin
---
scripts/checkpatch.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/chec
On Thu, May 28, 2020 at 04:03:51PM -0700, no-re...@patchew.org wrote:
> Patchew URL:
> https://patchew.org/QEMU/20200528162011.16258-1-vishal.l.ve...@intel.com/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Message-id: 20200
Reviewed-by: zhanghailiang
Hmm, How much time it spends on preparing before COLO process ?
> -Original Message-
> From: Zhang Chen [mailto:chen.zh...@intel.com]
> Sent: Friday, May 15, 2020 12:28 PM
> To: Dr . David Alan Gilbert ; Juan Quintela
> ; Zhanghailiang ;
> qemu-dev
> Cc: Zhang
"Dr. David Alan Gilbert (git)" writes:
> From: "Dr. David Alan Gilbert"
>
> Simplify qom_set by making it use qmp_qom_set and the JSON parser.
>
> (qemu) qom-get /machine smm
> "auto"
> (qemu) qom-set /machine smm "auto"
>
> Signed-off-by: Dr. David Alan Gilbert
> Message-Id: <20200520151108.16
> -Original Message-
> From: Philippe Mathieu-Daudé On Behalf Of
> Philippe Mathieu-Daudé
> Sent: 31 May 2020 18:38
> To: qemu-devel@nongnu.org
> Cc: Andrew Jeffery ; Helge Deller ; Peter
> Maydell
> ; Richard Henderson ; Eduardo
> Habkost
> ; Paul Durrant ; Hervé Poussineau
> ; Marcel
On 6/1/20 4:13 AM, Richard Henderson wrote:
> On 5/22/20 9:37 AM, Philippe Mathieu-Daudé wrote:
>> + $(if $(call startwith,risc,$1),risc,\
>
> Should be "riscv" not "risc". Especially the substitution.
Indeed.
>
>> +$(if $(call startwith,aarch64,$1),arm,\
>
On 31/05/2020, Peter Maydell wrote:
On Sun, 31 May 2020 at 17:42, Jon Doron wrote:
On 31/05/2020, Philippe Mathieu-Daudé wrote:
>On 3/30/20 6:41 PM, Peter Maydell wrote:
>> PS: do we have any documentation of this new command ?
>> ab4752ec8d9 has the implementation but no documentation...
>
>J
From: Zhang Chen
Fix this bug:
colo: Can not recover colo after svm failover twice
https://bugs.launchpad.net/bugs/1881231
The child index still be hold when it be deleted, the max num is 32.
Reported-by: Ye.Zou
Signed-off-by: Zhang Chen
---
block/quorum.c | 1 +
1 file changed, 1 insertion(
On 5/31/20 9:41 PM, Peter Maydell wrote:
> On Sun, 31 May 2020 at 18:54, Philippe Mathieu-Daudé wrote:
>>
>> Most CPUs can do 64-bit operations. Update the CPUReadMemoryFunc
>> and CPUWriteMemoryFunc prototypes.
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> include/exec/cpu-common.h | 4
Please try this patch:
https://lists.nongnu.org/archive/html/qemu-devel/2020-06/msg00016.html
Thanks
Zhang Chen
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1881231
Title:
colo: Can not recover
Since commit 62a0db942dec ('memory: Remove old_mmio accessors')
this structure is unused. Remove it.
Suggested-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/memory.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
Followed Peter's suggestions:
* delete the unused MmeoryRegionMmio
* move these typedefs into include/hw/usb.h and rename them
to MUSBReadFunc and MUSBWriteFunc, since that's all they're
used for now
https://www.mail-archive.com/qemu-devel@nongnu.org/msg708165.html
Philippe Mathieu-Daudé
Move the declarations for the MUSB-HDRC USB2.0 OTG compliant core
into a separate header.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/usb.h | 30
include/hw/usb/musb.h | 46 +++
hw/usb/hcd-musb.c | 1 +
hw/us
The CPUReadMemoryFunc/CPUWriteMemoryFunc typedefs are legacy
remnant from before the conversion to MemoryRegions.
Since they are now only used in tusb6010.c and hcd-musb.c,
move them to "hw/usb/musb.h" and rename them appropriately.
Suggested-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daud
On Sat, May 30, 2020 at 04:56:26PM +0800, Ying Fang wrote:
> About the kvm-no-adjvtime CPU property
>
> Hi Andrew,
> To adjust virutal time, a new kvm cpu property kvm-no-adjvtime
> was introduced to 5.0 virt machine types. However the cpu
> property was enabled only for host-passthrough and max c
On 5/31/20 9:09 PM, Peter Maydell wrote:
> On Sun, 31 May 2020 at 18:54, Philippe Mathieu-Daudé wrote:
>>
>> It is pointless to have 32-bit CPUs see a 64-bit address
>> space, when they can only address the 32 lower bits.
>>
>> Only create CPU address space with a size it can address.
>> This make
On 5/29/20 5:09 PM, Igor Mammedov wrote:
On Fri, 29 May 2020 15:33:48 +0200
Michal Privoznik wrote:
The initiator attribute of a NUMA node is documented as the 'NUMA
node that has best performance to given NUMA node'. If a NUMA
node has at least one CPU there can hardly be a different node
wit
On 5/31/20 9:14 PM, Peter Maydell wrote:
> On Sun, 31 May 2020 at 18:54, Philippe Mathieu-Daudé wrote:
>>
>> Do not restrict 64-bit CPU to 32-bit max access by default.
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> RFC because this probably require an audit of all devices
>> used on 64-bi
On 6/1/20 9:26 AM, Paul Durrant wrote:
>> -Original Message-
>> From: Philippe Mathieu-Daudé On Behalf Of
>> Philippe Mathieu-Daudé
>> Sent: 31 May 2020 18:38
>> To: qemu-devel@nongnu.org
>> Cc: Andrew Jeffery ; Helge Deller ; Peter
>> Maydell
>> ; Richard Henderson ; Eduardo
>> Habkost
On Wed, Apr 8, 2020 at 4:41 PM Huacai Chen wrote:
>
> Traditionally, MIPS use 4KB page size, but Loongson prefer 16KB page
> size in system emulator. So, let's define TARGET_PAGE_BITS_VARY and
> TARGET_PAGE_BITS_MIN to support variable page size.
>
> Cc: Jiaxun Yang
> Signed-off-by: Huacai Chen
On Sun, May 3, 2020 at 12:24 PM Huacai Chen wrote:
>
> MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
> can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
> MachineClass. Besides, libvirt uses a null-machine to detect the kvm
> capability, so by default
On Sun, May 3, 2020 at 12:23 PM Huacai Chen wrote:
>
> Preparing for Loongson-3 virtualization, add KVM target support for
> MIPS64 in configure script.
>
> Signed-off-by: Huacai Chen
> Co-developed-by: Jiaxun Yang
> ---
Applied to MIPS queue.
May health be with you and all people of China!
A
On Sun, May 3, 2020 at 12:28 PM Huacai Chen wrote:
>
> Add more CP0 register for save/restore, including: EBase, XContext,
> PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
>
> Signed-off-by: Huacai Chen
> Co-developed-by: Jiaxun Yang
> ---
Applied to MIPS queue.
Many
On 5/31/20 12:18 PM, Alex Bennée wrote:
>
> Philippe Mathieu-Daudé writes:
>
>> Hi,
>>
>> As there is no SH4 active maintainer, I gathered various
>> patches in a single series, in case someone is willing to
>> apply them.
>
> I'm sure you you could put yourself down as an "Odd Fixes" maintaine
* Sean Christopherson (sean.j.christopher...@intel.com) wrote:
> On Thu, May 21, 2020 at 01:42:46PM +1000, David Gibson wrote:
> > A number of hardware platforms are implementing mechanisms whereby the
> > hypervisor does not have unfettered access to guest memory, in order
> > to mitigate the secu
Le 5/18/20 à 3:50 PM, Philippe Mathieu-Daudé a écrit :
On 5/18/20 3:02 PM, kon...@adacore.com wrote:
From: KONRAD Frederic
This have been introduced by:
8de702cb677c8381fb702cae252d6b69aa4c653b
It doesn't seem to be used so remove it.
Signed-off-by: KONRAD Frederic
---
hw/semihostin
I don't have much clue about the Renesas hardware, but at least
I know now the source files a little bit, so I volunteer to pick
up patches and send pull-requests for them during my scarce
hobbyist time, until someone else with more knowledge steps up
to do this job instead.
Suggested-by: Alex Ben
* Philippe Mathieu-Daudé (f4...@amsat.org) wrote:
> "migration/vmstate.h" only uses pointer to MemoryRegion, which
> is already forward declared in "qemu/typedefs.h".
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> CI: https://travis-ci.org/github/philmd/qemu/builds/692879495
> ---
> include
After upgrading to Ubuntu 20.04 LTS, GCC 9.3 complains:
util/qemu-thread-posix.c: In function ‘qemu_thread_exit’:
util/qemu-thread-posix.c:577:6: error: function might be candidate for
attribute ‘noreturn’ [-Werror=suggest-attribute=noreturn]
577 | void qemu_thread_exit(void *retval)
Public bug reported:
After upgrading to Ubuntu 20.04 LTS, GCC 9.3 displays a lot of notes:
hw/block/pflash_cfi01.c: In function ‘pflash_mem_read_with_attrs’:
hw/block/pflash_cfi01.c:663:20: note: parameter passing for argument of type
‘MemTxAttrs’ {aka ‘struct MemTxAttrs’} changed in GCC 9.1
6
Hi
Please, send any topic that you are interested in covering.
There is already a topic from last call:
Last minute suggestion after recent IRC chat with Alex Bennée and
Thomas Huth:
"Move some of the build/CI infrastructure to GitLab."
Pro/Con?
- GitLab does not offer s390x/ppc64el => kee
On Mon, Jun 1, 2020 at 11:21 AM Philippe Mathieu-Daudé wrote:
>
> I don't have much clue about the Renesas hardware, but at least
> I know now the source files a little bit, so I volunteer to pick
> up patches and send pull-requests for them during my scarce
> hobbyist time, until someone else wit
Those patches bring MMIO TPM TIS ACPI support in machvirt.
The TPM2 build function is converted to build_append style.
Then the code is moved to the generic part.
On ARM, the TPM2 table is added when the TPM TIS sysbus
device is dynamically instantiated in machvirt.
Also the TPM2 device object is
In case it is dynamically instantiated, add the TPM 2.0 device object
under the DSDT table in the ACPI namespace. Its HID is MSFT0101
while its current resource settings (CRS) property is initialized
with the guest physical address and MMIO size of the device.
Signed-off-by: Eric Auger
Reviewed-b
We plan to build the TPM2 table on ARM too. In order to reuse the
generation code, let's move build_tpm2() to aml-build.c.
No change in the implementation.
Signed-off-by: Eric Auger
---
include/hw/acpi/aml-build.h | 2 ++
hw/acpi/aml-build.c | 44 +
In preparation of its move to the generic acpi code,
let's convert build_tpm2() to use build_append API. This
latter now is prefered in place of direct ACPI struct field
settings with manual endianness conversion.
Signed-off-by: Eric Auger
---
hw/i386/acpi-build.c | 28 +++---
Add a TPM2 ACPI table if a TPM2.0 sysbus device has been
dynamically instantiated.
Signed-off-by: Eric Auger
---
v2 -> v3:
- do not to need to create the log area anymore
v1 -> v2:
- reuse generic build_tpm2() and alloc log area externally
- call tpm_find() once in build_tpm2()
---
include/sy
On Mon, Jun 1, 2020 at 11:01 AM Aleksandar Markovic
wrote:
>
> On Sun, May 3, 2020 at 12:24 PM Huacai Chen wrote:
> >
> > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
> > can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
> > MachineClass. Besides, l
On Wed, Apr 8, 2020 at 4:41 PM Huacai Chen wrote:
>
> Loongson processor prefers 16KB page size in system emulator, so let's
> define mc->minimum_page_bits to 14.
>
> Cc: Jiaxun Yang
> Signed-off-by: Huacai Chen
> ---
Applied to MIPS queue.
Many thanks!
Aleksandar
> hw/mips/mips_fulong2e.c |
This series adds the test of the TPM2 and DSDT tables when the
TPM-TIS device gets instantiated.
The series also allows to validate changes in the TPM2 table
generation done in "[PATCH v3 0/4] vTPM/aarch64 ACPI support",
sent separately.
This depends on Stefan's "acpi: tpm: Do not build TCPA tabl
Subsequent patches will alter the content of TPM2.tis
and DSDT.tis so let's ignore them until the references
are generated.
Signed-off-by: Eric Auger
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
On Wed, Apr 8, 2020 at 4:41 PM Huacai Chen wrote:
>
> Traditionally, MIPS use 4KB page size, but Loongson prefer 16KB page
> size in system emulator. So, let's define TARGET_PAGE_BITS_VARY and
> TARGET_PAGE_BITS_MIN to support variable page size.
>
> Cc: Jiaxun Yang
> Signed-off-by: Huacai Chen
Test tables specific to the TPM-TIS instantiation.
The TPM2 is added in the framework. Also the DSDT
is updated with the TPM. The new function should be
be usable for CRB as well, later one.
Signed-off-by: Eric Auger
---
tests/qtest/bios-tables-test.c | 60 ++
tes
Include sockets and channel headers to that the header is
self-contained.
Signed-off-by: Eric Auger
---
tests/qtest/tpm-emu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/qtest/tpm-emu.h b/tests/qtest/tpm-emu.h
index a4f1d64226..73f3bed0c4 100644
--- a/tests/qtest/tpm-emu.h
+++ b
+Peter +Markus as neutral and experienced contributors.
On 6/1/20 11:56 AM, Aleksandar Markovic wrote:
> On Mon, Jun 1, 2020 at 11:21 AM Philippe Mathieu-Daudé
> wrote:
>>
>> I don't have much clue about the Renesas hardware, but at least
>> I know now the source files a little bit, so I volunte
While writing tests for checking the content of TPM2 and DSDT
along with TPM-TIS instantiation I attempted to reuse the
framework used for TPM-TIS tests. However While dumping the
ACPI tables I get an assert on TPM2_ST_NO_SESSIONS. My assumption
is maybe the other tests did not execute long enough
Add placeholders for TPM and DSDT reference tables for
Q35 TPM-TIS tests.
Signed-off-by: Eric Auger
---
tests/data/acpi/q35/DSDT.tis | Bin
tests/data/acpi/q35/TPM2.tis | Bin
2 files changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tests/data/acpi/q35/DSDT.tis
create mode 100644 te
TPM2, DSDT tables were generated using
tests/data/acpi/rebuild-expected-aml.sh
Signed-off-by: Eric Auger
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
tests/data/acpi/q35/DSDT.tis| Bin 0 -> 8468 bytes
tests/data/acpi/q35/TPM2.tis| Bin 0 -> 76 bytes
3
On Tue, May 5, 2020 at 9:30 AM Huacai Chen wrote:
>
> The description of "make check" is out-of-date, so fix it by adding
> block and softfloat.
>
> Signed-off-by: Huacai Chen
> ---
Applied to mips queue.
Thanks,
Aleksandar
> tests/Makefile.include | 2 +-
> 1 file changed, 1 insertion(+), 1
Stefan Hajnoczi writes:
> On Sat, Oct 26, 2019 at 05:49:11PM -0400, Michael S. Tsirkin wrote:
>> On Fri, Oct 25, 2019 at 12:01:50PM +0200, Stefan Hajnoczi wrote:
>> > tests/vhost-user-fs-test.c needs fuse.h. The private copy that
>> > virtiofsd has can be replaced with a properly imported file
Fred Konrad writes:
> Le 5/18/20 à 3:50 PM, Philippe Mathieu-Daudé a écrit :
>> On 5/18/20 3:02 PM, kon...@adacore.com wrote:
>>> From: KONRAD Frederic
>>>
>>> This have been introduced by:
>>>8de702cb677c8381fb702cae252d6b69aa4c653b
>>>
>>> It doesn't seem to be used so remove it.
>>>
>>>
Philippe Mathieu-Daudé writes:
> On 5/31/20 12:18 PM, Alex Bennée wrote:
>>
>> Philippe Mathieu-Daudé writes:
>>
>>> Hi,
>>>
>>> As there is no SH4 active maintainer, I gathered various
>>> patches in a single series, in case someone is willing to
>>> apply them.
>>
>> I'm sure you you coul
On Mon, Jun 1, 2020 at 12:23 PM Philippe Mathieu-Daudé wrote:
>
> +Peter +Markus as neutral and experienced contributors.
>
> On 6/1/20 11:56 AM, Aleksandar Markovic wrote:
> > On Mon, Jun 1, 2020 at 11:21 AM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> I don't have much clue about the Renesas ha
On Mon, 1 Jun 2020 at 08:54, Philippe Mathieu-Daudé wrote:
>
> Followed Peter's suggestions:
>
> * delete the unused MmeoryRegionMmio
> * move these typedefs into include/hw/usb.h and rename them
>to MUSBReadFunc and MUSBWriteFunc, since that's all they're
>used for now
> include/exec/
ping
On 22.05.2020 09:47, Pavel Dovgalyuk wrote:
When QEMU is executed in console mode without any external event sources,
main loop may sleep for a very long time. But in case of replay
there is another event source - event log.
This patch adds main loop notification when the vCPU loop has noth
ping
On 30.04.2020 12:02, Pavel Dovgalyuk wrote:
From: Pavel Dovgalyuk
Windows guest sometimes makes DMA requests with overlapping
target addresses. This leads to the following structure of iov for
the block driver:
addr size1
addr size2
addr size3
It means that three adjacent disk blocks sh
ping
On 22.05.2020 09:45, Pavel Dovgalyuk wrote:
When QEMU is used without any graphical window,
QEMU execution is terminated with the signal (e.g., Ctrl-C).
Signal processing in QEMU does not include
qemu_system_shutdown_request call. That is why shutdown
event is not recorded by record/replay
On Mon 01 Jun 2020 09:19:56 AM CEST, Zhang Chen wrote:
> From: Zhang Chen
>
> Fix this bug:
> colo: Can not recover colo after svm failover twice
> https://bugs.launchpad.net/bugs/1881231
>
> The child index still be hold when it be deleted, the max num is 32.
>
> Reported-by: Ye.Zou
> Signed-off
Jon Doron writes:
> On 31/05/2020, Peter Maydell wrote:
>>On Sun, 31 May 2020 at 17:42, Jon Doron wrote:
>>>
>>> On 31/05/2020, Philippe Mathieu-Daudé wrote:
>>> >On 3/30/20 6:41 PM, Peter Maydell wrote:
>>> >> PS: do we have any documentation of this new command ?
>>> >> ab4752ec8d9 has the i
On 01/06/2020, Alex Bennée wrote:
Jon Doron writes:
On 31/05/2020, Peter Maydell wrote:
On Sun, 31 May 2020 at 17:42, Jon Doron wrote:
On 31/05/2020, Philippe Mathieu-Daudé wrote:
>On 3/30/20 6:41 PM, Peter Maydell wrote:
>> PS: do we have any documentation of this new command ?
>> ab4752
On Mon, 1 Jun 2020 at 09:09, Philippe Mathieu-Daudé wrote:
> On 5/31/20 9:09 PM, Peter Maydell wrote:
> > [*] Strictly speaking, it would depend on the
> > maximum physical address size used by any transaction
> > master in the system -- in theory you could have a
> > 32-bit-only CPU and a DMA con
On Mon, 1 Jun 2020 at 11:34, Aleksandar Markovic
wrote:
> You add the utter confusion to a clear thing.
>
> "Renesas" is not the same as "sh4". We had "sh4" as a target since
> forever, and now you suddenly want to change "sh4 hardware" to
> "Renesas hardware"??
Hi Aleksandar; you seem to be bein
On Mon, Jun 1, 2020 at 12:48 PM Peter Maydell wrote:
>
> On Mon, 1 Jun 2020 at 11:34, Aleksandar Markovic
> wrote:
> > You add the utter confusion to a clear thing.
> >
> > "Renesas" is not the same as "sh4". We had "sh4" as a target since
> > forever, and now you suddenly want to change "sh4 har
On 5/29/20 3:33 PM, Michal Privoznik wrote:
I've started working on libvirt side of this feature. WIP patches can be
found here:
https://github.com/zippy2/libvirt/commits/hmat
I've gotten to a point where libvirt generates cmd line but QEMU refuses
it. Problem is that I was looking into qemu-op
On 6/1/20 10:33 AM, Philippe Mathieu-Daudé wrote:
> On 6/1/20 9:26 AM, Paul Durrant wrote:
>>> -Original Message-
>>> From: Philippe Mathieu-Daudé On Behalf
>>> Of Philippe Mathieu-Daudé
>>> Sent: 31 May 2020 18:38
>>> To: qemu-devel@nongnu.org
>>> Cc: Andrew Jeffery ; Helge Deller ; Pete
On 6/1/20 12:35 PM, Peter Maydell wrote:
> On Mon, 1 Jun 2020 at 08:54, Philippe Mathieu-Daudé wrote:
>>
>> Followed Peter's suggestions:
>>
>> * delete the unused MmeoryRegionMmio
>> * move these typedefs into include/hw/usb.h and rename them
>>to MUSBReadFunc and MUSBWriteFunc, since that'
Hello all,
is this queued somewhere?
Thanks,
Claudio
On 5/18/20 6:03 PM, Claudio Fontana wrote:
> v4 -> v5:
>
> * include the dtc submodule update commit in the 1/2 patch
>
> v3 -> v4: NB! only useful when updating to latest dtc (not in QEMU yet)
>
> * changed the approach to leverage new up
On Sun, 31 May 2020 at 17:40, Philippe Mathieu-Daudé wrote:
>
> The following changes since commit c86274bc2e34295764fb44c2aef3cf29623f9b4b:
>
> Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-tcg-plugins=
> -270520-1' into staging (2020-05-29 17:41:45 +0100)
>
> are available in
On Mon, Jun 1, 2020 at 6:15 AM Aleksandar Markovic
wrote:
>
> On Mon, Jun 1, 2020 at 11:01 AM Aleksandar Markovic
> wrote:
> >
> > On Sun, May 3, 2020 at 12:24 PM Huacai Chen wrote:
> > >
> > > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
> > > can't create a VZ guest i
On Sun, 31 May 2020 at 06:37, Philippe Mathieu-Daudé wrote:
>
> On 5/29/20 10:34 PM, Robert Foley wrote:
> > Add a common Ubuntu python module and make use of
> > it with the ubuntu.i386 script.
> > This is preparation for adding an Ubuntu script
> > ubuntu.aarch64. Splitting out the common
> > l
On 2020/6/1 16:07, Andrew Jones wrote:
On Sat, May 30, 2020 at 04:56:26PM +0800, Ying Fang wrote:
About the kvm-no-adjvtime CPU property
Hi Andrew,
To adjust virutal time, a new kvm cpu property kvm-no-adjvtime
was introduced to 5.0 virt machine types. However the cpu
property was enabled on
On Sun, 31 May 2020 at 16:58, Magdy, Mina wrote:
> I’m currently going through this QEMU patch that related to adding the NS
> alias for SCS region in ARMv8m cores.
> Why did you assumed that secure accesses to the alias act like NS accesses to
> the real region registers. I discovered the any
The following changes since commit 4ec2a1f53e8aaa22924614b64dde97321126943e:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2020-05-30' into staging (2020-05-31
20:43:45 +0100)
are available in the git repository at:
https://github.com/AMarkovic/qemu
for you to fetch
From: Huacai Chen
Preparing for Loongson-3 virtualization, add KVM target support for
MIPS64 in configure script.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Message-Id: <1588501221-1205-2-git-send-email-che...@l
From: Huacai Chen
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Message-I
From: Huacai Chen
Traditionally, MIPS use 4KB page size, but Loongson prefer 16KB page
size in system emulator. So, let's define TARGET_PAGE_BITS_VARY and
TARGET_PAGE_BITS_MIN to support variable page size.
Cc: Jiaxun Yang
Signed-off-by: Huacai Chen
Reviewed-by: Aleksandar Markovic
Signed-off
From: Huacai Chen
The description of "make check" is out-of-date, so fix it by adding
block and softfloat.
Reviewed-by: Claudio Fontana
Signed-off-by: Huacai Chen
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar
From: Huacai Chen
Loongson processor prefers 16KB page size in system emulator, so let's
define mc->minimum_page_bits to 14.
Cc: Jiaxun Yang
Signed-off-by: Huacai Chen
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Message-Id: <1586337380-25217-2-git-send-email-che...@le
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