The Xilinx ZynqMP CAN controller is developed based on SocketCAN, QEMU CAN bus
implementation. Bus connection and socketCAN connection for each CAN module
can be set through command lines.
Signed-off-by: Vikram Garhwal
---
hw/net/can/Makefile.objs |1 +
hw/net/can/xlnx-zynqmp-can.c
Reviewed-by: Francisco Iglesias
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Vikram Garhwal
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8cbc1fa..b53d75e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1433,6 +1433,14 @@ F: hw/net/o
Connect CAN0 and CAN1 on the ZynqMP.
Reviewed-by: Francisco Iglesias
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Vikram Garhwal
---
hw/arm/xlnx-zynqmp.c | 26 ++
include/hw/arm/xlnx-zynqmp.h | 3 +++
2 files changed, 29 insertions(+)
diff --git a/hw/arm/xlnx
The QTests perform five tests on the Xilinx ZynqMP CAN controller:
Tests the CAN controller in loopback, sleep and snoop mode.
Tests filtering of incoming CAN messages.
Acked-by: Thomas Huth
Signed-off-by: Vikram Garhwal
---
tests/qtest/Makefile.include | 2 +
tests/qtest/xlnx-can-tes
Example for single CAN:
-object can-bus,id=canbus0 \
-global driver=xlnx.zynqmp-can,property=canbus0,value=canbus0 \
-object can-host-socketcan,id=socketcan0,if=vcan0,canbus=canbus0
Example for connecting both CAN:
-object can-bus,id=canbus0 -object can-bus,id=canbus1 \
I've written up a basic implementation of the SAB 82532 ESCC2 device
and have written a patch for OpenBIOS to add it to the device tree. I
still have the 16550A UART acting as ttya to avoid having to write an
OpenBIOS device driver.
OpenBSD and Solaris both identify the device correctly and attach
On Thu, 2020-05-14 at 13:56 +0200, Max Reitz wrote:
> On 10.05.20 15:40, Maxim Levitsky wrote:
> > Next few patches will expose that functionality to the user.
> >
> > Signed-off-by: Maxim Levitsky
> > Reviewed-by: Daniel P. Berrangé
> > ---
> > crypto/block-luks.c | 395 +++
On Thu, 2020-05-14 at 14:18 +0200, Max Reitz wrote:
> On 10.05.20 15:40, Maxim Levitsky wrote:
> > 'force' option will be used for some unsafe amend operations.
> >
> > This includes things like erasing last keyslot in luks based formats
> > (which destroys the data, unless the master key is backe
On Fri, 2020-05-15 at 12:24 -0500, Eric Blake wrote:
> On 5/15/20 1:22 AM, Max Reitz wrote:
>
> > > >
> > > > > +QCOW_COMMON_OPTIONS,
> > > > > +{ /* end of list */ }
> > >
> > > ...the intended usage is to use the macro name followed by a comma, so
> > > including a trailing com
On Thu, 2020-05-14 at 14:28 +0200, Max Reitz wrote:
> On 10.05.20 15:40, Maxim Levitsky wrote:
> > Some options are only useful for creation
> > (or hard to be amended, like cluster size for qcow2), while some other
> > options are only useful for amend, like upcoming keyslot management
> > options
This series contains mostly cosmetic FPU cleanups aimed to make
source code recognition easier for tools like gdb, gcov, calgrind,
and others.
There is also a patch that refactors conversion from ieee to mips
fp exception flags. This refactoring will improve the performance
of almost all fp-relate
After demacroing ., this macro is not
needed anymore.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 39 ---
1 file changed, 39 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 2759c9989d..a3a39681f8 10064
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/targ
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/target
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/target/mips/fpu_helper.
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 70 ++--
1 file changed, 68 insertions(+), 2 deletions(-)
diff --git a/tar
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/target/
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 41 +++-
1 file changed, 40 insertions(+), 1 deletion(-)
diff --git a/targ
After demacroing RINT., this macro is not needed anymore.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index dae1331f23..56ba49104e 100644
--- a/target/mips/fp
Use consistently 'l' and 'h' for low and high halves.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 62
1 file changed, 31 insertions(+), 31 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 56ba49104
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 40 +++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/targ
This is just a cosmetic change to enable tools like gcov, gdb,
callgrind, etc. to better display involved source code.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/targ
Log the cases where a guest attempts read or write using bad
register offset.
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
hw/mips/mips_malta.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/hw/
After demacroing ., these macros
are not needed anymore.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 50
1 file changed, 50 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 927bac24ac..e8e50e4bc0 1
Aleksandar Rikalo wants to use a different email address from
now on.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
.mailmap| 3 ++-
MAINTAINERS | 12 ++--
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/.mailmap b/.mailmap
index 6412067b
After demacroing CLASS., this macro is not needed anymore.
Signed-off-by: Aleksandar Markovic
---
target/mips/fpu_helper.c | 39 ---
1 file changed, 39 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index b3903f5357..e227e53f70
The original coversion function is used for regular and MSA floating
point instructions handling. Since there are some nuanced differences
between regular and MSA floating point exception handling, provide two
instances of the conversion function, rather than just a single common
one. Inline both i
Machine file names should not have prefix "mips_".
Folong2 machine source file will be handled in a separate patch,
to avoid conflicts. That patch is pending integration into the
main tree.
Signed-off-by: Aleksandar Markovic
CC: Philippe Mathieu-Daudé
---
hw/mips/Makefile.objs
Fix qemu build on NetBSD/evbarm-aarch64 by providing a NetBSD specific
cpu_signal_handler.
Signed-off-by: Nick Hudson
---
accel/tcg/user-exec.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 4be78eb9b3..dd128adc
Fix qemu build on NetBSD/evbarm-aarch64 by providing a NetBSD specific
cpu_signal_handler.
Signed-off-by: Nick Hudson
---
accel/tcg/user-exec.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 4be78eb9b3..dd128adc
On 5/16/20 5:33 PM, BALATON Zoltan wrote:
On Sat, 16 May 2020, Alexander Bulekov wrote:
On 200516 1513, BALATON Zoltan wrote:
According to docs bits 1 and 0 of MM_INDEX are hard coded to 0 so
unaligned access via this register should not be possible.
This also fixes problems reported in bug #18
** Description changed:
qemu 5.0.0, liburing1 0.6-3, Linux 5.6.0-1-686-pae (Debian)
Stack trace:
- Stack trace of thread 31002:
- #0 0xb7faf1cd __kernel_vsyscall (linux-gate.so.1 +
0x11cd)
- #1 0xb6c618e2 __libc_signal_re
Fix OUTL instructions incorrectly displayed as OUTW.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/misc_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/misc_helper.c b/target/i386/misc_helper.c
index 7d61221024..b6b1d41b14 100644
--- a/target/i386
No, creating artificial NUMA nodes is, simply put, never a good solution
for CPUs that operate as a single NUMA node - which is the case for all
Zen2 CPUs (except maybe EPYCs? not sure about those).
You may workaround the L3 issue that way, but hit many new bugs/problems
by introducing multiple NU
Damir:
Hm, must be some misconfiguration, then. My config for Linux VMs to utilize 3
out of the 4 CCXs. Important parts of the libvirt domain XML:
24
1
Hello all,
my intention would be to develop per-target, dynamically loadable accelerator
modules.
This would allow to distribute a single QEMU base binary, and then provide
accelerators as optional additional binary packages to install,
with the first separate optional package being TCG.
CONFI
Something noticed while debugging Alexander's bug report
"Hang with high CPU usage in sdhci_data_transfer":
https://bugs.launchpad.net/qemu/+bug/1878054
The flatview ignores the MemoryRegion minimum access size.
It seems related to a similar issue Julia had with PCI
devices.
Not sure it is safe
As it is illegal to access a device with less that its
minimum valid size, also check for access_size_min.
Signed-off-by: Philippe Mathieu-Daudé
---
exec.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/exec.c b/exec.c
index 5162f0d12f..d3ec30f995 100644
--- a
Instead of accessing a device with an invalid short size,
return MEMTX_ERROR to indicate the transaction failed (as
the device won't accept the transaction anyway).
Reported by libFuzzer. sdhci_sdma_transfer_multi_blocks()
ends calling dma_memory_rw() with size < 4, while the DMA
MMIO regions are
On Sun, May 17, 2020 at 9:57 AM wrote:
>
> I've written up a basic implementation of the SAB 82532 ESCC2 device
> and have written a patch for OpenBIOS to add it to the device tree. I
> still have the 16550A UART acting as ttya to avoid having to write an
> OpenBIOS device driver.
Great progress!
On 2020/5/12 上午2:43, Laurent Vivier wrote:
>>
>> + IOCTL_SPECIAL(DRM_IOCTL_VERSION, IOC_RW, do_ioctl_drm,
>> +MK_PTR(MK_STRUCT(STRUCT_drm_version)))
>
> Add a blank line here.
>
OK, thanks.
>> #ifdef TARGET_TIOCSTART
>>IOCTL_IGNORE(TIOCSTART)
>>IOCTL_IGNORE(TIOCSTOP)
On 5/17/20 12:40 PM, Philippe Mathieu-Daudé wrote:
On 5/16/20 5:33 PM, BALATON Zoltan wrote:
On Sat, 16 May 2020, Alexander Bulekov wrote:
On 200516 1513, BALATON Zoltan wrote:
According to docs bits 1 and 0 of MM_INDEX are hard coded to 0 so
unaligned access via this register should not be po
On 5/17/20 11:23 AM, Aleksandar Markovic wrote:
Aleksandar Rikalo wants to use a different email address from
now on.
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
.mailmap| 3 ++-
MAINTAINERS | 12 ++--
2 fil
Hi Aleksandar,
On 5/17/20 11:23 AM, Aleksandar Markovic wrote:
Machine file names should not have prefix "mips_".
Folong2 machine source file will be handled in a separate patch,
Typo: "Fuloong2e"
to avoid conflicts. That patch is pending integration into the
main tree.
Signed-off-by: Alek
Patchew URL: https://patchew.org/QEMU/20200517113804.9063-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/b
Patchew URL: https://patchew.org/QEMU/20200517113804.9063-1-f4...@amsat.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export AR
On Sun, 17 May 2020, Philippe Mathieu-Daudé wrote:
On 5/17/20 12:40 PM, Philippe Mathieu-Daudé wrote:
On 5/16/20 5:33 PM, BALATON Zoltan wrote:
On Sat, 16 May 2020, Alexander Bulekov wrote:
On 200516 1513, BALATON Zoltan wrote:
Finally, there is a tag documented for bug fixes:
https://wiki.qe
On 5/17/20 3:51 PM, no-re...@patchew.org wrote:
Patchew URL: https://patchew.org/QEMU/20200517113804.9063-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably rep
With this commit, the watchdog on imx25-pdk is fully operational,
including pretimeout support.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Guenter Roeck
---
v3: No change
v2: Select WDT_IMX2 explicitly
Added Philippe's Reviewed-by: tag
hw/arm/Kconfig | 1 +
hw/arm/fsl-
In preparation for a full implementation, move i.MX watchdog driver
from hw/misc to hw/watchdog. While at it, add the watchdog files
to MAINTAINERS.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Guenter Roeck
---
v3: No change
v2: Instead of auto-selecting WDT_IMX2 if IMX is enabled, select
Instantiating PWM, CAN, CAAM, and OCOTP devices is necessary to avoid
crashes when booting mainline Linux.
Reviewed-by: Peter Maydell
Signed-off-by: Guenter Roeck
---
v3: Added Peter's Reviewed-by: tag
v2: "octop" -> "ocotp"
hw/arm/fsl-imx7.c | 24
include/hw/a
The current i.MX watchdog implementation only supports resets.
This patch series implements the full watchdog, including optional
pretimeout support.
Notable changes:
- The existing i.MX watchdog emulation (which only emulates syste resets)
is moved from hw/misc to hw/watchdog and renamed to mat
With this patch applied, the watchdog in the sabrelite emulation
is fully operational, including pretimeout support.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Guenter Roeck
---
v3: Added Philippe's Reviewed-by: tag
v2: No change
hw/arm/fsl-imx6.c | 9 +
1 file changed, 9 inser
Implement full support for the watchdog in i.MX systems.
Pretimeout support is optional because the watchdog hardware
on i.MX31 does not support pretimeouts.
Signed-off-by: Guenter Roeck
---
v3: Improve handling of write-once registers and bits
Stop timers in reset function
Use explicit p
With this patch, the watchdog on i.MX31 emulations is fully operational.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Guenter Roeck
---
v3: No change
v2: Select WDT_IMX2 explicitly
Added Philippe's Reviewed-by: tag
hw/arm/Kconfig | 1 +
hw/arm/fsl-imx31.c | 6
With this commit, the watchdog on mcimx6ul-evk is fully operational,
including pretimeout support.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Guenter Roeck
---
v3: Added Philippe's Reviewed-by: tag
v2: No change
hw/arm/fsl-imx6ul.c | 10 ++
1 file changed, 10 insertions(+)
dif
i.MX7 supports watchdog pretimeout interupts. With this commit,
the watchdog in mcimx7d-sabre is fully operational, including
pretimeout support.
Reviewed-by: Peter Maydell
Signed-off-by: Guenter Roeck
---
v3: Added Peter's Reviewed-by: tag
v2: No change
hw/arm/fsl-imx7.c | 11
Various places ignore the MemTxResult indicator of
transaction failed. Some cases might be justified
(DMA?) while other are probably bugs. To avoid
ignoring transaction errors, suggestion is to mark
functions returning MemTxResult with
warn_unused_result attribute.
Philippe Mathieu-Daudé (2):
ex
Both address_space_read_cached_slow() and
address_space_write_cached_slow() return a MemTxResult type.
Do not discard it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/memory.h | 19 +++
exec.c| 16
2 files change
When a function from the memory subsystem return a MemTxResult
to indicate that the transaction failed, this return value
must not be ignored by the caller. Mark all these functions
with the QEMU_WARN_UNUSED_RESULT attribute, to prevent users
to ignore possible failed transactions.
Signed-off-by:
нед, 17. мај 2020. у 15:19 Philippe Mathieu-Daudé је
написао/ла:
>
> Hi Aleksandar,
>
> On 5/17/20 11:23 AM, Aleksandar Markovic wrote:
> > Machine file names should not have prefix "mips_".
> >
> > Folong2 machine source file will be handled in a separate patch,
>
> Typo: "Fuloong2e"
>
> > to avo
Public bug reported:
Hi QEMU team,
=== Problem Summary ===
I have recently upgraded from QEMU-3.1.0 to to QEMU-5.0.0 on Debian
Unstable. Unfortunately GVTd (legacy passthrough of the integrated intel
gpu) stopped working correctly. The guest can still see and loads the
driver for the GPU, but t
** Summary changed:
- GVTd not working after upgrade to qemu-5.0.0
+ GVTd not working (black screen) after upgrade to qemu-5.0.0
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1879175
Title:
GVTd n
On 15/05/2020 19.07, Philippe Mathieu-Daudé wrote:
> The KVM files has been moved from target-ARCH to the target/ARCH/
> folder in commit fcf5ef2a. Fix the pathname expansion.
>
> Fixes: fcf5ef2a ("Move target-* CPU file into a target/ folder")
Oops, my bad. Sorry for that oversight!
> diff --gi
On 15/05/2020 19.07, Philippe Mathieu-Daudé wrote:
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Cc: Paolo Bonzini
> ---
> MAINTAINERS | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index fd88a3de49..659092eb43 1
On 15/05/2020 17.15, Cornelia Huck wrote:
> Add some hints about "devno" rules.
>
> Signed-off-by: Cornelia Huck
> ---
> docs/system/s390x/css.rst| 86
> docs/system/target-s390x.rst | 1 +
> 2 files changed, 87 insertions(+)
> create mode 100644 docs/s
On 15/05/2020 17.15, Cornelia Huck wrote:
> Add some basic info how to use 3270 devices.
>
> Signed-off-by: Cornelia Huck
> ---
> docs/system/s390x/3270.rst | 32
> docs/system/target-s390x.rst | 1 +
> 2 files changed, 33 insertions(+)
> create mode 100644 d
On 15/05/2020 17.15, Cornelia Huck wrote:
> Add a basic example for passing a dasd via vfio-ccw.
>
> Signed-off-by: Cornelia Huck
> ---
> docs/system/s390x/vfio-ccw.rst | 72 ++
> docs/system/target-s390x.rst | 1 +
> 2 files changed, 73 insertions(+)
> create
On Thu, 2020-05-14 at 15:36 +0200, Max Reitz wrote:
> On 10.05.20 15:40, Maxim Levitsky wrote:
> > Some qcow2 create options can't be used for amend.
> > Remove them from the qcow2 create options and add generic logic to detect
> > such options in qemu-img
> >
> > Signed-off-by: Maxim Levitsky
>
On 5/17/20 4:30 PM, BALATON Zoltan wrote:
On Sun, 17 May 2020, Philippe Mathieu-Daudé wrote:
On 5/17/20 12:40 PM, Philippe Mathieu-Daudé wrote:
On 5/16/20 5:33 PM, BALATON Zoltan wrote:
On Sat, 16 May 2020, Alexander Bulekov wrote:
On 200516 1513, BALATON Zoltan wrote:
Finally, there is a ta
On Thu, 2020-05-14 at 16:32 +0200, Max Reitz wrote:
> On 14.05.20 16:14, Daniel P. Berrangé wrote:
> > On Thu, May 14, 2020 at 04:09:59PM +0200, Max Reitz wrote:
> > > On 10.05.20 15:40, Maxim Levitsky wrote:
> > > > This implements the encryption key management using the generic code in
> > > > qc
On 15/05/2020 19.07, Philippe Mathieu-Daudé wrote:
> One might get caught trying to understand unexpected Makefile
> behavior. Trailing backslash can help to split very long lines,
> but are rather dangerous when nothing follow. Preserve other
> developers debugging time by removing this one.
>
>
On Thu, 2020-05-14 at 16:30 +0200, Max Reitz wrote:
> On 10.05.20 15:40, Maxim Levitsky wrote:
> > Now that we have all the infrastructure in place,
> > wire it in the qcow2 driver and expose this to the user.
> >
> > Signed-off-by: Maxim Levitsky
> > Reviewed-by: Daniel P. Berrangé
> > ---
> >
Patchew URL: https://patchew.org/QEMU/20200517164817.5371-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/b
Patchew URL: https://patchew.org/QEMU/20200517164817.5371-1-f4...@amsat.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export AR
Patchew URL: https://patchew.org/QEMU/20200517164817.5371-1-f4...@amsat.org/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#! /b
On Thu, 2020-05-14 at 16:49 +0200, Max Reitz wrote:
> On 10.05.20 15:40, Maxim Levitsky wrote:
> > This allows more tests to be able to have same output on both qcow2 luks
> > encrypted images
> > and raw luks images
> >
> > Signed-off-by: Maxim Levitsky
> > Reviewed-by: Daniel P. Berrangé
> >
Has there been any progress? I'm using KVM for ubuntu 20.04 and would
love to have this feature.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1502613
Title:
[Feature Request] Battery Status / Virt
Have you seen the patch series I have posted on the qemu-devel mailing
list? "[PATCH v5 0/7] dwc-hsotg (aka dwc2) USB host controller emulation."
If you could test that and give your 'tested-by', it could help get the
patch series accepted. That would require you to download the latest Qemu
source
After Xtensa release RE.2 simcall opcode has become nop for the
hardware instead of illegal instruction.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
in
Xtensa architecture has features which behavior depends on hardware
version. Provide hardware version information to translators: add
XtensaConfig::hw_version and use XCHAL_HW_VERSION from configuration
overlay to initialize it.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.h | 1 +
Hello,
this series fixes simcall opcode behavior on the recent xtensa cores
making it nop rather than illegal instruction when semihosting is
disabled.
Max Filippov (2):
target/xtensa: fetch HW version from configuration overlay
target/xtensa: fix simcall for newer hardware
target/xtensa/cp
Hi, I've been patching TCG for my own purposes recently and I was
wondering a few things. That being:
- Is the TCG backend expected to handle bad cases for instructions? I
was wondering as I found a situation where a very large shift constant
reaches the backend and causes an illegal instructi
After banging my head in a wall for tree or four days, I got the ac97 to
work on windows 98se applying something called "Auto-patcher for windows
98se" downloaded from retrosystemsrevival, then using the windows 95
"VXD_A406" driver updated manually by unpacking the executable and
picking the .inf
Hey Marc-Andre,
I'm working on a patchset with changes to libvhost-user. I'm hitting the
following checkpatch error:
Checking 0011-Lift-max-ram-slots-limit-in-libvhost-user.patch...
WARNING: architecture specific defines should be avoided
#117: FILE: contrib/libvhost-user/libvhost-user.h:38:
+#if
Hi Kirti and Yan,
How can I test this patch series on my SR-IOV devices?
I have looked through Yan's pathes for i40e VF live migration support：
https://patchwork.kernel.org/patch/11375177/
However, I cannot find the detailed implementation about device state
saving/restoring and dirty
On 2020/5/16 上午12:54, Dima Stepanov wrote:
On Thu, May 14, 2020 at 03:34:24PM +0800, Jason Wang wrote:
On 2020/5/13 下午5:47, Dima Stepanov wrote:
case CHR_EVENT_CLOSED:
/* a close event may happen during a read/write, but vhost
* code assumes the vhost_dev remains setup
On 2020/5/16 上午11:20, Li Feng wrote:
Hi, Dima.
This abort is what I have mentioned in my previous email.
I have triggered this crash without any fix a week ago.
And I have written a test patch to let vhost_log_global_start return
int and propagate the error to up layer.
However, my change is a
> Great progress! Are you planning to contribute your escc2 to the
> upstream?
I would like to. While it didn't solve the console difficulties on
OpenSolaris variants, it's probably still a good idea to increment
Sun4u emulation towards being more faithful to hardware. It will take
me a few weeks
On 5/18/2020 8:09 AM, Xiang Zheng wrote:
Hi Kirti and Yan,
How can I test this patch series on my SR-IOV devices?
I have looked through Yan's pathes for i40e VF live migration support：
https://patchwork.kernel.org/patch/11375177/
However, I cannot find the detailed implementatio
Public bug reported:
Hello,
While fuzzing, I found an input which triggers an assertion failure in
e1000e_write_rx_descr:
qemu-system-i386: /home/alxndr/Development/qemu/hw/net/e1000e_core.c:1359: void
e1000e_write_rx_descr(E1000ECore *, uint8_t *, struct NetRxPkt *, const
E1000E_RSSInfo *, siz
Public bug reported:
Hello,
While fuzzing, I found an input which triggers an assertion failure in
e1000e_write_lgcy_rx_descr:
qemu-system-i386: /home/alxndr/Development/qemu/hw/net/e1000e_core.c:1283: void
e1000e_write_lgcy_rx_descr(E1000ECore *, uint8_t *, struct NetRxPkt *, const
E1000E_RSSI
On 2020/5/15 下午11:16, Laurent Vivier wrote:
On 08/05/2020 04:57, Jason Wang wrote:
On 2020/5/7 下午7:49, Laurent Vivier wrote:
This new command shows internal status of a VirtQueue.
(vrings and indexes).
Signed-off-by: Laurent Vivier
It looks to me that packed virtqueue is not supported. It
On 2020/5/11 下午12:21, Alexander Bulekov wrote:
On 200511 1204, Jason Wang wrote:
The sender of packet will be checked in the qemu_net_queue_purge() but
we use NetClientState not its peer when trying to purge the incoming
queue in qemu_flush_or_purge_packets(). This will trigger the assert
in v
On Mon, May 18, 2020 at 10:39:52AM +0800, Xiang Zheng wrote:
> Hi Kirti and Yan,
>
> How can I test this patch series on my SR-IOV devices?
> I have looked through Yan's pathes for i40e VF live migration support：
> https://patchwork.kernel.org/patch/11375177/
>
I just updated the patches to v
Philippe Mathieu-Daudé writes:
> On Fri, May 15, 2020 at 8:07 AM Markus Armbruster wrote:
>>
>> Philippe Mathieu-Daudé writes:
>>
>> > We use the Object type all over the place.
>> > Forward declare it in "qemu/typedefs.h".
>> >
>> > Signed-off-by: Philippe Mathieu-Daudé
>> > ---
>> > include
Stefan Hajnoczi writes:
> On Fri, May 15, 2020 at 09:00:21AM +0200, Markus Armbruster wrote:
>> diff --git a/trace/simple.c b/trace/simple.c
>> index fc7106ec49..906391538f 100644
>> --- a/trace/simple.c
>> +++ b/trace/simple.c
>> @@ -302,10 +302,10 @@ static int st_write_event_mapping(void)
>>
Gerd Hoffmann writes:
> On Fri, May 15, 2020 at 09:06:20AM +0200, Markus Armbruster wrote:
>> Watch this:
>>
>> $ aarch64-softmmu/qemu-system-aarch64 -S -nodefaults -accel qtest
>> -display none -M vexpress-a15 -audiodev none,id=foo
>> audio: Device lm4549: audiodev default parameter is
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