Re: [RFC] bdrv_flush: only use fast path when in owned AioContext

2020-05-12 Thread Stefan Reiter
On 5/12/20 1:32 PM, Kevin Wolf wrote: Am 12.05.2020 um 12:57 hat Kevin Wolf geschrieben: Am 11.05.2020 um 18:50 hat Stefan Reiter geschrieben: Just because we're in a coroutine doesn't imply ownership of the context of the flushed drive. In such a case use the slow path which explicitly enters

Re: [PATCH RESEND v6 17/36] multi-process: introduce proxy object

2020-05-12 Thread Stefan Hajnoczi
On Wed, Apr 22, 2020 at 09:13:52PM -0700, elena.ufimts...@oracle.com wrote: > From: Elena Ufimtseva > > Defines a PCI Device proxy object as a parent of TYPE_PCI_DEVICE. s/parent/child/ > > PCI Proxy Object registers as a PCI device with QEMU and forwards all > PCI accesses to the remote proce

Re: [PATCH RESEND v6 12/36] multi-process: add functions to synchronize proxy and remote endpoints

2020-05-12 Thread Jag Raman
> On May 12, 2020, at 6:21 AM, Stefan Hajnoczi wrote: > > On Wed, Apr 22, 2020 at 09:13:47PM -0700, elena.ufimts...@oracle.com wrote: >> From: Jagannathan Raman >> >> In some cases, for example MMIO read, QEMU has to wait for the remote to >> complete a command before proceeding. An eventfd

[PATCH v2 0/2] net: Drop legacy "name" from -net and remove NetLegacy

2020-05-12 Thread Thomas Huth
Since commit b4983c570c7a ("net: Remove deprecated [hub_id name] tuple of 'hostfwd_add' / 'hostfwd_remove'"), the "name" parameter is not used internally anymore. And it's been marked as deprecated since QEMU v3.1, so it is time to remove the "name" parameter from -net now. Once this has been done,

[PATCH v2 1/2] net: Drop the legacy "name" parameter from the -net option

2020-05-12 Thread Thomas Huth
It's been deprecated since QEMU v3.1, so it's time to finally remove it. The "id" parameter can simply be used instead. Reviewed-by: Eric Blake Signed-off-by: Thomas Huth --- docs/system/deprecated.rst | 15 +-- net/net.c | 10 +- qapi/net.json

[PATCH v2 2/2] net: Drop the NetLegacy structure, always use Netdev instead

2020-05-12 Thread Thomas Huth
Now that the "name" parameter is gone, there is hardly any difference between NetLegacy and Netdev anymore. Drop NetLegacy and always use Netdev to simplify the code quite a bit. Signed-off-by: Thomas Huth --- net/net.c | 74 --- qapi/net.json

Re: [PATCH RESEND v6 18/36] multi-process: Initialize Proxy Object's communication channel

2020-05-12 Thread Stefan Hajnoczi
On Wed, Apr 22, 2020 at 09:13:53PM -0700, elena.ufimts...@oracle.com wrote: > From: Jagannathan Raman > > Add "socket" object property which initializes the communication channel > > Signed-off-by: Elena Ufimtseva > Signed-off-by: Jagannathan Raman > Signed-off-by: John G Johnson > --- > hw/

Re: [PATCH RESEND v6 17/36] multi-process: introduce proxy object

2020-05-12 Thread Jag Raman
> On May 12, 2020, at 8:23 AM, Stefan Hajnoczi wrote: > > On Wed, Apr 22, 2020 at 09:13:52PM -0700, elena.ufimts...@oracle.com wrote: >> From: Elena Ufimtseva >> >> Defines a PCI Device proxy object as a parent of TYPE_PCI_DEVICE. > > s/parent/child/ > >> >> PCI Proxy Object registers as

Re: [PATCH 0/4] linux-user/arm: Fix BKPT, SVC immediate handling

2020-05-12 Thread Peter Maydell
On Mon, 20 Apr 2020 at 22:22, Peter Maydell wrote: > > This patchseries fixes issues with the code in linux-user/arm/cpu_loop.c: > * it incorrectly thinks BKPT is a syscall instruction >(https://bugs.launchpad.net/qemu/+bug/1873898, reported via irc) > * a stale line of code means we incorre

Re: SBSA-REF maintainer email bouncing

2020-05-12 Thread Radoslaw Biernacki
Yes my Linaro account is not active anymore. I will sent a patch witch email update to r...@semihalf.com as this is my company's email. wt., 12 maj 2020, 11:37 użytkownik Leif Lindholm napisał: > On Tue, May 12, 2020 at 08:34:13 +0200, Philippe Mathieu-Daudé wrote: > > Hello, > > > > Radoslaw Bi

Re: [PATCH RESEND v6 19/36] multi-process: Connect Proxy Object with device in the remote process

2020-05-12 Thread Stefan Hajnoczi
On Wed, Apr 22, 2020 at 09:13:54PM -0700, elena.ufimts...@oracle.com wrote: > From: Jagannathan Raman > > Send a message to the remote process to connect PCI device with the > corresponding Proxy object in QEMU The CONNECT_DEV message is no longer necessary with a 1 socket per device architectur

Re: [PATCH v3 00/16] target/arm: partial vector cleanup

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > This is not complete, but shows the direction I'd like to go. > > Version 2 extracts more bits from my sve2 branch. There's > still more to pull back, especially for crypto_helper.c, where > there are also tail clearing bugs to fix. > > Ve

Re: [PATCH for-5.1 V3 1/7] configure: Add KVM target support for MIPS64

2020-05-12 Thread Aleksandar Markovic
нед, 3. мај 2020. у 12:23 Huacai Chen је написао/ла: > > Preparing for Loongson-3 virtualization, add KVM target support for > MIPS64 in configure script. > > Signed-off-by: Huacai Chen > Co-developed-by: Jiaxun Yang > --- Reviewed-by: Aleksandar Markovic > configure | 2 +- > 1 file changed

Re: [PATCH for-5.1 V3 3/7] hw/mips: Add CPU IRQ3 delivery for KVM

2020-05-12 Thread Aleksandar Markovic
нед, 3. мај 2020. у 12:24 Huacai Chen је написао/ла: > > Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add > IP3 delivery as well, because Loongson-3 based machine use both IRQ2 > (CPU's IP2) and IRQ3 (CPU's IP3). > > Signed-off-by: Huacai Chen > Co-developed-by: Jiaxun Yang

Re: [PATCH for-5.1 V3 5/7] target/mips: Add more CP0 register for save/restore

2020-05-12 Thread Aleksandar Markovic
нед, 3. мај 2020. у 12:25 Huacai Chen је написао/ла: > > Add more CP0 register for save/restore, including: EBase, XContext, > PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6. > > Signed-off-by: Huacai Chen > Co-developed-by: Jiaxun Yang > --- Reviewed-by: Aleksandar Mar

Re: [PATCH v3 02/16] target/arm: Create gen_gvec_{u,s}{rshr,rsra}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Create vectorized versions of handle_shri_with_rndacc > for shift+round and shift+round+accumulate. Add out-of-line > helpers in preparation for longer vector lengths from SVE. > > Signed-off-by: Richard Henderson > --- > target/arm/help

[Bug 1823831] Re: BSD bootloader halts with hypervisor.framework

2020-05-12 Thread Roman Bolshakov
Hi Chen, Do you see the issue on the latest version of QEMU (v5.0 or master)? The fix addressed incorrect IRQ inhibition: https://git.qemu.org/?p=qemu.git;a=commit;h=ddd31732a7379e056749836ff37ff57718083ddb Thanks, Roman ** Changed in: qemu Status: New => Fix Released -- You received t

[PATCH v4 01/12] net: cadence_gem: Fix debug statements

2020-05-12 Thread Sai Pavan Boddu
Enabling debug breaks the build, Fix them and make debug statements always compilable. Fix few statements to use sized integer casting. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 27 +-- 1 file changed, 13 insertions(+), 14 d

[PATCH v4 00/12] Cadence GEM Fixes

2020-05-12 Thread Sai Pavan Boddu
Hi, Following patch series fixes issues with priority queues, Adds JUMBO Frame support, Makes Debug statements compilable & Fixes related to multicast frames. Changes for V2: Fixed build failure on fedora docker machine Fix buggy debug print to use sized integer casting Changes fo

[PATCH v4 02/12] net: cadence_gem: Fix the queue address update during wrap around

2020-05-12 Thread Sai Pavan Boddu
During wrap around and reset, queues are pointing to initial base address of queue 0, irrespective of what queue we are dealing with. Fix it by assigning proper base address every time. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 37 +

[PATCH v4 08/12] net: cadence_gem: Add support for jumbo frames

2020-05-12 Thread Sai Pavan Boddu
Add a property "jumbo-max-len", which sets default value of jumbo frames up to 16,383 bytes. Add Frame length checks for standard and jumbo frames. Signed-off-by: Sai Pavan Boddu --- hw/net/cadence_gem.c | 46 +++- include/hw/net/cadence_gem.h | 4

[PATCH v4 04/12] net: cadence_gem: Define access permission for interrupt registers

2020-05-12 Thread Sai Pavan Boddu
Q1 to Q7 ISR's are clear-on-read, IER/IDR registers are write-only, mask reg are read-only. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c inde

[PATCH v4 05/12] net: cadence_gem: Set ISR according to queue in use

2020-05-12 Thread Sai Pavan Boddu
Set ISR according to queue in use, added interrupt support for all queues. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 27 +-- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/caden

[PATCH v4 10/12] net: cadence_gem: Update the reset value for interrupt mask register

2020-05-12 Thread Sai Pavan Boddu
Mask all interrupt on reset. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 423b47a..1b2e31d 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c

[PATCH v4 06/12] net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState

2020-05-12 Thread Sai Pavan Boddu
Moving this buffers to CadenceGEMState, as their size will be increased more when JUMBO frames support is added. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 38 +- include/hw/net/cadence_gem.h | 4 2

[PATCH v4 03/12] net: cadence_gem: Fix irq update w.r.t queue

2020-05-12 Thread Sai Pavan Boddu
Set irq's specific to a queue, present implementation is setting q1 irq based on q0 status. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 25 +++-- 1 file changed, 3 insertions(+), 22 deletions(-) diff --git a/hw/net/cadence_gem.c

[PATCH v4 07/12] net: cadence_gem: Fix up code style

2020-05-12 Thread Sai Pavan Boddu
Fix the code style for register definitions. Signed-off-by: Sai Pavan Boddu --- hw/net/cadence_gem.c | 204 ++- 1 file changed, 103 insertions(+), 101 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 11e36d0..f6ff27c 100

[PATCH v4 09/12] net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg

2020-05-12 Thread Sai Pavan Boddu
Advertise support of clear-on-read for ISR registers. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 85142e1..423b47a 100644 --- a/hw/net

[PATCH v4 11/12] net: cadence_gem: TX_LAST bit should be set by guest

2020-05-12 Thread Sai Pavan Boddu
TX_LAST bit should not be set by hardware, its set by guest to inform the last bd of the frame. Signed-off-by: Sai Pavan Boddu Signed-off-by: Edgar E. Iglesias Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/hw/net/cadence_gem.c

[PATCH v4 12/12] net: cadence_gem: Fix RX address filtering

2020-05-12 Thread Sai Pavan Boddu
From: Tong Ho Two defects are fixed: 1/ Detection of multicast frames 2/ Treating drop of mis-addressed frames as non-error Signed-off-by: Tong Ho Signed-off-by: Edgar E. Iglesias Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 26 +++---

Re: [PATCH v3 01/16] target/arm: Create gen_gvec_[us]sra

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > The functions eliminate duplication of the special cases for > this operation. They match up with the GVecGen2iFn typedef. > > Add out-of-line helpers. We got away with only having inline > expanders because the neon vector size is only 1

[PATCH] travis.yml: Improve the --disable-tcg test on s390x

2020-05-12 Thread Thomas Huth
Since the s390x containers do not allow KVM, we only compile-test the --disable-tcg build on s390x and do not run the qtests. Thus, it does not make sense to install genisoimage here, and it also does not make sense to build the s390-ccw.img here again - it is simply not used without the qtests. On

Re: [PATCH 0/2] use unsigned type for MegasasState fields

2020-05-12 Thread Philippe Mathieu-Daudé
Cc'ing Marc-André our signed/unsigned conversion expert (with Paolo). On 5/7/20 12:57 PM, P J P wrote: From: Prasad J Pandit Hello, * This series fixes an OOB access issue which may occur when a guest user sets 's->reply_queue_head' field to a negative(or large positive) value, via 'str

Re: [PATCH v3 02/16] target/arm: Create gen_gvec_{u,s}{rshr,rsra}

2020-05-12 Thread Peter Maydell
On Tue, 12 May 2020 at 14:09, Peter Maydell wrote: > > On Fri, 8 May 2020 at 16:22, Richard Henderson > wrote: > > > > Create vectorized versions of handle_shri_with_rndacc > > for shift+round and shift+round+accumulate. Add out-of-line > > helpers in preparation for longer vector lengths from S

Re: Assertion failure through vring_split_desc_read

2020-05-12 Thread Laurent Vivier
On 11/05/2020 05:51, Alexander Bulekov wrote: > Hello, > While fuzzing, I found an input that triggers an assertion failure > through virtio-rng -> vring_split_desc_read. Maybe this is related to: > Message-ID: <20200511033001.dzvtbdhl3oz5p...@mozz.bu.edu> > Assertion failure through virtio_lduw_p

Re: [PATCH RESEND v6 20/36] multi-process: Forward PCI config space acceses to the remote process

2020-05-12 Thread Stefan Hajnoczi
On Wed, Apr 22, 2020 at 09:13:55PM -0700, elena.ufimts...@oracle.com wrote: > +static int config_op_send(PCIProxyDev *dev, uint32_t addr, uint32_t *val, > int l, > + unsigned int op) > +{ > +MPQemuMsg msg; > +struct conf_data_msg conf_data; > +int wait; > + > +

Re: [PATCH] travis.yml: Improve the --disable-tcg test on s390x

2020-05-12 Thread Philippe Mathieu-Daudé
On 5/12/20 3:38 PM, Thomas Huth wrote: Since the s390x containers do not allow KVM, we only compile-test the --disable-tcg build on s390x and do not run the qtests. Thus, it does not make sense to install genisoimage here, and it also does not make sense to build the s390-ccw.img here again - it

Re: [PATCH v3 02/16] target/arm: Create gen_gvec_{u,s}{rshr,rsra}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Create vectorized versions of handle_shri_with_rndacc > for shift+round and shift+round+accumulate. Add out-of-line > helpers in preparation for longer vector lengths from SVE. > > Signed-off-by: Richard Henderson > +/* tszimm encod

Re: [PATCH v3 03/16] target/arm: Create gen_gvec_{sri,sli}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > The functions eliminate duplication of the special cases for > this operation. They match up with the GVecGen2iFn typedef. > > Add out-of-line helpers. We got away with only having inline > expanders because the neon vector size is only 1

Re: [PATCH v3 04/16] target/arm: Remove unnecessary range check for VSHL

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > In 1dc8425e551, while converting to gvec, I added an extra range check > against the shift count. This was unnecessary because the encoding of > the shift count produces 0 to the element size - 1. > > Signed-off-by: Richard Henderson > --

Re: [PATCH v3 05/16] target/arm: Tidy handle_vec_simd_shri

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Now that we've converted all cases to gvec, there is quite a bit > of dead code at the end of the function. Remove it. > > Sink the call to gen_gvec_fn2i to the end, loading a function > pointer within the switch statement. > > Signed-off-

Re: [PATCH] qemu-nbd: Close inherited stderr

2020-05-12 Thread Eric Blake
On 5/12/20 3:56 AM, Raphael Pour wrote: Hello, after e6df58a5, the inherited stderr 'old_stderr' won't get closed anymore if 'fork_process' is false. This causes other processes relying on EOF to infinitely block or crash. From 47ab9b517038d13117876a8bb3ef45c53d7f2f9e Mon Sep 17 00:00:00 2001

Re: [PATCH v1 5/5] i386: Hyper-V VMBus ACPI DSDT entry

2020-05-12 Thread Roman Kagan
On Thu, Apr 09, 2020 at 06:35:18AM +0300, Jon Doron wrote: > On 08/04/2020, Roman Kagan wrote: > > On Wed, Apr 08, 2020 at 07:16:39AM +0300, Jon Doron wrote: > > > Well I have implemented the hyperv synthetic kernel debugger interface, > > > but > > > on Windows 10 it requires to have a working VM

Re: [PATCH] tests/guest-debug: catch hanging guests

2020-05-12 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20200512104338.27365-1-alex.ben...@linaro.org/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN

Re: [PATCH v3 06/16] target/arm: Create gen_gvec_{ceq, clt, cle, cgt, cge}0

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Provide a functional interface for the vector expansion. > This fits better with the existing set of helpers that > we provide for other operations. > > Macro-ize the 5 nearly identical comparisons. > > Signed-off-by: Richard Henderson > -

Re: [PATCH v2 1/3] acpi: Move build_tpm2() in the generic part

2020-05-12 Thread Igor Mammedov
On Wed, 6 May 2020 11:50:09 +0200 Auger Eric wrote: > Hi, > > On 5/6/20 8:33 AM, Andrew Jones wrote: > > On Tue, May 05, 2020 at 04:44:17PM +0200, Eric Auger wrote: > >> We plan to build the tpm2 table on ARM too. In order to reuse the > >> generation code, let's move build_tpm2() to aml-build

Re: [PATCH v3 07/16] target/arm: Create gen_gvec_{mla,mls}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Provide a functional interface for the vector expansion. > This fits better with the existing set of helpers that > we provide for other operations. > > Signed-off-by: Richard Henderson > --- Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v3 08/16] target/arm: Swap argument order for VSHL during decode

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Rather than perform the argument swap during code generation, > perform it during decode. This means it doesn't have to be > special cased later, and we can share code with aarch64 code > generation. Hopefully the decode comment addresses

Re: [PATCH v2 1/5] qemu-img: remove check that cvtnum value > MAX_INT

2020-05-12 Thread Eric Blake
On 5/12/20 4:39 AM, Eyal Moscovici wrote: +++ b/qemu-img.c @@ -4307,7 +4307,7 @@ static int img_bench(int argc, char **argv)               int64_t sval;                 sval = cvtnum(optarg); -            if (sval < 0 || sval > INT_MAX) { +         

Re: [PATCH v2 1/3] acpi: Move build_tpm2() in the generic part

2020-05-12 Thread Igor Mammedov
On Wed, 6 May 2020 05:58:25 -0400 "Michael S. Tsirkin" wrote: > On Wed, May 06, 2020 at 08:33:14AM +0200, Andrew Jones wrote: > > I realize this function is just getting moved, but maybe it should get > > converted to the build_append* API while being moved? > > I'd rather refactoring was done

Re: [PATCH v3 09/16] target/arm: Create gen_gvec_{cmtst,ushl,sshl}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Provide a functional interface for the vector expansion. > This fits better with the existing set of helpers that > we provide for other operations. > > Signed-off-by: Richard Henderson > --- Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v3 10/16] target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Provide a functional interface for the vector expansion. > This fits better with the existing set of helpers that > we provide for other operations. > > Signed-off-by: Richard Henderson > -- Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v3 11/16] target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > These operations do not touch fp_status. > > Signed-off-by: Richard Henderson > --- > diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c > index 930d6e747f..a792661166 100644 > --- a/target/arm/vfp_helper.c > +++ b/target/arm/

Re: [PATCH RESEND v6 21/36] multi-process: PCI BAR read/write handling for proxy & remote endpoints

2020-05-12 Thread Stefan Hajnoczi
On Wed, Apr 22, 2020 at 09:13:56PM -0700, elena.ufimts...@oracle.com wrote: > +uint64_t proxy_default_bar_read(void *opaque, hwaddr addr, unsigned size) > +{ > +ProxyMemoryRegion *pmr = opaque; > +uint64_t val; > + > +send_bar_access_msg(pmr->dev, &pmr->mr, false, addr, &val, size, > +

Re: [PATCH v3 12/16] target/arm: Create gen_gvec_{qrdmla,qrdmls}

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Provide a functional interface for the vector expansion. > This fits better with the existing set of helpers that > we provide for other operations. > > Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v2 1/2] net: Drop the legacy "name" parameter from the -net option

2020-05-12 Thread Eric Blake
On 5/12/20 7:31 AM, Thomas Huth wrote: It's been deprecated since QEMU v3.1, so it's time to finally remove it. The "id" parameter can simply be used instead. Reviewed-by: Eric Blake Signed-off-by: Thomas Huth --- docs/system/deprecated.rst | 15 +-- net/net.c |

Re: [PATCH v2 2/3] arm/acpi: TPM2 ACPI table support

2020-05-12 Thread Igor Mammedov
On Tue, 5 May 2020 16:44:18 +0200 Eric Auger wrote: > Add a TPM2 ACPI table if a TPM2.0 sysbus device has been > dynamically instantiated. > > Signed-off-by: Eric Auger on x86 we also do: fw_cfg_add_file(x86ms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables

Re: [PATCH v3 13/16] target/arm: Pass pointer to qc to qrdmla/qrdmls

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Pass a pointer directly to env->vfp.qc[0], rather than env. > This will allow SVE2, which does not modify QC, to pass a > pointer to dummy storage. > > Signed-off-by: Richard Henderson > --- > /* Signed saturating rounding doubling multi

Re: [PATCH v3 14/16] target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_*

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Must clear the tail for AdvSIMD when SVE is enabled. > > Fixes: ca40a6e6e39 > Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Is it worth adding a "Cc: qemu-sta...@nongnu.org" ? thanks -- PMM

Re: [PATCH v2 2/2] net: Drop the NetLegacy structure, always use Netdev instead

2020-05-12 Thread Eric Blake
On 5/12/20 7:31 AM, Thomas Huth wrote: Now that the "name" parameter is gone, there is hardly any difference between NetLegacy and Netdev anymore. Drop NetLegacy and always use Netdev to simplify the code quite a bit. Signed-off-by: Thomas Huth --- +++ b/net/net.c @@ -967,13 +967,14 @@ stati

[PATCH v1 0/1] target/microblaze: Fix mfs from EDR

2020-05-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" We're missing mfs from EDR support, this adds it. Showed up in Xilinx Versal PLM code. Cheers, Edgar Tong Ho (1): target/microblaze: Add MFS Rd,EDR translation target/microblaze/translate.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1

[PATCH v1 1/1] target/microblaze: Add MFS Rd,EDR translation

2020-05-12 Thread Edgar E. Iglesias
From: Tong Ho This is to fix cpu-abort with 'qemu: fatal: unknown mfs reg d' (in the default case) when microblaze guest issues 'MFS Rd,EDR' instruction. Since embeddedsw release 2019.2, XPlm_ExceptionHandler() issues the instruction on exception, and microblaze model aborts when PLM firmware gu

Re: [PATCH v3 15/16] target/arm: Vectorize SABD/UABD

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Include 64-bit element size in preparation for SVE2. > > Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH v3 16/16] target/arm: Vectorize SABA/UABA

2020-05-12 Thread Peter Maydell
On Fri, 8 May 2020 at 16:22, Richard Henderson wrote: > > Include 64-bit element size in preparation for SVE2. > > Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell thanks -- PMM

[RFC PATCH 0/3] block: Synchronous bdrv_*() from coroutine in different AioContext

2020-05-12 Thread Kevin Wolf
Stefan (Reiter), after looking a bit closer at this, I think there is no bug in QEMU, but the bug is in your coroutine code that calls block layer functions without moving into the right AioContext first. I've written this series anyway as it potentially makes the life of callers easier and would p

[RFC PATCH 2/3] block: Allow bdrv_run_co() from different AioContext

2020-05-12 Thread Kevin Wolf
Coroutine functions that are entered through bdrv_run_co() are already safe to call from synchronous code in a different AioContext because bdrv_coroutine_enter() will schedule them in the context of the node. However, the coroutine fastpath still requires that we're already in the right AioContex

[RFC PATCH 3/3] block: Assert we're running in the right thread

2020-05-12 Thread Kevin Wolf
tracked_request_begin() is called for most I/O operations, so it's a good place to assert that we're indeed running in the home thread of the node's AioContext. Signed-off-by: Kevin Wolf --- block/io.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/block/io.c b/block/io.

[RFC PATCH 1/3] block: Factor out bdrv_run_co()

2020-05-12 Thread Kevin Wolf
We have a few bdrv_*() functions that can either spawn a new coroutine and wait for it with BDRV_POLL_WHILE() or use a fastpath if they are alreeady running in a coroutine. All of them duplicate basically the same code. Factor the common code into a new function bdrv_run_co(). Signed-off-by: Kevi

Re: [PATCH v1 4/8] s390/sclp: read sccb from mem based on sccb length

2020-05-12 Thread Collin Walling
On 5/12/20 3:26 AM, David Hildenbrand wrote: On 09.05.20 01:08, Collin Walling wrote: The header of the SCCB contains the actual length of the SCCB. Instead of using a static 4K size, let's allow for a variable size determined by the value set in the header. The proper checks are already in plac

Re: [PATCH v2 1/2] net: Drop the legacy "name" parameter from the -net option

2020-05-12 Thread Thomas Huth
On 12/05/2020 16.26, Eric Blake wrote: > On 5/12/20 7:31 AM, Thomas Huth wrote: >> It's been deprecated since QEMU v3.1, so it's time to finally >> remove it. The "id" parameter can simply be used instead. >> >> Reviewed-by: Eric Blake >> Signed-off-by: Thomas Huth >> --- >>   docs/system/depreca

[PATCH v3 05/15] block: Include filters when freezing backing chain

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz In order to make filters work in backing chains, the associated functions must be able to deal with them and freeze all filter links, be they COW or R/W filter links. In the process, rename these functions to reflect that they now act on generalized chains of filter nodes instead

[PATCH v3 00/15] Apply COR-filter to the block-stream permanently

2020-05-12 Thread Andrey Shinkevich
With this series, all the block-stream COR operations pass through the COR-filter. The patches 01-08/15 are taken from the series "block: Deal with filters" by Max Reitz, the full version of that can be found in the branches: https://git.xanclic.moe/XanClic/qemu child-access-functions-v6

[PATCH v3 11/15] copy-on-read: Support preadv/pwritev_part functions

2020-05-12 Thread Andrey Shinkevich
Add support for the recently introduced functions bdrv_co_preadv_part() and bdrv_co_pwritev_part() to the COR-filter driver. Signed-off-by: Andrey Shinkevich --- block/copy-on-read.c | 28 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/block/copy-on-

[PATCH v3 02/15] copy-on-read: Support compressed writes

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz Signed-off-by: Max Reitz Reviewed-by: Vladimir Sementsov-Ogievskiy --- block/copy-on-read.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/block/copy-on-read.c b/block/copy-on-read.c index 242d3ff..c4fa468 100644 --- a/block/copy-on-read.c +++ b/block/copy-on-

[PATCH v3 04/15] block: Add chain helper functions

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz Add some helper functions for skipping filters in a chain of block nodes. Signed-off-by: Max Reitz Reviewed-by: Vladimir Sementsov-Ogievskiy --- block.c | 55 +++ include/block/block_int.h | 3 +++ 2 files changed,

[PATCH v3 12/15] copy-on-read: add filter append/drop functions

2020-05-12 Thread Andrey Shinkevich
Provide API for the COR-filter insertion/removal. Also, drop the filter child permissions for an inactive state when the filter node is being removed. Signed-off-by: Andrey Shinkevich --- block/copy-on-read.c | 98 1 file changed, 98 insertion

[PATCH v3 08/15] block: Use CAFs when working with backing chains

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz Use child access functions when iterating through backing chains so filters do not break the chain. Signed-off-by: Max Reitz --- block.c | 40 1 file changed, 28 insertions(+), 12 deletions(-) diff --git a/block.c b/block.c index 459412

[PATCH v3 15/15] block: apply COR-filter to block-stream jobs

2020-05-12 Thread Andrey Shinkevich
The patch completes the series with the COR-filter insertion to any block-stream operation. It also makes changes to the iotests 030 and 141.out. Signed-off-by: Andrey Shinkevich --- block/stream.c | 83 -- tests/qemu-iotests/030 | 8 +

[PATCH v3 03/15] block: Add child access functions

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz There are BDS children that the general block layer code can access, namely bs->file and bs->backing. Since the introduction of filters and external data files, their meaning is not quite clear. bs->backing can be a COW source, or it can be an R/W-filtered child; bs->file can be

[PATCH v3 07/15] commit: Deal with filters when blocking intermediate nodes

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz This includes some permission limiting (for example, we only need to take the RESIZE permission if the base is smaller than the top). Signed-off-by: Max Reitz Signed-off-by: Andrey Shinkevich --- block/commit.c | 75 ++ 1

[PATCH v3 13/15] qapi: add filter-node-name to block-stream

2020-05-12 Thread Andrey Shinkevich
Provide the possibility to pass the 'filter-node-name' parameter to the block-stream job as it is done for the commit block job. That will be needed for further iotests implementations. Signed-off-by: Andrey Shinkevich --- block/monitor/block-hmp-cmds.c | 4 ++-- block/stream.c |

[PATCH v3 09/15] block: prepare block-stream for using COR-filter

2020-05-12 Thread Andrey Shinkevich
This patch is the first one in the series where the COR-filter node will be hard-coded for using in the block-stream job. The block jobs may be run in parallel. Exclude conflicts with filter nodes used for a concurrent job while checking for the blocked operations. It incurs changes in the iotests

[PATCH v3 10/15] copy-on-read: Support change filename functions

2020-05-12 Thread Andrey Shinkevich
The COR-filter driver should support a redirecting function to refresh filenames. Otherwise, a file name of the filter will be copied instead of the one of a data node. It is also true for the function bdrv_change_backing_file(). Signed-off-by: Andrey Shinkevich --- block/copy-on-read.c | 18 +++

Re: [PATCH] hw: Use QEMU_IS_ALIGNED() on parallel flash block size

2020-05-12 Thread Alistair Francis
On Mon, May 11, 2020 at 1:54 PM Philippe Mathieu-Daudé wrote: > > Use the QEMU_IS_ALIGNED() macro to verify the flash block size > is properly aligned. It is quicker to process when reviewing. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/arm/sbs

[PATCH v3 01/15] block: Mark commit and mirror as filter drivers

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz The commit and mirror block nodes are filters, so they should be marked as such. (Strictly speaking, BDS.is_filter's documentation states that a filter's child must be bs->file. The following patch will relax this restriction, however.) Signed-off-by: Max Reitz Reviewed-by: Al

[PATCH v3 14/15] iotests: prepare 245 for using filter in block-stream

2020-05-12 Thread Andrey Shinkevich
The preliminary patch modifies the test 245 to prepare the block-stream job for using COR-filter. The filter breaks the backing chain being connected to the underlying node by file child link. Signed-off-by: Andrey Shinkevich --- tests/qemu-iotests/245 | 10 +++--- 1 file changed, 7 insertio

Re: [PATCH v2 3/3] arm/acpi: Add the TPM2.0 device under the DSDT

2020-05-12 Thread Igor Mammedov
On Tue, 5 May 2020 16:44:19 +0200 Eric Auger wrote: > In case it is dynamically instantiated, add the TPM 2.0 device object > under the DSDT table in the ACPI namespace. Its HID is MSFT0101 > while its current resource settings (CRS) property is initialized > with the guest physical address and

[PATCH v3 06/15] block: Use CAFs in block status functions

2020-05-12 Thread Andrey Shinkevich
From: Max Reitz Use the child access functions in the block status inquiry functions as appropriate. Signed-off-by: Max Reitz Reviewed-by: Vladimir Sementsov-Ogievskiy --- block/io.c | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/block/io.c b/block/io

Re: [PATCH v2 1/4] iotests/109: Don't mirror with mismatched size

2020-05-12 Thread Vladimir Sementsov-Ogievskiy
11.05.2020 16:58, Kevin Wolf wrote: This patch makes the raw image the same size as the file in a different format that is mirrored as raw to it to avoid errors when mirror starts to enforce that source and target are the same size. We check only that the first 512 bytes are zeroed (instead of 6

[PATCH v5 05/12] net: cadence_gem: Set ISR according to queue in use

2020-05-12 Thread Sai Pavan Boddu
Set ISR according to queue in use, added interrupt support for all queues. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 27 +-- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/caden

Re: [PATCH v1 3/8] s390/sclp: rework sclp boundary and length checks

2020-05-12 Thread Collin Walling
On 5/12/20 3:21 AM, David Hildenbrand wrote: On 09.05.20 01:08, Collin Walling wrote: Let's factor out the SCLP boundary and length checks into separate functions. Signed-off-by: Collin Walling --- hw/s390x/sclp.c | 41 +++-- 1 file changed, 35 insertions

Re: [PATCH v2 1/3] acpi: Move build_tpm2() in the generic part

2020-05-12 Thread Auger Eric
Hi Igor, On 5/12/20 4:10 PM, Igor Mammedov wrote: > On Wed, 6 May 2020 11:50:09 +0200 > Auger Eric wrote: > >> Hi, >> >> On 5/6/20 8:33 AM, Andrew Jones wrote: >>> On Tue, May 05, 2020 at 04:44:17PM +0200, Eric Auger wrote: We plan to build the tpm2 table on ARM too. In order to reuse the

[PATCH v5 04/12] net: cadence_gem: Define access permission for interrupt registers

2020-05-12 Thread Sai Pavan Boddu
Q1 to Q7 ISR's are clear-on-read, IER/IDR registers are write-only, mask reg are read-only. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c inde

Re: [PATCH] travis.yml: Improve the --disable-tcg test on s390x

2020-05-12 Thread Cornelia Huck
On Tue, 12 May 2020 15:38:49 +0200 Thomas Huth wrote: > Since the s390x containers do not allow KVM, we only compile-test > the --disable-tcg build on s390x and do not run the qtests. Thus, > it does not make sense to install genisoimage here, and it also does > not make sense to build the s390-c

Re: [PATCH v1 5/5] i386: Hyper-V VMBus ACPI DSDT entry

2020-05-12 Thread Jon Doron
On 12/05/2020, Roman Kagan wrote: On Thu, Apr 09, 2020 at 06:35:18AM +0300, Jon Doron wrote: On 08/04/2020, Roman Kagan wrote: > On Wed, Apr 08, 2020 at 07:16:39AM +0300, Jon Doron wrote: > > Well I have implemented the hyperv synthetic kernel debugger interface, but > > on Windows 10 it require

[PATCH v5 12/12] net: cadence_gem: Fix RX address filtering

2020-05-12 Thread Sai Pavan Boddu
From: Tong Ho Two defects are fixed: 1/ Detection of multicast frames 2/ Treating drop of mis-addressed frames as non-error Signed-off-by: Tong Ho Signed-off-by: Edgar E. Iglesias Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 26 +++---

[PATCH v5 07/12] net: cadence_gem: Fix up code style

2020-05-12 Thread Sai Pavan Boddu
Fix the code style for register definitions. Signed-off-by: Sai Pavan Boddu --- hw/net/cadence_gem.c | 204 ++- 1 file changed, 103 insertions(+), 101 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 11e36d0..f6ff27c 100

[PATCH v5 11/12] net: cadence_gem: TX_LAST bit should be set by guest

2020-05-12 Thread Sai Pavan Boddu
TX_LAST bit should not be set by hardware, its set by guest to inform the last bd of the frame. Signed-off-by: Sai Pavan Boddu Signed-off-by: Edgar E. Iglesias Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/hw/net/cadence_gem.c

[PATCH v5 03/12] net: cadence_gem: Fix irq update w.r.t queue

2020-05-12 Thread Sai Pavan Boddu
Set irq's specific to a queue, present implementation is setting q1 irq based on q0 status. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/net/cadence_gem.c | 25 +++-- 1 file changed, 3 insertions(+), 22 deletions(-) diff --git a/hw/net/cadence_gem.c

Re: [PATCH v1 5/5] i386: Hyper-V VMBus ACPI DSDT entry

2020-05-12 Thread Jon Doron
On 12/05/2020, Jon Doron wrote: On 12/05/2020, Roman Kagan wrote: On Thu, Apr 09, 2020 at 06:35:18AM +0300, Jon Doron wrote: On 08/04/2020, Roman Kagan wrote: On Wed, Apr 08, 2020 at 07:16:39AM +0300, Jon Doron wrote: > Well I have implemented the hyperv synthetic kernel debugger interface, bu

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