The TCG helpers where added in b92e5a22ec3 in softmmu_template.h.
probe_write() was added in there in 3b4afc9e75a to be moved out
to accel/tcg/cputlb.c in 3b08f0a9254, and was later refactored
as probe_access() in c25c283df0f.
Since it is a TCG specific helper, add a stub to avoid failures
when bui
On 4/21/20 3:19 PM, Philippe Mathieu-Daudé wrote:
From: Thomas Huth
Move the common set_feature() and unset_feature() functions
from cpu.c and cpu64.c to cpu.h.
Suggested-by: Peter Maydell
Signed-off-by: Thomas Huth
Reviewed-by: Richard Henderson
Reviewed-by: Eric Auger
Message-ID: <201909
> -Original Message-
> From: Lukas Straub
> Sent: Wednesday, April 22, 2020 5:40 PM
> To: Zhang, Chen
> Cc: qemu-devel ; Li Zhijian
> ; Jason Wang ; Marc-
> André Lureau ; Paolo Bonzini
>
> Subject: Re: [PATCH 1/3] net/colo-compare.c: Create event_bh with the right
> AioContext
>
> On
Hi Jason,
Please review this series when you free.
Thanks
Zhang Chen
> -Original Message-
> From: Zhang, Chen
> Sent: Saturday, April 11, 2020 11:38 AM
> To: Jason Wang ; qemu-dev de...@nongnu.org>
> Cc: Zhang Chen ; Zhang, Chen
>
> Subject: [PATCH 0/2] net/colo-compare.c: Expose "max
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.c | 8 +++-
target/arm/cpu64.c | 8 +++-
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 47e35400da..30e961
Under KVM these registers are written by the hardware.
Restrict the writefn handlers to TCG to avoid when building
without TCG:
LINKaarch64-softmmu/qemu-system-aarch64
target/arm/helper.o: In function `do_ats_write':
target/arm/helper.c:3524: undefined reference to `raise_excepti
These are the uncontroversial patches from "Support disabling
TCG on ARM (part 2)"
https://www.mail-archive.com/qemu-devel@nongnu.org/msg689168.html
The other patches are blocked by the "accel: Allow targets to
use Kconfig" series:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg689024.html
From: Thomas Huth
Make cpu_register() (renamed to arm_cpu_register()) available
from internals.h so we can register CPUs also from other files
in the future.
Signed-off-by: Thomas Huth
Reviewed-by: Richard Henderson
Reviewed-by: Eric Auger
Message-ID: <20190921150420.30743-2-th...@redhat.com>
A KVM-only build won't be able to run TCG cpus.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.c | 634 -
target/arm/cpu_tcg.c | 664 +++
target/arm/Makefile.objs | 1 +
We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
On 23.04.20 09:10, Philippe Mathieu-Daudé wrote:
> The TCG helpers where added in b92e5a22ec3 in softmmu_template.h.
> probe_write() was added in there in 3b4afc9e75a to be moved out
> to accel/tcg/cputlb.c in 3b08f0a9254, and was later refactored
> as probe_access() in c25c283df0f.
> Since it is a
On 3/16/20 7:30 PM, Richard Henderson wrote:
On 3/16/20 5:00 AM, Philippe Mathieu-Daudé wrote:
The KVM files has been moved from target-ARCH to the target/ARCH/
folder in commit fcf5ef2a. Fix the pathname expansion.
Fixes: fcf5ef2a ("Move target-* CPU file into a target/ folder")
Signed-off-by:
On Thu, Apr 23, 2020 at 9:49 AM David Hildenbrand wrote:
>
> On 23.04.20 09:10, Philippe Mathieu-Daudé wrote:
> > The TCG helpers where added in b92e5a22ec3 in softmmu_template.h.
> > probe_write() was added in there in 3b4afc9e75a to be moved out
> > to accel/tcg/cputlb.c in 3b08f0a9254, and was
On 23.04.20 09:59, Philippe Mathieu-Daudé wrote:
> On Thu, Apr 23, 2020 at 9:49 AM David Hildenbrand wrote:
>>
>> On 23.04.20 09:10, Philippe Mathieu-Daudé wrote:
>>> The TCG helpers where added in b92e5a22ec3 in softmmu_template.h.
>>> probe_write() was added in there in 3b4afc9e75a to be moved o
On 22.04.20 20:21, Alexander Duyck wrote:
> From: Alexander Duyck
>
> We need to make certain to advertise support for page poison tracking if
> we want to actually get data on if the guest will be poisoning pages.
>
> Add a value for tracking the poison value being used if page poisoning is
> e
On 23/04/20 10:04, David Hildenbrand wrote:
>> I can only recommend you to read the thread after this previous patch,
>> as I don't have the knowledge to explain...:
>> https://www.mail-archive.com/qemu-devel@nongnu.org/msg689115.html
> Yeah, me neither. Sounds wrong to me to have TCG-only code sti
Philippe Mathieu-Daudé wrote:
> The KVM files has been moved from target-ARCH to the target/ARCH/
> folder in commit fcf5ef2a. Fix the pathname expansion.
>
> Fixes: fcf5ef2a ("Move target-* CPU file into a target/ folder")
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Juan Quintela
Philippe Mathieu-Daudé writes:
> On 4/22/20 5:17 PM, Markus Armbruster wrote:
>> Philippe Mathieu-Daudé writes:
>>
>>> On 4/22/20 3:07 PM, Markus Armbruster wrote:
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an ar
On 3/16/20 5:06 PM, Philippe Mathieu-Daudé wrote:
KVM requires a cpu based on (at least) the ARMv7 architecture.
Only enable the following ARMv4 CPUs when TCG is available:
- StrongARM (SA1100/1110)
- OMAP1510 (TI925T)
I missed to explain, the point of this Kconfig granularity is on a
On 2020/4/23 下午3:31, Zhang, Chen wrote:
Hi Jason,
Please review this series when you free.
Thanks
Zhang Chen
Sure.
I wonder maybe it's better e.g you can review and collect the patches
that looks good and send them to me periodically?
Thanks
> -Original Message-
> From: Jason Wang
> Sent: Thursday, April 23, 2020 4:54 PM
> To: Zhang, Chen ; qemu-dev de...@nongnu.org>
> Cc: Zhang Chen
> Subject: Re: [PATCH 0/2] net/colo-compare.c: Expose "max_queue_size" to
> users and clean up
>
>
> On 2020/4/23 下午3:31, Zhang, Chen wrote
Adding Eric & Markus for QAPI modelling questions
On Thu, Apr 23, 2020 at 11:56:40AM +0800, xiaoqiang zhao wrote:
> unix_connect_saddr now support abstract address type
>
> By default qemu does not support abstract UNIX domain
> socket address. Add this ability to make qemu handy
> when abstract
On 4/22/20 9:58 PM, Aleksandar Markovic wrote:
> сре, 22. апр 2020. у 03:27 Richard Henderson
> је написао/ла:
>>
>> The temp_fixed, temp_global, temp_local bits are all related.
>> Combine them into a single enumeration.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> include/tcg/tcg.h | 20 +
Make the PL061 GPIO controller user-creatable, and allow the user to tie
a newly created instance to a gpiochip on the host.
To create a new GPIO controller, the QEMU command line must be augmented
with:
-device pl061,host=
with the name or label of the gpiochip on the host.
Signed-off-by:
Add a GPIO controller backend, to connect virtual GPIOs on the guest to
physical GPIOs on the host. This allows the guest to control any
external device connected to the physical GPIOs.
Features and limitations:
- The backend uses libgpiod on Linux,
- For now only GPIO outputs are supported,
Hi all,
This patch series adds a GPIO controller backend, to connect virtual
GPIOs on the guest to physical GPIOs on the host, and enables support
for this using user-creatable PL061 GPIO controller instances. This
allows the guest to control any external device connected to the
physical
Move the definition of TYPE_PL061 to a new header file, so it can be
used outside the driver.
Signed-off-by: Geert Uytterhoeven
---
v2:
- New.
---
MAINTAINERS | 1 +
hw/gpio/pl061.c | 2 +-
include/hw/gpio/pl061.h | 16
3 files changed, 18 insertions(+),
Add support for dynamically instantiating PL061 GPIO controller
instances in ARM virt. Device tree nodes are created dynamically.
Signed-off-by: Geert Uytterhoeven
---
v2:
- New.
---
hw/arm/sysbus-fdt.c | 18 ++
hw/arm/virt.c | 1 +
2 files changed, 19 insertions(+)
di
Move the code to create the DT node for the PL061 GPIO controller from
hw/arm/virt.c to the PL061 driver, so it can be reused.
While at it, make the created node comply with the PL061 Device Tree
bindings:
- Use generic node name "gpio" instead of "pl061",
- Add missing "#interrupt-cells" and
On 2020/4/23 下午4:59, Zhang, Chen wrote:
-Original Message-
From: Jason Wang
Sent: Thursday, April 23, 2020 4:54 PM
To: Zhang, Chen ; qemu-dev
Cc: Zhang Chen
Subject: Re: [PATCH 0/2] net/colo-compare.c: Expose "max_queue_size" to
users and clean up
On 2020/4/23 下午3:31, Zhang, Chen
Richard Henderson writes:
> These interfaces have been replaced by tcg_gen_dupi_vec
> and tcg_constant_vec.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> include/tcg/tcg-op.h | 4
> tcg/tcg-op-vec.c | 20
> 2 files changed, 24 deletion
Patchew URL:
https://patchew.org/QEMU/20200423090118.11199-1-geert+rene...@glider.be/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
> Move the definition of TYPE_PL061 to a new header file, so it can be
> used outside the driver.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> v2:
> - New.
> ---
> MAINTAINERS | 1 +
> hw/gpio/pl061.c | 2 +-
> include/hw/gp
On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
> Move the code to create the DT node for the PL061 GPIO controller from
> hw/arm/virt.c to the PL061 driver, so it can be reused.
>
> While at it, make the created node comply with the PL061 Device Tree
> bindings:
> - Use generic node name "gpio"
On 23/04/20 11:13, Philippe Mathieu-Daudé wrote:
>> Let's then:
>>
>> 1) allow multiply-defined variables (just remove the "if" from
>> do_declaration)
> Apparently not needed with 2)
Since "config SEMIHOSTING" is in hw/semihosting/Kconfig, it should be
needed no?
>> 2) do
>>
>> config SEMIHOSTIN
On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
> Add a GPIO controller backend, to connect virtual GPIOs on the guest to
> physical GPIOs on the host. This allows the guest to control any
> external device connected to the physical GPIOs.
>
> Features and limitations:
> - The backend uses libgp
On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
> Make the PL061 GPIO controller user-creatable, and allow the user to tie
> a newly created instance to a gpiochip on the host.
>
> To create a new GPIO controller, the QEMU command line must be augmented
> with:
>
> -device pl061,host=
>
> wit
Patchew URL:
https://patchew.org/QEMU/20200423090118.11199-1-geert+rene...@glider.be/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
Richard Henderson writes:
> We have this same parameter for GVecGen2i, GVecGen3,
> and GVecGen3i. This will make some SVE2 insns easier
> to parameterize.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> include/tcg/tcg-op-gvec.h | 2 ++
> tcg/tcg-op-gvec.c |
Richard Henderson writes:
> For the benefit of compatibility of function pointer types,
> we have standardized on int32_t and int64_t as the integral
> argument to tcg expanders.
>
> We converted most of them in 474b2e8f0f7, but missed the rotates.
>
> Signed-off-by: Richard Henderson
Reviewe
Patchew URL:
https://patchew.org/QEMU/20200423090118.11199-1-geert+rene...@glider.be/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN
Hi Philippe,
Thanks for your comments!
On Thu, Apr 23, 2020 at 11:28 AM Philippe Mathieu-Daudé wrote:
> On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
> > Add a GPIO controller backend, to connect virtual GPIOs on the guest to
> > physical GPIOs on the host. This allows the guest to control any
On 22.04.20 17:21, Kevin Wolf wrote:
> This adds a new BdrvRequestFlags parameter to the .bdrv_co_truncate()
> driver callbacks, and a supported_truncate_flags field in
> BlockDriverState that allows drivers to advertise support for request
> flags in the context of truncate.
>
> For now, we alway
On 23/04/20 10:43, Philippe Mathieu-Daudé wrote:
>>
>> You can add CONFIG_SEMIHOSTING=y directly in the Kconfig file.
>
> I didn't know because it is not documented and no examples, but I the
> code is here:
>
> # assignment_var: ID (starting with "CONFIG_")
> def parse_assignment_var(sel
On 22.04.20 17:21, Kevin Wolf wrote:
> Now that block drivers can support flags for .bdrv_co_truncate, expose
> the parameter in the node level interfaces bdrv_co_truncate() and
> bdrv_truncate().
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Vladimir Sementsov-Ogievskiy
> Reviewed-by: Alberto Ga
On 4/23/20 11:41 AM, Geert Uytterhoeven wrote:
> Hi Philippe,
>
> Thanks for your comments!
>
> On Thu, Apr 23, 2020 at 11:28 AM Philippe Mathieu-Daudé
> wrote:
>> On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
>>> Add a GPIO controller backend, to connect virtual GPIOs on the guest to
>>> phys
On 4/23/20 11:33 AM, Philippe Mathieu-Daudé wrote:
> On 4/23/20 11:01 AM, Geert Uytterhoeven wrote:
>> Make the PL061 GPIO controller user-creatable, and allow the user to tie
>> a newly created instance to a gpiochip on the host.
>>
>> To create a new GPIO controller, the QEMU command line must be
On 22.04.20 17:21, Kevin Wolf wrote:
> Now that node level interface bdrv_truncate() supports passing request
> flags to the block driver, expose this on the BlockBackend level, too.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Vladimir Sementsov-Ogievskiy
> Reviewed-by: Alberto Garcia
> ---
>
Hi
On Thu, Apr 23, 2020 at 4:48 AM xiaoqiang zhao wrote:
>
> unix_connect_saddr now support abstract address type
>
> By default qemu does not support abstract UNIX domain
> socket address. Add this ability to make qemu handy
> when abstract address is needed.
> Abstract address is marked by pref
On Thu, Apr 23, 2020 at 11:20 AM wrote:
> this requires the user of the application to install qemu first right?
> If this is the case then this is unfortunately not an option. The user shall
> not be bothered with installing anything else then the tool.
Hi Janine,
Please use Reply-All to keep th
List the name of the helper targets when calling 'make help',
along with the tool targets:
$ make help
[...]
Helper targets:
fsdev/virtfs-proxy-helper - Build virtfs-proxy-helper
scsi/qemu-pr-helper- Build qemu-pr-helper
qemu-bridge-helper - Build qe
在 2020/4/23 下午5:00, Daniel P. Berrangé 写道:
Adding Eric & Markus for QAPI modelling questions
On Thu, Apr 23, 2020 at 11:56:40AM +0800, xiaoqiang zhao wrote:
unix_connect_saddr now support abstract address type
By default qemu does not support abstract UNIX domain
socket address. Add this abili
On 22.04.20 17:21, Kevin Wolf wrote:
> If BDRV_REQ_ZERO_WRITE is set and we're extending the image, calling
> qcow2_cluster_zeroize() with flags=0 does the right thing: It doesn't
> undo any previous preallocation, but just adds the zero flag to all
> relevant L2 entries. If an external data file i
On 22.04.20 17:21, Kevin Wolf wrote:
> The raw format driver can simply forward the flag and let its bs->file
> child take care of actually providing the zeros.
>
> Signed-off-by: Kevin Wolf
> ---
> block/raw-format.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Max R
Hy again,
okay so now we have an easy way out just in case.
But I still want to build an DLL and/or a shared library for integration into
the tool. I want the tool to be platform independent and I was already able to
build qemu-img as cross build with mingw64. Does anybody have experience in
bu
On 22.04.20 17:21, Kevin Wolf wrote:
> For regular files, we always get BDRV_REQ_ZERO_WRITE behaviour from the
> OS, so we can advertise the flag and just ignore it.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Vladimir Sementsov-Ogievskiy
> Reviewed-by: Alberto Garcia
> ---
> block/file-posix
On Thu, Apr 23, 2020 at 12:53:48PM +0200, janine.schnei...@fau.de wrote:
> Hy again,
>
> okay so now we have an easy way out just in case.
> But I still want to build an DLL and/or a shared library for integration
> into the tool. I want the tool to be platform independent and I was
> already able
On Wed, 11 Mar 2020 at 04:09, Gavin Shan wrote:
>
> The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is
> disabled when its depth is 1. It's nice to have TxFIFO enabled if
> possible because more characters can be piled and transmitted at once,
> which would have less overhead. B
In aarch64_max_initfn() we update both 32-bit and 64-bit ID
registers. The intended pattern is that for 64-bit ID registers we
use FIELD_DP64 and the uint64_t 't' register, while 32-bit ID
registers use FIELD_DP32 and the uint32_t 'u' register. For
ID_AA64DFR0 we accidentally used 'u', meaning th
On 22.04.20 17:21, Kevin Wolf wrote:
> When extending the size of an image that has a backing file larger than
> its old size, make sure that the backing file data doesn't become
> visible in the guest, but the added area is properly zeroed out.
>
> Consider the following scenario where the overla
On Sun, 19 Apr 2020 at 17:27, Edgar E. Iglesias
wrote:
>
> From: "Edgar E. Iglesias"
>
> Disable unsupported FDT firmware nodes if a user passes us
> a DTB with nodes enabled that the machine cannot support
> due to lack of EL3 or EL2 support.
>
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/arm
On 22.04.20 17:21, Kevin Wolf wrote:
> We want to keep TEST_IMG for the full path of the main test image, but
> filter_testfiles() must be called for other test images before replacing
> other things like the image format because the test directory path could
> contain the format as a substring.
>
On Thu, Apr 23, 2020 at 1:09 PM Peter Maydell wrote:
>
> In aarch64_max_initfn() we update both 32-bit and 64-bit ID
> registers. The intended pattern is that for 64-bit ID registers we
> use FIELD_DP64 and the uint64_t 't' register, while 32-bit ID
> registers use FIELD_DP32 and the uint32_t 'u'
Hi,
> Just a question, why didn't we choose the virtio-vga order to avoid
> shuffling from the beginning? Vga came after and we keep the
> compatibility ?
Well, transitional virtio devices need bar 0 for legacy virtio
compatibility (io bar), so using bar 1 for msix makes sense in that
case.
vi
On Wed, Apr 22, 2020 at 03:07:12PM +0200, Markus Armbruster wrote:
> bochs_display_realize() rejects out-of-range vgamem. The error
> handling is broken:
>
> $ qemu-system-x86_64 -S -display none -monitor stdio
> QEMU 4.2.93 monitor - type 'help' for more information
> (qemu) device_a
On Wed, Apr 22, 2020 at 11:54:54PM +0200, Anthoine Bourgeois wrote:
> With virtio-vga, pci bar are reordered. Bar #2 is used for compatibility
> with stdvga. By default, bar #2 is used by virtio modern io bar.
> This bar is the last one introduce in the virtio pci bar layout and it's
> crushed by t
On Wed, Apr 22, 2020 at 11:54:55PM +0200, Anthoine Bourgeois wrote:
> The modern io bar was never documented.
>
> Signed-off-by: Anthoine Bourgeois
> ---
> hw/virtio/virtio-pci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index 4cb
On Sat, 18 Apr 2020 at 17:28, Richard Henderson
wrote:
>
> These instructions are often used in glibc's string routines.
> They were the final uses of the 32-bit at a time neon helpers.
>
> Signed-off-by: Richard Henderson
Applied to target-arm.next, thanks. Luckily my decodetree
conversion for
Hi,
> - if "linesize" is nonzero, make sure it is a whole multiple of the
> required word size (?)
>
> - if "linesize" is nonzero, make sure it is not bogus with relation to
> "width". I'm thinking something like:
Yep, the whole linesize is a bit bogus, noticed after sending out this
series, I
On Thu, Apr 23, 2020 at 12:21:11PM +0100, Peter Maydell wrote:
> On Sun, 19 Apr 2020 at 17:27, Edgar E. Iglesias
> wrote:
> >
> > From: "Edgar E. Iglesias"
> >
> > Disable unsupported FDT firmware nodes if a user passes us
> > a DTB with nodes enabled that the machine cannot support
> > due to la
On Thu, 23 Apr 2020 at 12:43, Edgar E. Iglesias
wrote:
> Without it, I see the following warning but compat in
> qemu_fdt_node_path should probably be changed to const char *.
> I can make that change in a v2 if you prefer.
Yes, I think that would be better. I can't see any reason
why the compat
On 22.04.20 17:21, Kevin Wolf wrote:
> Signed-off-by: Kevin Wolf
> ---
> tests/qemu-iotests/274 | 157 ++
> tests/qemu-iotests/274.out | 260 +
> tests/qemu-iotests/group | 1 +
> 3 files changed, 418 insertions(+)
> create mode 100
On Mon, 20 Apr 2020 at 13:20, Jerome Forissier wrote:
>
> This patchset creates the DT property /chosen/kaslr-seed which is used
> by the OS for Address Space Layout Randomization. If the machine is
> secure, a similar property is created under /secure-chosen.
>
> Changes since v1:
> - Move creat
From: "Edgar E. Iglesias"
When users try direct Linux runs on the ZynqMP models without enabling
EL3 (and using appropriate FW) they run into trouble because the
upstream kernel device-tree has EL3 based firmware nodes by default.
PSCI firmware nodes work because we emulate the firmware in QEMU.
From: "Edgar E. Iglesias"
Allow name wildcards in qemu_fdt_node_path(). This is useful
to find all nodes with a given compatibility string.
Reviewed-by: Alistair Francis
Signed-off-by: Edgar E. Iglesias
---
device_tree.c| 2 +-
include/sysemu/device_tree.h | 3 +++
2 files cha
From: "Edgar E. Iglesias"
Make compat in qemu_fdt_node_path() const char *.
Signed-off-by: Edgar E. Iglesias
---
device_tree.c| 2 +-
include/sysemu/device_tree.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/device_tree.c b/device_tree.c
index f5b4699a
From: "Edgar E. Iglesias"
Move arm_boot_info into XlnxZCU102.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Edgar E. Iglesias
---
hw/arm/xlnx-zcu102.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index bd645ad818
From: "Edgar E. Iglesias"
Disable unsupported FDT firmware nodes if a user passes us
a DTB with nodes enabled that the machine cannot support
due to lack of EL3 or EL2 support.
Reviewed-by: Alistair Francis
Signed-off-by: Edgar E. Iglesias
---
hw/arm/xlnx-zcu102.c | 30 +++
On Thu, Apr 23, 2020 at 1:09 PM Peter Maydell wrote:
>
> In aarch64_max_initfn() we update both 32-bit and 64-bit ID
> registers. The intended pattern is that for 64-bit ID registers we
> use FIELD_DP64 and the uint64_t 't' register, while 32-bit ID
> registers use FIELD_DP32 and the uint32_t 'u'
Am 23.04.2020 um 11:41 hat Max Reitz geschrieben:
> On 22.04.20 17:21, Kevin Wolf wrote:
> > This adds a new BdrvRequestFlags parameter to the .bdrv_co_truncate()
> > driver callbacks, and a supported_truncate_flags field in
> > BlockDriverState that allows drivers to advertise support for request
MIDR_EL1 is a 32-bit register.
This fixes when compiling with -Werror=conversion:
target/arm/cpu64.c: In function ‘aarch64_max_initfn’:
target/arm/cpu64.c:628:21: error: conversion from ‘uint64_t’ {aka ‘long
unsigned int’} to ‘uint32_t’ {aka ‘unsigned int’} may change value
[-Werror=convers
On Wed, Apr 22, 2020 at 11:54:54PM +0200, Anthoine Bourgeois wrote:
> With virtio-vga, pci bar are reordered. Bar #2 is used for compatibility
> with stdvga. By default, bar #2 is used by virtio modern io bar.
> This bar is the last one introduce in the virtio pci bar layout and it's
> crushed by t
Am 23.04.2020 um 13:14 hat Max Reitz geschrieben:
> On 22.04.20 17:21, Kevin Wolf wrote:
> > When extending the size of an image that has a backing file larger than
> > its old size, make sure that the backing file data doesn't become
> > visible in the guest, but the added area is properly zeroed
On Thu, Apr 23, 2020 at 2:44 PM Philippe Mathieu-Daudé wrote:
>
> MIDR_EL1 is a 32-bit register.
In fact MIDR_EL1 a 64-bit system register with the top 32-bit being RES0.
So the right fix might be to change midr field size, just to be future proof :-)
But if we stick to a 32-bit midr then:
Rev
Am 22.04.2020 um 18:14 hat Eric Blake geschrieben:
> On 4/22/20 10:58 AM, Kevin Wolf wrote:
>
> > > > @@ -4214,6 +4215,35 @@ static int coroutine_fn
> > > > qcow2_co_truncate(BlockDriverState *bs, int64_t offset,
> > > >g_assert_not_reached();
> > > >}
> > > > +if ((flags
Am 23.04.2020 um 12:53 hat Max Reitz geschrieben:
> On 22.04.20 17:21, Kevin Wolf wrote:
> > If BDRV_REQ_ZERO_WRITE is set and we're extending the image, calling
> > qcow2_cluster_zeroize() with flags=0 does the right thing: It doesn't
> > undo any previous preallocation, but just adds the zero fla
Patchew URL: https://patchew.org/QEMU/20200423124305.14718-1-f4...@amsat.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export A
Patchew URL: https://patchew.org/QEMU/20200423124305.14718-1-f4...@amsat.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH] target/arm: Use correct variable for setting 'max' cpu's
MIDR_EL1
Message-id: 20200423124305.14718-1-
Richard Henderson writes:
> No host backend support yet, but the interfaces for rotli
> are in place. Canonicalize immediate rotate to the left,
> based on a survey of architectures, but provide both left
> and right shift interfaces to the translators.
>
> Signed-off-by: Richard Henderson
R
Patchew URL:
https://patchew.org/QEMU/20200423110915.10527-1-peter.mayd...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH] target/arm: Use correct variable for setting 'max' cpu's
ID_AA64DFR0
Message-id: 2020042311
Patchew URL: https://patchew.org/QEMU/20200423124305.14718-1-f4...@amsat.org/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#! /
Patchew URL: https://patchew.org/QEMU/20200423124305.14718-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/
Patchew URL: https://patchew.org/QEMU/20200423124305.14718-1-f4...@amsat.org/
Hi,
This series failed build test on FreeBSD host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that ha
Richard Henderson writes:
> No host backend support yet, but the interfaces for rotlv
> and rotrv are in place.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> No host backend support yet, but the interfaces for rotls
> are in place. Only implement left-rotate for now, as the
> only known use of vector rotate by scalar is s390x, so any
> right-rotate would be unused and untestable.
>
> Signed-off-by: Richard Henderson
Re
Richard Henderson writes:
> For v1, I had split this into 4 logically distinct parts. But
> apparently there are minor interdependencies, because the later
> sets would not apply standalone, says Alex.
>
> Rather than tease them apart, and then have to undo that work
> in order to actually app
Does multi-process support on Windows?
I found it use mmap and unix socket for inter-process communication, that
may not support under Windows.
And also, can the python script be replaced by C implementation?
On Thu, Apr 23, 2020 at 12:38 PM wrote:
> From: Elena Ufimtseva
>
> Signed-off-by: Ele
On 22.04.20 22:53, Eric Blake wrote:
> We originally refused to allow resize of images with internal
> snapshots because the v2 image format did not require the tracking of
> snapshot size, making it impossible to safely revert to a snapshot
> with a different size than the current view of the imag
On 23.04.20 15:25, Kevin Wolf wrote:
> Am 23.04.2020 um 12:53 hat Max Reitz geschrieben:
>> On 22.04.20 17:21, Kevin Wolf wrote:
>>> If BDRV_REQ_ZERO_WRITE is set and we're extending the image, calling
>>> qcow2_cluster_zeroize() with flags=0 does the right thing: It doesn't
>>> undo any previous p
On 4/23/20 8:23 AM, Kevin Wolf wrote:
So qcow2_cluster_zeroize() seems to accept the unaligned tail. It would
still set the zero flag for the partial last cluster and for the
external data file, bdrv_co_pwrite_zeroes() would have the correct size.
Then I'm in favor of NOT rounding the tail.
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