Hi Jean,
On Mon, Mar 16, 2020 at 3:41 PM Jean-Philippe Brucker
wrote:
>
> Hi Bharat,
>
> Could you Cc me on your next posting? Unfortunately I don't have much
> hardware for testing this at the moment, but I might be able to help a
> little on the review.
>
> On Mon, Mar 16, 2020 at 02:40:00PM +
Hi
On Tue, Mar 17, 2020 at 7:40 AM Markus Armbruster wrote:
>
> Marc-André Lureau writes:
>
> > On Sun, Mar 15, 2020 at 3:51 PM Markus Armbruster wrote:
> >>
> >> We convert the request object to a QDict twice: first in
> >> qmp_dispatch() to get the request ID, and then again in
> >> qmp_dispa
Hi Paolo,
For future HAX patch, once it's "Reviewed-by" haxm maintainers and other
reviewers, do we need "SubmitAPullRequest" separately or you will do it
together with other patches?
Colin
On 2020-03-17 05:26, Paolo Bonzini wrote:
From: Colin Xu
HAXM covers below files:
include/sysemu/ha
Le 16/03/2020 à 20:17, Peter Maydell a écrit :
> On Mon, 16 Mar 2020 at 17:43, Laurent Vivier wrote:
>>
>> The following changes since commit 373c7068dd610e97f0b551b5a6d0a27cd6da4506:
>>
>> qemu.nsi: Install Sphinx documentation (2020-03-09 16:45:00 +)
>>
>> are available in the Git reposito
On Tue, Mar 17, 2020 at 8:33 AM Michael S. Tsirkin wrote:
> On Tue, Mar 17, 2020 at 07:48:55AM +0200, Yuri Benditovich wrote:
> >
> >
> > On Tue, Mar 17, 2020 at 1:05 AM Michael S. Tsirkin
> wrote:
> >
> > On Mon, Mar 16, 2020 at 12:09:33PM +0200, Yuri Benditovich wrote:
> > > Save and r
Hi Jason,
No news for a while.
Please review this series when you have time.
Thanks
Zhang Chen
> -Original Message-
> From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of Zhang, Chen
> Sent: Wednesday, March 4, 2020 4:00 PM
> To: Jason Wang ; qemu-dev de...@nongnu.or
On 17/03/20 08:46, Colin Xu wrote:
> Hi Paolo,
>
> For future HAX patch, once it's "Reviewed-by" haxm maintainers and other
> reviewers, do we need "SubmitAPullRequest" separately or you will do it
> together with other patches?
As you prefer. I wouldn't mind having to send fewer pull requests.
Hi Bharat,
On 3/17/20 8:10 AM, Bharat Bhushan wrote:
> Hi Jean,
>
> On Mon, Mar 16, 2020 at 3:41 PM Jean-Philippe Brucker
> wrote:
>>
>> Hi Bharat,
>>
>> Could you Cc me on your next posting? Unfortunately I don't have much
>> hardware for testing this at the moment, but I might be able to help
> -Original Message-
> From: Dr. David Alan Gilbert
> Sent: Friday, March 13, 2020 12:39 AM
> To: Lukas Straub
> Cc: Zhang, Chen ; Daniel Cho
> ; qemu-devel@nongnu.org; Jason Wang
> ; Zhanghailiang
> Subject: Re: The issues about architecture of the COLO checkpoint
>
> * Lukas Straub
Hi Linus,
On Thu, Mar 12, 2020 at 3:23 PM Linus Walleij wrote:
> On Tue, Feb 18, 2020 at 4:18 PM Geert Uytterhoeven
> wrote:
>
> > Currently GPIO controllers can only be referred to by label in GPIO
> > lookup tables.
> >
> > Add support for looking them up by "gpiochipN" name, with "N" the
> >
Hi Linus,
On Thu, Mar 12, 2020 at 3:21 PM Linus Walleij wrote:
> On Tue, Feb 18, 2020 at 4:18 PM Geert Uytterhoeven
> wrote:
> > Currently GPIOs can only be referred to by GPIO controller and offset in
> > GPIO lookup tables.
> >
> > Add support for looking them up by line name.
> > Rename gpiod
On Tue, Mar 17, 2020 at 12:40:39PM +0530, Bharat Bhushan wrote:
> Hi Jean,
>
> On Mon, Mar 16, 2020 at 3:41 PM Jean-Philippe Brucker
> wrote:
> >
> > Hi Bharat,
> >
> > Could you Cc me on your next posting? Unfortunately I don't have much
> > hardware for testing this at the moment, but I might
On 2020-03-17 16:26, Paolo Bonzini wrote:
On 17/03/20 08:46, Colin Xu wrote:
Hi Paolo,
For future HAX patch, once it's "Reviewed-by" haxm maintainers and other
reviewers, do we need "SubmitAPullRequest" separately or you will do it
together with other patches?
As you prefer. I wouldn't mind
On Mon, Mar 16, 2020 at 12:09:27PM +0200, Yuri Benditovich wrote:
> Support for VIRTIO_NET_F_RSS and VIRTIO_NET_F_HASH_REPORT
> features in QEMU for reference purpose.
> Implements Toeplitz hash calculation for incoming
> packets according to configuration provided by driver.
> Uses calculated hash
On 3/16/20 9:16 PM, Richard Henderson wrote:
On 3/16/20 9:06 AM, Philippe Mathieu-Daudé wrote:
+++ b/target/arm/kvm32.c
@@ -22,7 +22,7 @@
#include "internals.h"
#include "qemu/log.h"
-static inline void set_feature(uint64_t *features, int feature)
+static inline void kvm_set_feature(uint
Hi Jean,
On Tue, Mar 17, 2020 at 2:23 PM Jean-Philippe Brucker
wrote:
>
> On Tue, Mar 17, 2020 at 12:40:39PM +0530, Bharat Bhushan wrote:
> > Hi Jean,
> >
> > On Mon, Mar 16, 2020 at 3:41 PM Jean-Philippe Brucker
> > wrote:
> > >
> > > Hi Bharat,
> > >
> > > Could you Cc me on your next posting?
On 3/16/20 9:52 PM, Taylor Simpson wrote:
linux-user/syscall.c handles the case where TARGET_NR_llseek (one underscore)
is defined and TARGET_NR__llseek (two underscores)
/* Newer kernel ports have llseek() instead of _llseek() */
#if defined(TARGET_NR_llseek) && !defined(TARGET_NR__lls
Hello,
I'm testing COLO in qemu-4.2.0 with the commit
https://github.com/qemu/qemu/commit/f51d0b4178738bba87d796eba7444f6cdb3aa0fd.
The qmp of SVM sometimes show the following errors ("guest-reset"
or/and "invalid runstate transition") .
Does any have idea about this?
{"timestamp": {"seconds":
When user_creatable_add_type() fails, qmp_object_add() returns both
its error and the usual empty QDict success value. The QMP core
handles the error, and ignores the success value, leaking it. Exposed
by qmp-cmd-test case /x86_64/qmp/object-add-without-props, and duly
reported both by ASan and v
valgrind reports write unitialized bytes from buf[]. Clear them.
ASan reports we store to misaligned address in buf[]. Use stl_le_p()
for that.
Cc: Sam Eiderman
Cc: John Snow
Signed-off-by: Markus Armbruster
---
tests/qtest/hd-geo-test.c | 6 +++---
1 file changed, 3 insertions(+), 3 deleti
On 3/17/20 10:23 AM, Markus Armbruster wrote:
valgrind reports write unitialized bytes from buf[]. Clear them.
ASan reports we store to misaligned address in buf[]. Use stl_le_p()
for that.
Cc: Sam Eiderman
Cc: John Snow
Signed-off-by: Markus Armbruster
---
tests/qtest/hd-geo-test.c | 6
On Tue, 17 Mar 2020 at 04:59, Cleber Rosa wrote:
> Yes, that did the trick and I can now see the configuration. What I can
> *not* see is any "Specific Runner" configured. So maybe:
>
> 1) The documentation I included is not clear enough about the fact that
> setup steps need to be done on a mac
16.03.2020 11:21, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
On 14.03.2020 00:54, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
13.03.2020 18:42, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
12.03.2020 19:36, Markus Armbruster wrote:
On Tue, Mar 17, 2020 at 10:23 AM Markus Armbruster wrote:
>
> When user_creatable_add_type() fails, qmp_object_add() returns both
> its error and the usual empty QDict success value. The QMP core
> handles the error, and ignores the success value, leaking it. Exposed
> by qmp-cmd-test case /x86_
16.03.2020 17:40, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
03.03.2020 11:01, Markus Armbruster wrote:
Hi Vladimir,
I've come to rather like your ERRP_AUTO_PROPAGATE() idea. What I
wouldn't like is a protracted conversion.
Once we're happy with PATCH 1-3, it's a matter
On 3/16/20 1:45 PM, Igor Mammedov wrote:
On Mon, 16 Mar 2020 01:03:45 +0100
Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Igor Mammedov
---
qapi/machine.json | 20
qapi/misc.json| 21 -
hw/acpi/vmgenid.c | 2
Peter Maydell writes:
> On Mon, 16 Mar 2020 at 18:22, Alex Bennée wrote:
>>
>> This is useful, especially when testing relatively new gdbstub
>> features that might not be in distro packages yet.
>>
>> Signed-off-by: Alex Bennée
>> Reviewed-by: Richard Henderson
>> ---
>> configure | 9
On 3/16/20 6:21 PM, Alex Bennée wrote:
This is cleaner than poking memory directly and will make later
clean-ups easier.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Laurent Vivier
---
v3
- fix mem_buf references
- fix mem_buf + len cases
---
target/m68k/hel
From: Jason Andryuk
A FTDI USB adapter on an xHCI controller can send 512 byte USB packets.
These are 8 * ( 2 bytes header + 62 bytes data). A 384 byte receive
buffer is insufficient to fill a 512 byte packet, so bump the receive
size to 496 ( 512 - 2 * 8 ).
Signed-off-by: Jason Andryuk
Review
The following changes since commit 61c265f0660ee476985808c8aa7915617c44fd53:
Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20200313a'
into staging (2020-03-13 10:33:04 +)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/usb-202
From: Jason Andryuk
usb-serial has issues with xHCI controllers where data is lost in the
VM. Inspecting the URBs in the guest, EHCI starts every 64 byte boundary
(wMaxPacketSize) with a header. EHCI hands packets into
usb_serial_token_in() with size 64, so these cannot cross the 64 byte
bounda
From: Jason Andryuk
Linux guests wait ~30 seconds when closing the emulated /dev/ttyUSB0.
During that time, the kernel driver is sending many control URBs
requesting GetModemStat (5). Real hardware returns a status with
FTDI_THRE (Transmitter Holding Register) and FTDI_TEMT (Transmitter
Empty) s
From: Jason Andryuk
We'll be adding a loop, so move the code into a helper function. breaks
are replaced with returns. While making this change, add braces to
single line if statements to comply with coding style and keep
checkpatch happy.
Signed-off-by: Jason Andryuk
Message-id: 202003161746
On 3/16/20 6:21 PM, Alex Bennée wrote:
This is cleaner than poking memory directly and will make later
clean-ups easier.
Signed-off-by: Alex Bennée
---
v7
- remove stray space
- fixup the floatx80 set/get routines
---
target/i386/gdbstub.c | 27 +++
1 file chan
On Mon, Mar 16, 2020 at 01:15:35PM -0500, Eric Blake wrote:
> On 3/16/20 1:09 PM, Philippe Mathieu-Daudé wrote:
> > On 3/16/20 5:07 PM, Stefan Hajnoczi wrote:
> > > gcc (GCC) 9.2.1 20190827 (Red Hat 9.2.1-1) with sanitizers enabled
> > > reports the following error:
> > >
> > > CC migrat
On Mon, 16 Mar 2020 20:42:33 +0100
Christian Borntraeger wrote:
> On 16.03.20 18:57, Cornelia Huck wrote:
> > On Mon, 16 Mar 2020 16:04:00 +0100
> > Christian Borntraeger wrote:
> >
> >> On 16.03.20 15:54, Cornelia Huck wrote:
> >>> On Mon, 16 Mar 2020 15:47:41 +0100
> >>> Janosch Frank wr
On Mon, Mar 16, 2020 at 10:33:31AM +, Daniel P. Berrangé wrote:
> On Sat, Mar 14, 2020 at 02:33:25PM +0100, Marc-André Lureau wrote:
> > Hi
> >
> > On Thu, Mar 12, 2020 at 11:49 AM Daniel P. Berrangé
> > wrote:
> > >
> > > On Thu, Mar 12, 2020 at 10:41:42AM +, Alex Bennée wrote:
> > > >
On Tue, Mar 17, 2020 at 10:22:41AM +0100, Markus Armbruster wrote:
> When user_creatable_add_type() fails, qmp_object_add() returns both
> its error and the usual empty QDict success value. The QMP core
> handles the error, and ignores the success value, leaking it. Exposed
> by qmp-cmd-test case
On Wed, 11 Mar 2020 09:21:41 -0400
Janosch Frank wrote:
> Protected VMs no longer intercept with code 4 for an instruction
> interception. Instead they have codes 104 and 108 for protected
> instruction interception and protected instruction notification
> respectively.
>
> The 104 mirrors the 4
On 3/16/20 6:21 PM, Alex Bennée wrote:
For system emulation we need to check the state of the GIC before we
report the value. However this isn't relevant to exporting of the
value to linux-user and indeed breaks the exported value as set by
modify_arm_cp_regs.
Signed-off-by: Alex Bennée
Reviewe
Spaces are required around a + operator and if statements should have
braces even for single line. Also make it simpler by reversing the
condition instead of breaking the loop.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Ar
We can move this define now that less files use it to internal.h to
further reduce dependency on hw/ide.h.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
---
include/hw/ide.h | 2 --
include/hw/ide/internal.h | 2 ++
2 files changed, 2 inser
Updated series with previous patch 4 dropped and review tags added.
BALATON Zoltan (7):
hw/ide: Get rid of piix3_init functions
hw/ide: Get rid of piix4_init function
hw/ide: Remove now unneded #include "hw/pci/pci.h" from hw/ide.h
hw/ide/pci.c: Coding style update to fix checkpatch errors
This removes pci_piix4_ide_init() function similar to clean up done to
other ide devices.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
---
hw/ide/piix.c| 12 +---
hw/isa/piix4.c | 5 -
include/hw/ide.h | 1 -
3 files changed, 5
This removes pci_piix3_ide_init() and pci_piix3_xen_ide_init()
functions similar to clean up done to other ide devices.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
---
hw/i386/pc_piix.c | 10 +-
hw/ide/
After previous clean ups we can drop direct inclusion of hw/ide.h from
several places.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
---
hw/hppa/hppa_sys.h | 1 -
hw/hppa/machine.c | 1 -
hw/i386/pc_piix.c | 1 -
hw/isa/piix4.c
The pci_ide_create_devs() function takes a hd_table parameter but all
callers just pass what ide_drive_get() returns so we can do it locally
simplifying callers and removing hd_table parameter.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Markus Armbruster
---
hw/al
After previous patches we don't need hw/pci/pci.h any more in
hw/ide.h. Some files depended on implicit inclusion by this header
which are also fixed up here.
Signed-off-by: BALATON Zoltan
Reviewed-by: Mark Cave-Ayland
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
---
hw/
From: Shivaprasad G Bhat
Fixes Coverity issue,
CID 1419883: Error handling issues (CHECKED_RETURN)
Calling "qemu_uuid_parse" without checking return value
nvdimm_set_uuid() already verifies if the user provided uuid is valid or
not. So, need to check for the validity during pr
The PowerPC 970 CPU was a cut-down POWER4, which had hypervisor capability.
However, it can be (and often was) strapped into "Apple mode", where the
hypervisor capabilities were disabled (essentially putting it always in
hypervisor mode).
That's actually the only mode of the 970 we support in qemu
From: Greg Kurz
Server class POWER CPUs have a "compat" property, which was obsoleted
by commit 7843c0d60d and replaced by a "max-cpu-compat" property on the
pseries machine type. A hack was introduced so that passing "compat" to
-cpu would still produce the desired effect, for the sake of backwa
a4f30719a8cd, way back in 2007 noted that "PowerPC hypervisor mode is not
fundamentally available only for PowerPC 64" and added a 32-bit version
of the MSR[HV] bit.
But nothing was ever really done with that; there is no meaningful support
for 32-bit hypervisor mode 13 years later. Let's stop pr
pc-for-5.0-20200317
for you to fetch changes up to 6961eae79f58385482775dc0a6c3d553f633662d:
pseries: Update SLOF firmware image (2020-03-17 17:00:22 +1100)
ppc patch queue 2020-03-17
Here's my final pull request for the qemu-
From: Greg Kurz
If a hot plug or unplug request is pending at CAS, we currently trigger
a CAS reboot, which severely increases the guest boot time. This is
because SLOF doesn't handle hot plug events and we had no way to fix
the FDT that gets presented to the guest.
We can do better thanks to re
From: Philippe Mathieu-Daudé
Replace sizeof() flexible arrays union srp_iu/viosrp_iu by the
SRP_MAX_IU_LEN definition, which is what this code actually meant
to use.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20200305121253.19078-3-phi...@redhat.com>
Reviewed-by: Paolo Bonzini
Signed-o
When we store the Logical Partitioning Control Register (LPCR) we have a
big switch statement to work out which are valid bits for the cpu model
we're emulating.
As well as being ugly, this isn't really conceptually correct, since it is
based on the mmu_model variable, whereas the LPCR isn't (only
When running guests under a hypervisor, the hypervisor obviously needs to
be protected from guest accesses even if those are in what the guest
considers real mode (translation off). The POWER hardware provides two
ways of doing that: The old way has guest real mode accesses simply offset
and bound
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20200228123303.14540-1-phi...@redhat.com>
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc/pnv_lpc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/pnv_lpc.c b/hw/pp
MIN_RMA_SLOF records the minimum about of RMA that the SLOF firmware
requires. It lets us give a meaningful error if the RMA ends up too small,
rather than just letting SLOF crash.
It's currently stored as a number of megabytes, which is strange for global
constants. Move that megabyte scaling i
Currently we create the Real Mode Offset Register (RMOR) on all Book3S cpus
from POWER7 onwards. However the translation mode which the RMOR controls
is no longer supported in POWER9, and so the register has been removed from
the architecture.
Remove it from our model on POWER9 and POWER10.
Sign
Currently we use a big switch statement in ppc_hash64_update_rmls() to work
out what the right RMA limit is based on the LPCR[RMLS] field. There's no
formula for this - it's just an arbitrary mapping defined by the existing
CPU implementations - but we can make it a bit more readable by using a
lo
The table of RMA limits based on the LPCR[RMLS] field is slightly wrong.
We're missing the RMLS == 0 => 256 GiB RMA option, which is available on
POWER8, so add that.
The comment that goes with the table is much more wrong. We *don't* filter
invalid RMLS values when writing the LPCR, and there's
For the "pseries" machine, we use "virtual hypervisor" mode where we
only model the CPU in non-hypervisor privileged mode. This means that
we need guest physical addresses within the modelled cpu to be treated
as absolute physical addresses.
We used to do that by clearing LPCR[VPM0] and setting L
This function calculates the maximum size of the RMA as implied by the
host's page size of structure of the VRMA (there are a number of other
constraints on the RMA size which will supersede this one in many
circumstances).
The current interface takes the current RMA size estimate, and clamps it
t
From: Philippe Mathieu-Daudé
Depending on the length of sense data, vscsi_send_rsp() can
overrun the buffer size.
Do not copy more than SRP_MAX_IU_DATA_LEN bytes, and assert
that vscsi_send_iu() is always called with a size in range.
Reported-by: Paolo Bonzini
Suggested-by: Paolo Bonzini
Signe
On ppc we have the concept of virtual hypervisor ("vhyp") mode, where we
only model the non-hypervisor-privileged parts of the cpu. Essentially we
model the hypervisor's behaviour from the point of view of a guest OS, but
we don't model the hypervisor's execution.
In particular, in this mode, qem
Currently, we construct the SLBE used for VRMA translations when the LPCR
is written (which controls some bits in the SLBE), then use it later for
translations.
This is a bit complex and confusing - simplify it by simply constructing
the SLBE directly from the LPCR when we need it.
Signed-off-by:
On 3/17/20 10:53 AM, Philippe Mathieu-Daudé wrote:
On 3/16/20 6:21 PM, Alex Bennée wrote:
This is cleaner than poking memory directly and will make later
clean-ups easier.
Signed-off-by: Alex Bennée
---
v7
- remove stray space
- fixup the floatx80 set/get routines
---
target/i386/gdbs
Move the calculation of the Real Mode Area (RMA) size into a helper
function. While we're there clean it up and correct it in a few ways:
* Add comments making it clearer where the various constraints come from
* Remove a pointless check that the RMA fits within Node 0 (we've just
clamped
The Real Mode Area (RMA) is the part of memory which a guest can access
when in real (MMU off) mode. Of course, for a guest under KVM, the MMU
isn't really turned off, it's just in a special translation mode - Virtual
Real Mode Area (VRMA) - which looks like real mode in guest mode.
The mechanics
From: Philippe Mathieu-Daudé
We already have a 'iu' pointer, use it
(this simplifies the next commit).
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20200305121253.19078-4-phi...@redhat.com>
Reviewed-by: Paolo Bonzini
Signed-off-by: David Gibson
---
hw/scsi/spapr_vscsi.c | 6 +++---
1 f
From: Nicholas Piggin
ppc_cpu_do_system_reset delivers a system rreset interrupt to the guest,
which is certainly not what is intended here. Panic the guest like other
failure cases here do.
Signed-off-by: Nicholas Piggin
Message-Id: <20200316142613.121089-2-npig...@gmail.com>
Reviewed-by: Greg
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20200305121253.19078-8-phi...@redhat.com>
Reviewed-by: Paolo Bonzini
Signed-off-by: David Gibson
---
hw/scsi/spapr_vscsi.c | 4 +---
hw/scsi/trace-events | 1 +
2 files changed, 2 insertions(+), 3 deletions(-)
d
From: Philippe Mathieu-Daudé
This header use the srp_* structures declared in "hw/scsi/srp.h".
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20200305121253.19078-2-phi...@redhat.com>
Reviewed-by: Paolo Bonzini
Signed-off-by: David Gibson
---
hw/scsi/viosrp.h | 2 ++
1 file changed, 2 in
When the LPCR is written, we update the env->rmls field with the RMA limit
it implies. Simplify things by just calculating the value directly from
the LPCR value when we need it.
It's possible this is a little slower, but it's unlikely to be significant,
since this is only for real mode accesses
In the spapr code we've been gradually moving towards a convention that
functions which create pieces of the device tree are called spapr_dt_*().
This patch speeds that along by renaming most of the things that don't yet
match that so that they do.
For now we leave the *_dt_populate() functions wh
From: Nicholas Piggin
There should no longer be a reason to prevent TCG providing FWNMI.
System Reset interrupts are generated to the guest with nmi monitor
command and H_SIGNAL_SYS_RESET. Machine Checks can not be injected
currently, but this could be implemented with the mce monitor cmd
similar
In spapr_machine_init() we clamp the size of the RMA to 16GiB and the
comment saying why doesn't make a whole lot of sense. In fact, this was
done because the real mode handling code elsewhere limited the RMA in TCG
mode to the maximum value configurable in LPCR[RMLS], 16GiB.
But,
* Actually LPC
From: Cédric Le Goater
The "ibm,xive-lisn-ranges" defines ranges of interrupt numbers that
the guest can use to configure IPIs. It starts at 0 today but it could
change to some other offset. Make clear which IRQ range we are
exposing by using SPAPR_IRQ_IPI in the property definition.
Signed-off-
From: Nicholas Piggin
FWNMI machine check delivery misses a few things that will make it fail
with TCG at least (which we would like to allow in future to improve
testing).
It's not nice to scatter interrupt delivery logic around the tree, so
move it to excp_helper.c and share code where possibl
From: Nicholas Piggin
Provide for an alternate delivery location, -1 defaults to the
architected address.
Signed-off-by: Nicholas Piggin
Message-Id: <20200316142613.121089-7-npig...@gmail.com>
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 2 +-
target/ppc/
From: Alexey Kardashevskiy
At the moment "pseries" starts in SLOF which only expects the FDT blob
pointer in r3. As we are going to introduce a OpenFirmware support in
QEMU, we will be booting OF clients directly and these expect a stack
pointer in r1, Linux looks at r3/r4 for the initramdisk loc
From: Alexey Kardashevskiy
At the moment SLOF reserves space for RTAS and instantiates the RTAS blob
which is 20 bytes binary blob calling an hypercall. The rest of the RTAS
area is a log which SLOF has no idea about but QEMU does.
This moves RTAS sizing to QEMU and this overrides the size from
From: Nicholas Piggin
The option is called "FWNMI", and it involves more than just machine
checks, also machine checks can be delivered without the FWNMI option,
so re-name various things to reflect that.
Signed-off-by: Nicholas Piggin
Message-Id: <20200316142613.121089-3-npig...@gmail.com>
Rev
From: Philippe Mathieu-Daudé
The 'union srp_iu' is meant as a pointer to any SRP Information
Unit type, it is not related to the size of a VIO DMA buffer.
Use a plain buffer for the VIO DMA read/write calls.
We can remove the reserved buffer from the 'union srp_iu'.
This issue was noticed when
From: Philippe Mathieu-Daudé
Introduce the req_iu() helper which returns a pointer to
the viosrp_iu union held in the vscsi_req structure.
This simplifies the next patch.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20200305121253.19078-5-phi...@redhat.com>
Reviewed-by: Paolo Bonzini
Sig
>-Original Message-
>From: Qemu-devel [mailto:qemu-devel-
>bounces+kuhn.chenqun=huawei@nongnu.org] On Behalf Of Markus
>Armbruster
>Sent: Tuesday, March 17, 2020 5:23 PM
>To: qemu-devel@nongnu.org
>Cc: Kevin Wolf ; pbonz...@redhat.com;
>berra...@redhat.com; ehabk...@redhat.com
>Subject:
Currently this node with information about hotpluggable memory is created
from spapr_dt_cas_updates(). But that's just a hangover from when we
created it only as a diff to the device tree at CAS time. Now that we
fully rebuild the DT as CAS time, it makes more sense to create this along
with the
> 2020年3月12日 16:25，Michael S. Tsirkin 写道：
>
> On Thu, Mar 12, 2020 at 03:49:55PM +0800, Hui Zhu wrote:
>> If the guest kernel has many fragmentation pages, use virtio_balloon
>> will split THP of QEMU when it calls MADV_DONTNEED madvise to release
>> the balloon pages.
>> Set option thp-order
From: Vitaly Chikunov
rlwinm cannot just AND with Mask if shift value is zero on ppc64 when
Mask Begin is greater than Mask End and high bits are set to 1.
Note that PowerISA 3.0B says that for `rlwinm' ROTL32 is used, and
ROTL32 is defined (in 3.3.14) so that rotated value should have two
copie
On Wed, 11 Mar 2020 09:21:42 -0400
Janosch Frank wrote:
> Protected guests save the instruction control blocks in the SIDA
> instead of QEMU/KVM directly accessing the guest's memory.
>
> Let's introduce new functions to access the SIDA.
>
> Also the new memops are available with KVM_CAP_S390_P
On Thu, 12 Mar 2020 12:20:25 +0100
Janosch Frank wrote:
> On 3/12/20 11:42 AM, Christian Borntraeger wrote:
> >
> >
> > On 11.03.20 14:21, Janosch Frank wrote:
> >> For protected guests, we need to put the STSI emulation results into
> >> the SIDA, so SIE will write them into the guest at the
This is currently called from spapr_dt_cas_updates() which is a hang
over from when we created this only as a diff to the DT at CAS time.
Now that we fully rebuild the DT at CAS time, just create it along
with the rest of the properties in /chosen.
Signed-off-by: David Gibson
Reviewed-by: Greg Ku
On 3/16/20 6:21 PM, Alex Bennée wrote:
This is a fairly bare-bones test of setting the various vector sizes
for SVE which will only fail if the PR_SVE_SET_VL can't reduce the
user-space vector length by powers of 2.
However we will also be able to use it in a future test which
exercises the GDB
On 3/16/20 6:21 PM, Alex Bennée wrote:
This tests a bunch of registers that the kernel allows userspace to
read including the CPUID registers. We need a SVE aware compiler as we
are testing the id_aa64zfr0_el1 register in the set.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Messa
On 3/16/20 6:21 PM, Alex Bennée wrote:
A very simple test case which sets and reads SVE registers while
running a test case. We don't really need to compile a SVE binary for
this case but we will later so keep it simple for now.
Signed-off-by: Alex Bennée
Tested-by: Philippe Mathieu-Daudé
From: Nicholas Piggin
PAPR requires that if "ibm,nmi-register" succeeds, then the hypervisor
delivers all system reset and machine check exceptions to the registered
addresses.
System Resets are delivered with registers set to the architected state,
and with no interlock.
Signed-off-by: Nichola
On 17/03/20 09:55, Colin Xu wrote:
>
> On 2020-03-17 16:26, Paolo Bonzini wrote:
>> On 17/03/20 08:46, Colin Xu wrote:
>>> Hi Paolo,
>>>
>>> For future HAX patch, once it's "Reviewed-by" haxm maintainers and other
>>> reviewers, do we need "SubmitAPullRequest" separately or you will do it
>>> toge
On 3/16/20 6:21 PM, Alex Bennée wrote:
The test runners job is to start QEMU with guest debug enabled and
then spawn a gdb process running a test script that exercises the
functionality it wants to test.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Da
From: Nicholas Piggin
The FWNMI option must deliver system reset interrupts to their
registered address, and there are a few constraints on the handler
addresses specified in PAPR. Add the system reset address state and
checks.
Signed-off-by: Nicholas Piggin
Message-Id: <20200316142613.121089-4
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