Re: [PATCH v5 10/60] target/riscv: vector widening integer add and subtract

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > Signed-off-by: LIU Zhiwei > --- > target/riscv/helper.h | 49 > target/riscv/insn32.decode | 16 +++ > target/riscv/insn_trans/trans_rvv.inc.c | 154 > target/riscv/vector_helper.c

Re: [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > +#define DO_MADC(N, M, C) ((__typeof(N))(N + M + C) < N ? 1 : 0) Incorrect. E.g N = 1, M = UINT_MAX, C = 1, adds to 1, which is not less than N, despite the carry-out. You want C ? N + M <= N : N + M < N > +#define DO_MSBC(N, M, C) ((__typeof(N))(N -

Re: [PATCH v5 12/60] target/riscv: vector bitwise logical instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > Signed-off-by: LIU Zhiwei > --- > target/riscv/helper.h | 25 > target/riscv/insn32.decode | 9 + > target/riscv/insn_trans/trans_rvv.inc.c | 11 ++ > target/riscv/vector_helper.c| 51

Re: [PATCH v5 13/60] target/riscv: vector single-width bit shift instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > +#define GEN_OPIVX_GVEC_SHIFT_TRANS(NAME, GVSUF) > \ > +static bool trans_##NAME(DisasContext *s, arg_rmrr *a) > \ > +{ > \ > +

Re: [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions

On 2020/3/14 13:58, Richard Henderson wrote: On 3/12/20 7:58 AM, LIU Zhiwei wrote: +#define DO_MADC(N, M, C) ((__typeof(N))(N + M + C) < N ? 1 : 0) Incorrect. E.g N = 1, M = UINT_MAX, C = 1, adds to 1, which is not less than N, despite the carry-out. Yes, it really the corner case. I shoul

Re: [PATCH v5 14/60] target/riscv: vector narrowing integer right shift instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > Signed-off-by: LIU Zhiwei > --- > target/riscv/helper.h | 13 > target/riscv/insn32.decode | 6 ++ > target/riscv/insn_trans/trans_rvv.inc.c | 91 + > target/riscv/vector_helper.c| 14

Re: [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions

On 3/13/20 10:58 PM, Richard Henderson wrote: > C ? N + M <= N : N + M < N Ho hum. N + M + 1 <= N. I'm sure you saw the typo... r~

Re: [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions

On 2020/3/14 14:16, Richard Henderson wrote: On 3/13/20 10:58 PM, Richard Henderson wrote: C ? N + M <= N : N + M < N Ho hum. N + M + 1 <= N. I'm sure you saw the typo... You give the corner case and the very precise answer. Thanks very much. Zhiwei r~

Re: [PATCH v5 15/60] target/riscv: vector integer comparison instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > +/* Vector Integer Comparison Instructions */ > +#define DO_MSEQ(N, M) ((N == M) ? 1 : 0) > +#define DO_MSNE(N, M) ((N != M) ? 1 : 0) > +#define DO_MSLTU(N, M) ((N < M) ? 1 : 0) > +#define DO_MSLT(N, M) ((N < M) ? 1 : 0) > +#define DO_MSLEU(N, M) ((N <= M) ?

Re: [PATCH v5 16/60] target/riscv: vector integer min/max instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > +/* Vector Integer Min/Max Instructions */ > +GEN_OPIVV_GVEC_TRANS(vminu_vv, umin) > +GEN_OPIVV_GVEC_TRANS(vmin_vv, smin) > +GEN_OPIVV_GVEC_TRANS(vmaxu_vv, umax) > +GEN_OPIVV_GVEC_TRANS(vmax_vv, smax) > +GEN_OPIVX_TRANS(vminu_vx, opivx_check) > +GEN_OPIVX_T

Re: [PATCH v5 17/60] target/riscv: vector single-width integer multiply instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > +static int64_t do_mulhsu_d(int64_t s2, uint64_t s1) > +{ > +uint64_t hi_64, lo_64, abs_s2 = s2; > + > +if (s2 < 0) { > +abs_s2 = -s2; > +} > +mulu64(&lo_64, &hi_64, abs_s2, s1); > +if ((int64_t)(s2 ^ s1) < 0) { Why would the sign

Re: [PATCH v5 18/60] target/riscv: vector integer divide instructions

On 3/12/20 7:58 AM, LIU Zhiwei wrote: > Signed-off-by: LIU Zhiwei > --- > target/riscv/helper.h | 33 +++ > target/riscv/insn32.decode | 8 +++ > target/riscv/insn_trans/trans_rvv.inc.c | 10 > target/riscv/vector_helper.c| 74 +

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