From: Aleksandar Markovic
The following changes since commit 084a398bf8aa7634738e6c6c0103236ee1b3b72f:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2019-12-13 18:14:07 +)
are available in the git repository at:
https://github.com/AMarkovic/qemu
From: Philippe Mathieu-Daudé
The r4k machine was introduced in 2005 (6af0bf9c7) and its last
logical change was in 2005 (9542611a6). After that, one can
count 164 maintenance commits (QEMU API changes) with the
exception of 1 fix in 2015 (memory leak, commit 3ad9fd5a).
This machine was introduce
From: Aleksandar Markovic
Change the maintainership for Malta board to improve its quality.
Acked-by: Aurelien Jarno
Signed-off-by: Aleksandar Markovic
Acked-by: Philippe Mathieu-Daudé
Message-Id: <1575982519-29852-4-git-send-email-aleksandar.marko...@rt-rk.com>
---
MAINTAINERS | 5 +++--
1
From: Aleksandar Markovic
Change the maintainership for Fulong 2E board to improve its quality.
Signed-off-by: Aleksandar Markovic
Acked-by: Philippe Mathieu-Daudé
Message-Id: <1575982519-29852-3-git-send-email-aleksandar.marko...@rt-rk.com>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion
From: Aleksandar Markovic
Add three files that were recently introduced in a refactoring,
that Malta emulation relies on. They are added by this patch
to Malta section, but they are not added to the general MIPS
section, since they are really not MIPS-specific, and there
may be some non-MIPS hard
From: Aleksandar Markovic
There should be a person who will quickly evaluate new UI
translation, and find a way to update existing ones should
something changes in UI.
Signed-off-by: Aleksandar Markovic
Message-Id: <1575982519-29852-2-git-send-email-aleksandar.marko...@rt-rk.com>
---
MAINTAINE
On Sat, 14 Dec 2019 at 09:45, Cornelia Huck wrote:
>
> The following changes since commit 084a398bf8aa7634738e6c6c0103236ee1b3b72f:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2019-12-13 18:14:07 +)
>
> are available in the Git repository at:
On 12/16/19 12:58 PM, dcb wrote:
gcc compiler flag -Wduplicated-cond will catch this kind of problem.
Interesting, thanks for sharing!
You might want to switch it on in your builds. It has been available for
over a year.
On 14/12/19 17:02, Philippe Mathieu-Daudé wrote:
> If a subregion is mapped out of the parent region range, it
> will never get accessed. Since this is a bug, abort to help
> the developer notice the mistake.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> memory.c | 1 +
> 1 file changed, 1 i
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> In commit 1454509726 we removed the pc_pci_device_init()
> deprecated function and its calls, but we forgot to remove
> its prototype. Do that now.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/i386/pc.h | 1 -
> 1 file changed, 1
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> In commit f809c6051 we replaced the use of cpu_set_smm_t callbacks
> by using a Notifier to modify the MemoryRegion. This prototype is
> now not used anymore, we can safely remove it.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> The "pcie_host.h" header is used by devices providing a PCI-e bus,
> usually North Bridges. The ICH9 is a South Bridge.
> Since we don't need this header, do not include it.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/i386/ich9.
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> Using magic numbers is dangerous because the structures PCIIDEState
> might be modified and this source file consuming the "ide/pci.h"
> header would be out of sync, eventually accessing out of bound
> array members.
> Use the ARRAY_SIZE() to keep
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> Commit 02a9594b4f0 already converted 'dev' to DeviceState.
> Since the cast is superfluous, remove it.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/ide/piix.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> While the ICH9 chipset is a 'South Bridge', it is not a PCI bridge.
> Nothing in "hw/i386/ich9.h" requires definitions from "pci_bridge.h"
> so move its inclusion where it is required.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw
On 13/12/19 17:17, Philippe Mathieu-Daudé wrote:
> Since commit 0c8465440 the ioapic_print_redtbl() function is not
> used outside of ioapic_common.c, make it static, and remove its
> prototype declaration in "ioapic_internal.h".
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/hw/i386/
On Thu, 12 Dec 2019 23:20:23 +0100
Juan Quintela wrote:
> Hi
>
> This series simplify test_migrate_start() in two ways:
> - simplify the command line creation, so everything that is common between
> architectures don't have to be repeated (DRY).
> Note that this bit remove lines of code.
> -
The node has been removed from the texi file some months ago, so we
should remove it from the menu section, too.
Fixes: 27a296fce982 ("qemu-ga: Convert invocation documentation to rST")
Signed-off-by: Thomas Huth
---
qemu-doc.texi | 1 -
1 file changed, 1 deletion(-)
diff --git a/qemu-doc.texi
On 12/12/19 23:20, Juan Quintela wrote:
> @@ -584,16 +585,16 @@ static int test_migrate_start(QTestState **from,
> QTestState **to,
> cmd_src = g_strdup_printf("-machine accel=%s -m 150M"
There will be conflicts here as this "-machine accel=%s" will change to
"-accel", but nothing major.
On Thu, 12 Dec 2019 at 11:47, Alex Bennée wrote:
>
> A write to the SCR can change the effective EL by droppping the system
> from secure to non-secure mode. However if we use a cached current_el
> from before the change we'll rebuild the flags incorrectly. To fix
> this we introduce the ARM_CP_NE
On 16.12.2019 12:29, Christian Borntraeger wrote:
>
>
> On 16.12.19 12:24, Thomas Huth wrote:
>> Note: I've marked the patch as RFC since I'm not quite sure whether
>> this is really the right way to address this issue: It's unfortunate
>> that we have to mess with different location in ZIPL w
Hi,
> > Of course only virtio drivers would try step (2), other drivers (when
> > sharing buffers between intel gvt device and virtio-gpu for example)
> > would go straight to (3).
>
> For virtio-gpu as it is today, it's not clear to me that they're
> equivalent. As I read it, the virtio-gpu sp
On 12/12/2019 23:20, Juan Quintela wrote:
> Hi
>
> This series simplify test_migrate_start() in two ways:
> - simplify the command line creation, so everything that is common between
> architectures don't have to be repeated (DRY).
> Note that this bit remove lines of code.
> - test_migrate_st
On 12/12/19 23:20, Juan Quintela wrote:
> Hi
>
> This series simplify test_migrate_start() in two ways:
> - simplify the command line creation, so everything that is common between
> architectures don't have to be repeated (DRY).
> Note that this bit remove lines of code.
> - test_migrate_star
PROPBASER, PENDBASE and GICR_CTRL will be used for LPI management.
Signed-off-by: Eric Auger
---
lib/arm/asm/gic-v3.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
index 4a445a5..d02f4a4 100644
--- a/lib/arm/asm/gic-v3.h
+++ b/lib/arm/asm/g
Introduce additional SZ_256, SZ_8K, SZ_16K macros that will
be used by ITS tests.
Signed-off-by: Eric Auger
---
lib/libcflat.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/libcflat.h b/lib/libcflat.h
index ea19f61..7092af2 100644
--- a/lib/libcflat.h
+++ b/lib/libcflat.h
@@ -36,7 +
ipi_enable() code would be reusable for other interrupts
than IPI. Let's rename it setup_irq() and pass an interrupt
handler pointer. We also export it to use it in other tests
such as the PMU's one.
Signed-off-by: Eric Auger
---
arm/gic.c | 24 +++-
lib/arm/asm/gic.h
This helper function enables or disables the signaling of LPIs
at redistributor level.
Signed-off-by: Eric Auger
---
lib/arm/asm/gic-v3-its.h | 1 +
lib/arm/gic-v3-its.c | 18 ++
2 files changed, 19 insertions(+)
diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-it
Detect the presence of an ITS as part of the GICv3 init
routine, initialize its base address and read few registers
the IIDR, the TYPER to store its dimensioning parameters.
This is our first ITS test, belonging to a new "its" group.
Signed-off-by: Eric Auger
---
arm/Makefile.common|
This series is a revival of an RFC series sent in Dec 2016 [1].
Given the amount of code and the lack of traction at that time,
I haven't respinned until now. However a recent bug found around
the ITS migration convinced me that this work may deserve to be
respinned and enhanced.
Tests exercise ma
Add two new migration tests. One testing the migration of
a topology where collection were unmapped. The second test
checks the migration of the pending table.
Signed-off-by: Eric Auger
---
arm/gic.c | 148 ++
arm/unittests.cfg | 16 -
2 f
Add helper routines to parse and set up BASER registers.
Add a new test dedicated to BASER accesses.
Signed-off-by: Eric Auger
---
arm/gic.c| 20 ++
arm/unittests.cfg| 6 +++
lib/arm/asm/gic-v3-its.h | 17
lib/arm/gic-v3-its.c | 84 ++
its_enable_defaults() is the top init function that allocates all
the requested tables (device, collection, lpi config and pending
tables), enable LPIs at distributor level and ITS level.
gicv3_enable_defaults must be called before.
Signed-off-by: Eric Auger
---
lib/arm/asm/gic-v3-its.h | 1 +
Allocate the LPI configuration and per re-distributor pending table.
Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
by default in the config table.
Also introduce a helper routine that allows to set the pending table
bit for a given LPI.
Signed-off-by: Eric Auger
---
lib/arm/
Allocate the command queue and initialize related registers:
CBASER, CREADR, CWRITER.
The command queue is 64kB. This aims at not bothing with fullness.
Signed-off-by: Eric Auger
---
lib/arm/asm/gic-v3-its.h | 7 +++
lib/arm/gic-v3-its.c | 37 +
2 fi
Introduce an helper functions to register
- a new device, characterized by its device id and the
max number of event IDs that dimension its ITT (Interrupt
Translation Table). The function allocates the ITT.
- a new collection, characterized by its ID and the
target processing engine (PE).
Triggers LPIs through the INT command.
the test checks the LPI hits the right CPU and triggers
the right LPI intid, ie. the translation is correct.
Updates to the config table also are tested, along with inv
and invall commands.
Signed-off-by: Eric Auger
---
arm/gic.c| 174
Implement main ITS commands. The code is largely inherited from
the ITS driver.
Signed-off-by: Eric Auger
---
arm/Makefile.common | 2 +-
lib/arm/asm/gic-v3-its.h | 36 +++
lib/arm/gic-v3-its-cmd.c | 462 +++
3 files changed, 499 insertions(+), 1 delet
From: Andre Przywara
A common theme when accessing per-IRQ parameters in the GIC distributor
is to set fields of a certain bit width in a range of MMIO registers.
Examples are the enabled status (one bit per IRQ), the level/edge
configuration (2 bits per IRQ) or the priority (8 bits per IRQ).
Ad
Let's link getchar.o to use puts and getchar from the
tests.
Then allow tests belonging to the migration group to
trigger the migration from the test code by putting
"migrate" into the uart. Then the code can wait for the
migration completion by using getchar().
The __getchar implement is minimal
2019-12-13 18:14:07 +)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20191216-1
>
> for you to fetch changes up to f80741d107673f162e3b097fc76a1590036cc9d1:
>
> target/arm: ensure we use cur
This test maps LPIs (populates the device table, the collection table,
interrupt translation tables, configuration table), migrates and make
sure the translation is correct on the destination.
Signed-off-by: Eric Auger
---
arm/gic.c| 55 +---
a
On Mon, Dec 16, 2019 at 10:20:04AM +0100, Markus Armbruster wrote:
> Corey Minyard writes:
>
> I've since posted v2 with a revamped commit message, and I'm ready to
> post a pull request. I really want the whole thing committed before the
> Christmas break, so Vladimir can base on it more easily
It is not safe to close an event channel from the QEMU main thread when
that channel's poller is running in IOThread context.
This patch adds a new xen_device_set_event_channel_context() function
to explicitly assign the channel AioContext, and modifies
xen_device_bind_event_channel() to initially
On Wed, 11 Dec 2019 at 14:58, Simon Veith wrote:
>
> While working on the Linux SMMUv3 driver, I noticed a few cases where the QEMU
> SMMUv3 behavior relating to stream tables was inconsistent with our hardware.
>
> Also, when debugging those differences, I found that the errors reported
> throug
On 13.12.2019 13:32, Kevin Wolf wrote:
> Am 18.11.2019 um 11:50 hat Denis Plotnikov geschrieben:
>>
>> On 10.11.2019 22:08, Denis Plotnikov wrote:
>>> On 10.11.2019 22:03, Denis Plotnikov wrote:
This allows to change (replace) the file on a block device and is useful
to workaround exclu
On Mon, 2019-12-16 at 14:45 +, Peter Maydell wrote:
> Something funny seems to have happened when this series got
> sent out: patches 1,2,3 are correctly followups to the cover
> letter, but 4,5,6 are followups to patch 3.
You are correct; I had fixed up one of the patches as I was sending
the
Each cpu subclass overloads the reset method of its parent class with
its own. But since it needs to call the parent method as well, it keeps
a parent_reset pointer to do so. This causes the same not very explicit
boiler plate to be duplicated all around the place:
pcc->parent_reset = cc->rese
Similarly to what we already do with qdev, use a helper to overload the
reset QOM methods of the parent in children classes, for clarity.
Signed-off-by: Greg Kurz
Reviewed-by: David Gibson
Reviewed-by: Alistair Francis
Reviewed-by: Cornelia Huck
Acked-by: David Hildenbrand
---
hw/core/cpu.c
Convert all targets to use cpu_class_set_parent_reset() with the following
coccinelle script:
@@
type CPUParentClass;
CPUParentClass *pcc;
CPUClass *cc;
identifier parent_fn;
identifier child_fn;
@@
+cpu_class_set_parent_reset(cc, child_fn, &pcc->parent_fn);
-pcc->parent_fn = cc->reset;
...
-cc->r
On Thu, 12 Dec 2019 at 17:33, Andrew Jones wrote:
>
> kvm-no-adjvtime is a KVM specific CPU property and a first of its kind.
> To accommodate it we also add kvm_arm_add_vcpu_properties() and a
> KVM specific CPU properties description to the CPU features document.
>
> Signed-off-by: Andrew Jones
On Mon, Dec 16, 2019 at 01:21:32AM +0100, Philippe Mathieu-Daudé wrote:
> - Use unsigned 'size' argument
> - Remove unuseful DPRINTF()
Thanks!
I'll queue it for merge after the release. If possible please ping me
after the release to help make sure it didn't get dropped.
> Philippe Mathieu-Daudé
On Thu, 12 Dec 2019 at 17:33, Andrew Jones wrote:
>
> When a VM is stopped (guest is paused) guest virtual time
> should stop counting. Otherwise, when the VM is resumed it
> will experience time jumps and its kernel may report soft
> lockups. Not counting virtual time while the VM is stopped
> ha
There are two issues with the current value of SMMU_BASE_ADDR_MASK:
- At the lower end, we are clearing bits [4:0]. Per the SMMUv3 spec,
we should also be treating bit 5 as zero in the base address.
- At the upper end, we are clearing bits [63:48]. Per the SMMUv3 spec,
only bits [63:52] must b
Per the specification, and as observed in hardware, the SMMUv3 aligns
the SMMU_STRTAB_BASE address to the size of the table by masking out the
respective least significant bits in the ADDR field.
Apply this masking logic to our smmu_find_ste() lookup function per the
specification.
ref. ARM IHI 0
In the SMMU_STRTAB_BASE register, the stream table base address only
occupies bits [51:6]. Other bits, such as RA (bit [62]), must be masked
out to obtain the base address.
The branch for 2-level stream tables correctly applies this mask by way
of SMMU_BASE_ADDR_MASK, but the one for linear stream
While working on the Linux SMMUv3 driver, I noticed a few cases where the QEMU
SMMUv3 behavior relating to stream tables was inconsistent with our hardware.
Also, when debugging those differences, I found that the errors reported through
the QEMU SMMUv3 event queue contained the address fields in
The smmuv3_record_event() function that generates the F_STE_FETCH error
uses the EVT_SET_ADDR macro to record the fetch address, placing it in
32-bit words 4 and 5.
The correct position for this address is in words 6 and 7, per the
SMMUv3 Architecture Specification.
Update the function to use the
When checking whether a stream ID is in range of the stream table, we
have so far been only checking it against our implementation limit
(SMMU_IDR1_SIDSIZE). However, the guest can program the
STRTAB_BASE_CFG.LOG2SIZE field to a size that is smaller than this
limit.
Check the stream ID against thi
The bit offsets in the EVT_SET_ADDR2 macro do not match those specified
in the ARM SMMUv3 Architecture Specification. In all events that use
this macro, e.g. F_WALK_EABT, the faulting fetch address or IPA actually
occupies the 32-bit words 6 and 7 in the event record contiguously, with
the upper an
On Thu, 12 Dec 2019 at 17:33, Andrew Jones wrote:
> Userspace that wants to set KVM_REG_ARM_TIMER_CNT should beware that
> the KVM register ID is not correct. This cannot be fixed because it's
> UAPI and if the UAPI headers are used then it can't be a problem.
> However, if a userspace attempts
On 12/16/19 4:01 PM, Greg Kurz wrote:
Similarly to what we already do with qdev, use a helper to overload the
reset QOM methods of the parent in children classes, for clarity.
Signed-off-by: Greg Kurz
Reviewed-by: David Gibson
Reviewed-by: Alistair Francis
Reviewed-by: Cornelia Huck
Acked-by
On 12/15/19 10:58 AM, Michael S. Tsirkin wrote:
On Fri, Dec 13, 2019 at 05:47:28PM +0100, Philippe Mathieu-Daudé wrote:
On 12/13/19 5:17 PM, Philippe Mathieu-Daudé wrote:
Historically, QEMU started with only one X86 machine: the PC.
The 'hw/i386/pc.h' header was used to store all X86 and PC
dec
Am 16.12.2019 um 15:51 hat Denis Plotnikov geschrieben:
> On 13.12.2019 13:32, Kevin Wolf wrote:
> > Am 18.11.2019 um 11:50 hat Denis Plotnikov geschrieben:
> >> Another problem here, is that the "size" of the device dev may not match
> >> after setting a drive.
> >> So, we should update it after t
On 12/16/19 2:29 PM, Thomas Huth wrote:
The node has been removed from the texi file some months ago, so we
should remove it from the menu section, too.
Fixes: 27a296fce982 ("qemu-ga: Convert invocation documentation to rST")
Signed-off-by: Thomas Huth
---
qemu-doc.texi | 1 -
1 file changed
On 16/12/19 16:37, Philippe Mathieu-Daudé wrote:
> On 12/15/19 10:58 AM, Michael S. Tsirkin wrote:
>> On Fri, Dec 13, 2019 at 05:47:28PM +0100, Philippe Mathieu-Daudé wrote:
>>> On 12/13/19 5:17 PM, Philippe Mathieu-Daudé wrote:
Historically, QEMU started with only one X86 machine: the PC.
>>>
On Mon, 16 Dec 2019 at 15:14, Peter Maydell wrote:
> How does this interact with the usual register sync to/from
> KVM (ie kvm_arch_get_registers(), which I think will do a
> GET_ONE_REG read of the TIMER_CNT register the way it does
> any other sysreg, inside write_kvmstate_to_list(), plus
> kvm_
On Mon, 16 Dec 2019 at 15:33, Peter Maydell wrote:
> So, to be clear, you mean that:
>
> (1) the kernel headers say:
>
> /* EL0 Virtual Timer Registers */
> #define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1)
> #define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
Paolo Bonzini wrote:
> On 12/12/19 23:20, Juan Quintela wrote:
>> Hi
>>
>> This series simplify test_migrate_start() in two ways:
>> - simplify the command line creation, so everything that is common between
>> architectures don't have to be repeated (DRY).
>> Note that this bit remove lines
On 12/16/19 4:41 PM, Paolo Bonzini wrote:
On 16/12/19 16:37, Philippe Mathieu-Daudé wrote:
On 12/15/19 10:58 AM, Michael S. Tsirkin wrote:
On Fri, Dec 13, 2019 at 05:47:28PM +0100, Philippe Mathieu-Daudé wrote:
On 12/13/19 5:17 PM, Philippe Mathieu-Daudé wrote:
Historically, QEMU started w
Paolo Bonzini wrote:
> On 12/12/19 23:20, Juan Quintela wrote:
>> @@ -584,16 +585,16 @@ static int test_migrate_start(QTestState
>> **from, QTestState **to,
>> cmd_src = g_strdup_printf("-machine accel=%s -m 150M"
>
> There will be conflicts here as this "-machine accel=%s" will change to
On 16.12.2019 18:38, Kevin Wolf wrote:
> Am 16.12.2019 um 15:51 hat Denis Plotnikov geschrieben:
>> On 13.12.2019 13:32, Kevin Wolf wrote:
>>> Am 18.11.2019 um 11:50 hat Denis Plotnikov geschrieben:
Another problem here, is that the "size" of the device dev may not match
after setting a
On 2019-12-16 15:33, Peter Maydell wrote:
On Thu, 12 Dec 2019 at 17:33, Andrew Jones
wrote:
Userspace that wants to set KVM_REG_ARM_TIMER_CNT should beware that
the KVM register ID is not correct. This cannot be fixed because
it's
UAPI and if the UAPI headers are used then it can't be a pr
On Mon, 16 Dec 2019 at 12:43, Aleksandar Markovic
wrote:
>
> From: Aleksandar Markovic
>
> The following changes since commit 084a398bf8aa7634738e6c6c0103236ee1b3b72f:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2019-12-13 18:14:07 +)
>
> are
On 16/12/19 16:46, Juan Quintela wrote:
>> I have picked up this series and rebased the -accel changes on top.
> Thanks.
>
> about the accel and the machine type, it feel so weird that we only
> need to add a machine type for aarch64.
Yes, it is. For now I have resolved the conflict to some
From: "Dr. David Alan Gilbert"
kvm_set_phys_mem can be called to reallocate a slot by something the
guest does (e.g. writing to PAM and other chipset registers).
This can happen in the middle of a migration, and if we're unlucky
it can now happen between the split 'sync' and 'clear'; the clear
as
From: Juan Quintela
We are repeating almost everything for each machine while creating the
command line for migration. And once for source and another for
destination. We start putting there opts_src and opts_dst.
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Lauren
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 44 +---
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-tes
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 76 ++
1 file changed, 34 insertions(+), 42 deletions(-)
diff --git a/tests/migration-test.c b/tests/migrati
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 9573861..372e66
Once qemu_tcg_configure is turned into a QOM property setter, it will not
be able to set a default value for mttcg_enabled. Setting the default will
move to the TCG instance_init function, which currently runs before "-icount"
is processed.
However, it is harmless to do configure_icount for all a
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 85c98f0..a83e
The following changes since commit 084a398bf8aa7634738e6c6c0103236ee1b3b72f:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2019-12-13 18:14:07 +)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 51 +-
1 file changed, 30 insertions(+), 21 deletions(-)
diff --git a/tests/migration-test.c b/tests/migrati
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 41 -
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
We will reuse the parsing loop of machine_set_property soon for "-accel",
but we do not want the "_" -> "-" conversion since "-accel" can just
standardize on dashes. We will also add a bunch of legacy option handling
to keep the QOM machine object clean. Extract the loop into a separate
function,
Now that accel/accel.c does not use CONFIG_TCG or CONFIG_KVM anymore,
it need not be compiled once for every softmmu target.
Signed-off-by: Paolo Bonzini
---
Makefile.objs | 1 +
accel/Makefile.objs | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/Makefile.objs b/Makef
Drop the "accel" property from MachineState, and instead desugar
"-machine accel=" to a list of "-accel" options.
This has a semantic change due to removing merge_lists from -accel.
For example:
- "-accel kvm -accel tcg" all but ignored "-accel kvm". This is a bugfix.
- "-accel kvm -accel threa
Move everything related to mttcg_enabled in accel/tcg/tcg-all.c,
which will make even more sense when "thread" becomes a QOM property.
For now, initializing mttcg_enabled in the instance_init function
prepares for the next patch, which will only invoke qemu_tcg_configure
when the command line incl
Similar to the existing "-rtc driftfix" option, we will convert some
legacy "-machine" command line options to global properties on accelerators.
Because accelerators are not devices, we cannot use qdev_prop_register_global.
Instead, provide a slot in the generic object_compat_props arrays for
comm
From: Juan Quintela
It has two bools and two strings, it is very difficult to remember
which does what. And it makes very difficult to add new parameters as
we need to modify all the callers.
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/mi
From: Juan Quintela
This explains better what they do and avoid confussino with
command_src/target.
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 40 +---
1 file changed, 21 insertions(+
From: Juan Quintela
Signed-off-by: Juan Quintela
Tested-by: Cornelia Huck #s390x
Tested-by: Laurent Vivier
---
tests/migration-test.c | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 85e270c..5ab
The next step is to move the parsing of "-machine accel=..." into vl.c,
unifying it with the configure_accelerators() function that has just
been introduced. This way, we will be able to desugar it into multiple
"-accel" options, without polluting accel/accel.c.
The CONFIG_TCG and CONFIG_KVM symb
Replace the ad-hoc qemu_tcg_configure with generic code invoking QOM
property getters and setters. More properties (and thus more valid
-accel suboptions) will be added in the next patches, which will move
accelerator-related "-machine" options to accelerators.
Reviewed-by: Marc-André Lureau
Sig
"info mtree -f" prints the wrong accelerator name if used with for example
"-machine accel=kvm:tcg". The right thing to do is to fetch the name
from the AccelClass, which will also work nicely once
current_machine->accel stops existing.
Tested-by: Thomas Huth
Reviewed-by: Marc-André Lureau
Sign
Signed-off-by: Paolo Bonzini
---
accel/kvm/kvm-all.c | 43 +++
hw/core/machine.c | 39 ---
include/hw/boards.h | 2 --
qemu-options.hx | 6 +++---
target/i386/kvm.c | 2 +-
vl.c| 4
6 file
Reviewed-by: Markus Armbruster
Signed-off-by: Paolo Bonzini
---
Makefile | 4
1 file changed, 4 deletions(-)
diff --git a/Makefile b/Makefile
index 1361def..a2acef3 100644
--- a/Makefile
+++ b/Makefile
@@ -445,10 +445,6 @@ dummy := $(call unnest-vars,, \
io-obj-y \
The KVMState struct is opaque, so provide accessors for the fields
that will be moved from current_machine to the accelerator. For now
they just forward to the machine object, but this will change.
Signed-off-by: Paolo Bonzini
---
accel/kvm/kvm-all.c | 23 +++
hw/ppc/e500.c
As a first step towards supporting multiple "-accel" options, push the
late processing of -icount and -accel into a new function, and use
qemu_opts_foreach to retrieve -accel options instead of stashing
them into globals.
Signed-off-by: Paolo Bonzini
---
vl.c | 28
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