Hi Geert,
Many thanks for the series upgrade.
A few static-analysis findings below (could be false positives).
On Wed, Nov 27, 2019 at 09:42:51AM +0100, Geert Uytterhoeven wrote:
[..]
> +static bool isrange(const char *s)
> +{
> + size_t n = strlen(s);
Cppcheck 1.40-18521-ge6d692d96058:
dr
Hi Eugeniu,
On Wed, Nov 27, 2019 at 3:15 PM Eugeniu Rosca wrote:
> On Wed, Nov 27, 2019 at 09:42:51AM +0100, Geert Uytterhoeven wrote:
> > +static bool isrange(const char *s)
> > +{
> > + size_t n = strlen(s);
>
> Cppcheck 1.40-18521-ge6d692d96058:
> drivers/gpio/gpio-aggregator.c:69:11: styl
On Wed, 27 Nov 2019, Aleksandar Markovic wrote:
On Tuesday, November 26, 2019, wrote:
From: Aaron Dominick
---
Your commit message is poor. You should have clearly explained what do you
do in this cleanup, and why.
That the commit message is not helpful is the smallest problem. Clearly
On 26.11.19 15:43, Andrey Shinkevich wrote:
> QEMU currently supports writing compressed data of the size equal to
> one cluster. This patch allows writing QCOW2 compressed data that
> exceed one cluster. Now, we split buffered data into separate clusters
> and write them compressed using the block
On Tue, Nov 26, 2019 at 7:38 PM Philippe Mathieu-Daudé
wrote:
>
> The kernel packaged was fetched from an unstable repository.
> Use the stable snapshot archive instead.
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2:
> - Rebased
> - Dropped Alex's Tested-by tag,
On Tue, Nov 26, 2019 at 7:38 PM Philippe Mathieu-Daudé
wrote:
>
> Now than we use the stable snapshot archive, we can remove this check.
>
> This reverts commit d2499aca4bac613d837e2720e7bbe3378bc91245.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/acceptance/boot_linux_console.py | 5
On 11/27/19 6:06 AM, Max Reitz wrote:
Doing this allows running this test with e.g. -o compat=0.10 or
-o compat=refcount_bits=1.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/273 | 3 ++-
tests/qemu-iotests/273.out | 27 ---
2 files changed, 2 insertions(+), 2
Hi Daniel, Aaron.
On 11/26/19 3:19 PM, Daniel P. Berrangé wrote:
On Tue, Nov 26, 2019 at 06:14:27PM +0530, aaron.zakh...@gmail.com wrote:
From: Aaron Dominick
I have removed the botched patches and have got the code working upto the GART
initialization.
I am not sure how to implement the GAR
On Wed, Nov 27, 2019 at 04:00:01PM +0100, Philippe Mathieu-Daudé wrote:
> Hi Daniel, Aaron.
>
> On 11/26/19 3:19 PM, Daniel P. Berrangé wrote:
> > On Tue, Nov 26, 2019 at 06:14:27PM +0530, aaron.zakh...@gmail.com wrote:
> > > From: Aaron Dominick
> > >
> > > I have removed the botched patches an
On 11/27/19 3:53 PM, Willian Rampazzo wrote:
On Tue, Nov 26, 2019 at 7:38 PM Philippe Mathieu-Daudé
wrote:
Now than we use the stable snapshot archive, we can remove this check.
This reverts commit d2499aca4bac613d837e2720e7bbe3378bc91245.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/a
Cc'ing more.
On 11/27/19 4:05 PM, Daniel P. Berrangé wrote:
On Wed, Nov 27, 2019 at 04:00:01PM +0100, Philippe Mathieu-Daudé wrote:
Hi Daniel, Aaron.
On 11/26/19 3:19 PM, Daniel P. Berrangé wrote:
On Tue, Nov 26, 2019 at 06:14:27PM +0530, aaron.zakh...@gmail.com wrote:
From: Aaron Dominick
On 26.11.19 15:43, Andrey Shinkevich wrote:
> Add the case to the iotest #214 that checks possibility of writing
> compressed data of more than one cluster size. The test case involves
> the compress filter driver showing a sample usage of that.
>
> Signed-off-by: Andrey Shinkevich
> Reviewed-by:
Sergio Lopez writes:
> microvm is a machine type inspired by Firecracker and constructed
> after its machine model.
>
> It's a minimalist machine type without PCI nor ACPI support, designed
> for short-lived guests. microvm also establishes a baseline for
> benchmarking and optimizing both QEMU a
"Zhang, Chen" writes:
> Hi~ All~
>
> Ping Anyone have time to review this series? I need more comments~
Any takers?
On 11/11/19 7:57 AM, Jan Kiszka wrote:
> To get the ball rolling after my presentation of the topic at KVM Forum
> [1] and many fruitful discussions around it, this is a first concrete
> code series. As discussed, I'm starting with the IVSHMEM implementation
> of a QEMU device and server. It's RF
Since commit 2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add
implementation for INDEX_op_ld16u_i64") has been included now, we
can also run the TCG tests with tci, so let's enable them in our
Gitlab CI now.
Signed-off-by: Thomas Huth
---
.gitlab-ci.yml | 1 +
1 file changed, 1 insertion(+)
So far we only have compile coverage for tci. But since commit
2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation
for INDEX_op_ld16u_i64") has been included, we can also run the
x86 TCG tests with tci, so let's enable them in Travis now.
Signed-off-by: Thomas Huth
---
.travis.yml
On 11/27/19 7:30 AM, Markus Armbruster wrote:
"Good enough" was true back then. It wasn't true when we reused it for
netdev_add: hostfwd and guestfwd are list-valued.
We did define a QAPI schema a few months later (14aa0c2de0 "qapi schema:
add Netdev types"). net_client_init() uses it to conv
On Wed, Nov 27, 2019 at 04:13:18PM +0100, Philippe Mathieu-Daudé wrote:
> Cc'ing more.
>
> On 11/27/19 4:05 PM, Daniel P. Berrangé wrote:
> > On Wed, Nov 27, 2019 at 04:00:01PM +0100, Philippe Mathieu-Daudé wrote:
> > > Hi Daniel, Aaron.
> > >
> > > On 11/26/19 3:19 PM, Daniel P. Berrangé wrote:
On 21.11.19 14:57, Sergio Lopez wrote:
> Fix a couple of minor coding style issues in drive_backup_prepare.
>
> Signed-off-by: Sergio Lopez
> ---
> blockdev.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
Reviewed-by: Max Reitz
signature.asc
Description: OpenPGP digital si
On Wed, 27 Nov 2019, Daniel P. Berrangé wrote:
On Wed, Nov 27, 2019 at 04:00:01PM +0100, Philippe Mathieu-Daudé wrote:
Hi Daniel, Aaron.
On 11/26/19 3:19 PM, Daniel P. Berrangé wrote:
On Tue, Nov 26, 2019 at 06:14:27PM +0530, aaron.zakh...@gmail.com wrote:
From: Aaron Dominick
I have remove
On 21.11.19 14:57, Sergio Lopez wrote:
> qmp_drive_backup now creates and starts a transactions, which implies
> that the job will transition to pause and running twice. Fix test 141
> to be aware of this change.
>
> Signed-off-by: Sergio Lopez
> ---
> tests/qemu-iotests/141.out | 2 ++
> 1 file
Eric Blake writes:
> On 11/20/19 12:25 PM, Markus Armbruster wrote:
>> Having to include qapi-commands.h just for qmp_init_marshal() is
>> suboptimal. Generate it into separate files. This lets
>> monitor/misc.c, qga/main.c, and the generated qapi-commands-FOO.h
>> include less.
>>
>> Signed-of
On 26/11/19 23:26, Max Filippov wrote:
> When a breakpoint is inserted at location for which there's currently no
> virtual to physical translation no action is taken on CPU TB cache. If a
> TB for that virtual address already exists but is not visible ATM the
> breakpoint won't be hit next time an
Hi,
> It does become a slight usability issue, as any users need to go and find
> the suitable BIOS in order to use the device. No downstream OS vendors are
> going to be able to distribute this BIOS either
>
> I don't know if we have hit this problem before & if we have any
> general policies
On Wed, Nov 27, 2019 at 05:12:10PM +0100, Gerd Hoffmann wrote:
> Hi,
>
> > It does become a slight usability issue, as any users need to go and find
> > the suitable BIOS in order to use the device. No downstream OS vendors are
> > going to be able to distribute this BIOS either
> >
> > I don't
On 21.11.19 14:57, Sergio Lopez wrote:
> Issuing a drive-backup from qmp_drive_backup takes a slightly
> different path than when it's issued from a transaction. In the code,
> this is manifested as some redundancy between do_drive_backup() and
> drive_backup_prepare().
>
> This change unifies bot
On 21.11.19 14:57, Sergio Lopez wrote:
> Issuing a blockdev-backup from qmp_blockdev_backup takes a slightly
> different path than when it's issued from a transaction. In the code,
> this is manifested as some redundancy between do_blockdev_backup() and
> blockdev_backup_prepare().
>
> This change
Hi,
> Indeed, it would be good to call usb_wakeup(), but ... there is no
> trigger to do that.
>
> When the guest places the device to D2, it cancels all the urbs that
> were pending, so there are no request that will be completed on spice
> client side that can call usb_wakeup on qemu side.
>
On 11/24/19 6:02 AM, Michael Rolnik wrote:
From: Sarah Harris
These were designed to facilitate testing but should provide enough function to
be useful in other contexts.
Only a subset of the functions of each peripheral is implemented, mainly due to
the lack of a standard way to handle elect
On 21.11.19 14:57, Sergio Lopez wrote:
> bdrv_try_set_aio_context() requires that the old context is held, and
> the new context is not held. Fix all the occurrences where it's not
> done this way.
>
> Suggested-by: Max Reitz
> Signed-off-by: Sergio Lopez
> ---
> blockdev.c | 67 +++
I've attempted to replicate but it works for me:
16:55:37 [alex@idun:~/l/t/hello-armpl] $
~/lsrc/qemu.git/builds/all/aarch64-linux-user/qemu-aarch64 ./hello-armpl
Hello World...
16:55:52 [alex@idun:~/l/t/hello-armpl] $ ldd ./hello-armpl
linux-vdso.so.1 (0xb9e78000)
libamat
Hi Liang,
On 27.11.19 16:28, Liang Yan wrote:
On 11/11/19 7:57 AM, Jan Kiszka wrote:
To get the ball rolling after my presentation of the topic at KVM Forum
[1] and many fruitful discussions around it, this is a first concrete
code series. As discussed, I'm starting with the IVSHMEM implement
On 25.11.19 14:19, Cornelia Huck wrote:
> On Mon, 25 Nov 2019 04:03:45 -0500
> Janosch Frank wrote:
>
>> Let's start moving the cpu reset functions into a single function with
>> a switch/case, so we can use fallthroughs and share more code between
>> resets.
>>
>> This patch introduces the reset
Let's start moving the cpu reset functions into a single function with
a switch/case, so we can use fallthroughs and share more code between
resets.
This patch introduces the reset function by renaming cpu_reset() and
cleaning up leftovers.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenb
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1853826
Title:
ELF loader fails to load shared object on ThunderX2 running RHEL7
Status in QEMU:
Let's move the intial reset into the reset handler and cleanup
afterwards.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
---
target/s390x/cpu-qom.h | 2 +-
target/s390x/cpu.c | 44 --
target/s390x/cpu.h | 2 +-
target/s390x/sigp.c
Adding comments and reordering code for better readability in the
diag308 and machine reset functions. Also making the kvm sclp function
void and refactoring it.
v4
* Added sclp cleanup
* Renamed ccpu reset wrapper
* Added assert to cpu reset function
Janosch Frank (6):
This includes:
- encoding of all 16 bit instructions
- encoding of all 32 bit instructions
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/insn.decode | 194 +
1 file changed, 194 insertions(+)
create mode 100644 target/avr
It defaults to returning 0 anyway and that return value is not
necessary, as 0 is also the default rc that the caller would return.
While doing that we can simplify the logic a bit and return early if
we inject a PGM exception. Also we always set a 0 cc, so let's not
base it on the rc of the sclp
Let's also move the clear reset function into the reset handler.
Signed-off-by: Janosch Frank
---
target/s390x/cpu-qom.h | 1 +
target/s390x/cpu.c | 58 +-
2 files changed, 18 insertions(+), 41 deletions(-)
diff --git a/target/s390x/cpu-qom.h b/targe
The initiating cpu needs to be reset with an initial reset. While
doing a normal reset followed by a initial reset is not wrong per se,
the Ultravisor will only allow the correct reset to be performed.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Reviewed-by: Cornelia Huck
---
h
This includes:
- CPU data structures
- object model classes and functions
- migration functions
- GDB hooks
Co-developed-by: Michael Rolnik
Co-developed-by: Sarah Harris
Signed-off-by: Michael Rolnik
Signed-off-by: Sarah Harris
Signed-off-by: Michael Rolnik
Acked-by: Igor Mammedov
Tested-by:
This includes:
- ADD, ADC, ADIW
- SBIW, SUB, SUBI, SBC, SBCI
- AND, ANDI
- OR, ORI, EOR
- COM, NEG
- INC, DEC
- MUL, MULS, MULSU
- FMUL, FMULS, FMULSU
- DES
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 822 +
This includes:
- RJMP, IJMP, EIJMP, JMP
- RCALL, ICALL, EICALL, CALL
- RET, RETI
- CPSE, CP, CPC, CPI
- SBRC, SBRS, SBIC, SBIS
- BRBC, BRBS
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 549 ++
Let's improve readability by:
* Using constants for the subcodes
* Moving parameter checking into a function
* Removing subcode > 6 check as the default case catches that
Signed-off-by: Janosch Frank
Reviewed-by: Cornelia Huck
Reviewed-by: Thomas Huth
Reviewed-by: David Hildenbrand
---
target
Add AVR related definitions into QEMU
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
---
qapi/machine.json | 3 ++-
include/disas/dis-asm.h| 6 ++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
tests/machi
Stubs for unimplemented instructions and helpers for instructions that need to
interact with QEMU.
SPM and WDR are unimplemented because they require emulation of complex
peripherals.
The implementation of SLEEP is very limited due to the lack of peripherals to
generate wake interrupts.
Memory a
This includes:
- LSR, ROR
- ASR
- SWAP
- SBI, CBI
- BST, BLD
- BSET, BCLR
Signed-off-by: Michael Rolnik
---
target/avr/translate.c | 1123
1 file changed, 1123 insertions(+)
diff --git a/target/avr/translate.c b/target/avr/transla
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of patches include a non real, sample board.
No fuses support yet
Print out 'T' through serial port
Signed-off-by: Michael Rolnik
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Acked-by: Thomas Huth
---
tests/boot-serial-test.c | 10 ++
tests/Makefile.include | 2 ++
2 files changed, 12 insertions(+)
diff --git a/tests/boo
This includes:
- BREAK
- NOP
- SLEEP
- WDR
Signed-off-by: Michael Rolnik
---
target/avr/translate.c | 174 +
1 file changed, 174 insertions(+)
diff --git a/target/avr/translate.c b/target/avr/translate.c
index dc6a1af2fc..54b384f00b 100644
Provide function disassembles executed instruction when `-d in_asm` is
provided
Example:
`./avr-softmmu/qemu-system-avr -bios free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf
-d in_asm` will produce something like the following
```
...
IN:
0x014a: CALL 0x3808
IN: main
0x
Signed-off-by: Michael Rolnik
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 145 +
1 file changed, 145 insertions(+)
create mode 100644 target/avr/translate.c
diff --git a/target/avr/translate.c b/tar
Co-developed-by: Richard Henderson
Co-developed-by: Michael Rolnik
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 234 +
1 file changed, 234 insertions(+)
diff --git a/target/avr/translate.c b/target/avr/tr
A simple board setup that configures an AVR CPU to run a given firmware image.
This is all that's useful to implement without peripheral emulation as AVR CPUs
include a lot of on-board peripherals.
NOTE: this is not a real board
NOTE: it's used for CPU testing
Signed-off-by: Michael Rol
On 11/27/19 4:48 PM, Thomas Huth wrote:
So far we only have compile coverage for tci. But since commit
2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation
for INDEX_op_ld16u_i64") has been included, we can also run the
x86 TCG tests with tci, so let's enable them in Travis now.
Si
Include AVR maintaners in MAINTAINERS file
Signed-off-by: Michael Rolnik
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5e5e3e52d6..d7bfb62791 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -163,6 +163,17 @@ S: Maintained
F: hw/ar
Make AVR support buildable
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
---
configure | 7 +++
default-configs/avr-softmmu.mak | 5 +
target/avr/Makefile.objs| 34 +
3 fi
The test is based on
https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo
demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out.
it also demostrates that timer and IRQ are working
Signed-off-by: Michael Rolnik
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Phil
In block_copy_do_copy we fallback to read+write if copy_range failed.
In this case copy_size is larger than defined for buffered IO, and
there is corresponding commit. Still, backup copies data cluster by
cluster, and most of requests are limited to one cluster anyway, so the
only source of this on
From: Sarah Harris
These were designed to facilitate testing but should provide enough function to
be useful in other contexts.
Only a subset of the functions of each peripheral is implemented, mainly due to
the lack of a standard way to handle electrical connections (like GPIO pins).
Signed-o
Currently, block_copy operation lock the whole requested region. But
there is no reason to lock clusters, which are already copied, it will
disturb other parallel block_copy requests for no reason.
Let's instead do the following:
Lock only sub-region, which we are going to operate on. Then, after
We have a lot of "chunk_end - start" invocations, let's switch to
bytes/cur_bytes scheme instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block-copy.h | 4 +--
block/block-copy.c | 68 --
2 files changed, 37 insertions(+), 35 del
Use bdrv_block_status_above to chose effective chunk size and to handle
zeroes effectively.
This substitutes checking for just being allocated or not, and drops
old code path for it. Assistance by backup job is dropped too, as
caching block-status information is more difficult than just caching
is
On 27.11.19 18:50, Janosch Frank wrote:
> It defaults to returning 0 anyway and that return value is not
> necessary, as 0 is also the default rc that the caller would return.
>
> While doing that we can simplify the logic a bit and return early if
> we inject a PGM exception. Also we always set a
offset/bytes pair is more usual naming in block layer, let's use it.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block-copy.h | 2 +-
block/block-copy.c | 80 +++---
2 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/includ
On 27.11.19 18:50, Janosch Frank wrote:
> Let's also move the clear reset function into the reset handler.
>
> Signed-off-by: Janosch Frank
> ---
[...]
Gave the first 4 patches a tcg test. Looks good.
Reviewed-by: David Hildenbrand
--
Thanks,
David / dhildenb
Split block_copy_find_inflight_req to be used in seprate.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/block-copy.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/block/block-copy.c b/block/block-copy.c
index 74295d93d5..94e7e855ef
Hide structure definitions and add explicit API instead, to keep an
eye on the scope of the shared fields.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block-copy.h | 57 +++--
block/backup-top.c | 6 ++--
block/backup.c | 27
On 11/27/19 7:07 PM, David Hildenbrand wrote:
> On 27.11.19 18:50, Janosch Frank wrote:
>> It defaults to returning 0 anyway and that return value is not
>> necessary, as 0 is also the default rc that the caller would return.
>>
>> While doing that we can simplify the logic a bit and return early i
Hi all!
This is a first part of my
[RFC 00/24] backup performance: block_status + async
Patches are mostly separate by their idea, but sending them all in
separate is inefficient.
Vladimir Sementsov-Ogievskiy (7):
block/block-copy: specialcase first copy_range request
block/block-copy: use
On 27.11.19 19:07, David Hildenbrand wrote:
> On 27.11.19 18:50, Janosch Frank wrote:
>> It defaults to returning 0 anyway and that return value is not
>> necessary, as 0 is also the default rc that the caller would return.
>>
>> While doing that we can simplify the logic a bit and return early if
On 2019-11-20, Fangrui Song wrote:
On 2019-11-15, Fangrui Song wrote:
For lld, --image-base is the preferred way to set the base address.
lld does not actually implement -Ttext-segment, but treats it as an alias for
-Ttext. -Ttext-segment=0x6000 combined with --no-rosegment can
create a 1.6G
fit_load_fdt forget to check that errp is not NULL and to zero it after
freeing. Fix it.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
hw/core/loader-fit.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit
Variable int err in inner scope shadows Error *err in outer scope.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
Reviewed-by: Philippe Mathieu-Daudé
---
v6: add Philippe's r-b
net/net.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git
Error **errp is almost always OUT-argument: it's assumed to be NULL, or
pointer to NULL-initialized pointer, or pointer to error_abort or
error_fatal, for callee to report error.
But very few functions instead get Error **errp as IN-argument:
it's assumed to be set (or, maybe, NULL), and callee sh
On 11/27/19 7:15 PM, David Hildenbrand wrote:
> On 27.11.19 18:50, Janosch Frank wrote:
>> Let's also move the clear reset function into the reset handler.
>>
>> Signed-off-by: Janosch Frank
>> ---
> [...]
>
> Gave the first 4 patches a tcg test. Looks good.
Great to hear :)
>
> Reviewed-by: D
Thomas Huth writes:
> So far we only have compile coverage for tci. But since commit
> 2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation
> for INDEX_op_ld16u_i64") has been included, we can also run the
> x86 TCG tests with tci, so let's enable them in Travis now.
>
> Signed-of
> > +/* Offsets of registers. */
> > +#define USART_DR 0x06
> > +#define USART_CSRA 0x00
> > +#define USART_CSRB 0x01
> > +#define USART_CSRC 0x02
> > +#define USART_BRRH 0x05
> > +#define USART_BRRL 0x04
> > +
> > +/* Relevant bits in regiters. */
> > +#define USART_CSRA_RXC(1 << 7)
> > +
On 11/27/19 7:25 PM, Janosch Frank wrote:
>
> There's 0 (initiated), busy and operational and as far as I know we
> implement neither.
That came out wrong...
s/operational/not operational/
We only implement "command initiated" / cc = 0
We can never have busy, because we handle sclp calls synchro
We don't need Error **, as all callers pass local Error object, which
isn't used after the call. Use Error * instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Acked-by: Dr. David Alan Gilbert
---
v6: add Dr. David's a-b
include/monitor/hmp.h | 2 +-
dump/dump-hmp-cmds.c | 4
We don't need Error **, as all callers pass local Error object, which
isn't used after the call, or NULL. Use Error * instead.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
ui/vnc.h | 2 +-
ui/vnc.c | 20 +++-
2 files changed, 8 insertions(+), 14 deletions(-)
diff --git a/ui/
On Mon, Nov 25, 2019 at 11:41 AM Philippe Mathieu-Daudé
wrote:
>
> The r4k machine was introduced in 2005 (6af0bf9c7) and its last
> logical change was in 2005 (9542611a6). After we can count 164
> maintenance commits (QEMU API changes) with the exception of
> 1 fix in 2015 (memory leak, commit 3a
On Mon, Nov 25, 2019 at 11:41 AM Philippe Mathieu-Daudé
wrote:
>
> The r4k machine was introduced in 2005 (6af0bf9c7) and its last
> logical change was in 2005 (9542611a6). After we can count 164
> maintenance commits (QEMU API changes) with the exception of
> 1 fix in 2015 (memory leak, commit 3a
too late :)
On Wed, Nov 27, 2019 at 8:44 PM Aleksandar Markovic <
aleksandar.m.m...@gmail.com> wrote:
> > > +/* Offsets of registers. */
> > > +#define USART_DR 0x06
> > > +#define USART_CSRA 0x00
> > > +#define USART_CSRB 0x01
> > > +#define USART_CSRC 0x02
> > > +#define USART_BRRH 0x05
>
Public bug reported:
1) Run `qemu-system-x86_64`
2) Try to click on the main menu
Menu is not clickable until another window is activated and QEMU window
is activated again
** Affects: qemu
Importance: Undecided
Status: New
--
You received this bug notification because you are a
Fangrui Song writes:
> For lld, --image-base is the preferred way to set the base address.
> lld does not actually implement -Ttext-segment, but treats it as an alias for
> -Ttext. -Ttext-segment=0x6000 combined with --no-rosegment can
> create a 1.6GB executable.
>
> Fix the problem by usi
Make qbus_list_bus and qbus_list_dev hint append helpers well formed:
rename errp to errp_in, as it is IN-parameter here (which is unusual
for errp), rename functions to be error_append_*_hint.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Marc-André Lureau
---
v6: change functions p
Max Filippov writes:
> When a breakpoint is inserted at location for which there's currently no
> virtual to physical translation no action is taken on CPU TB cache. If a
> TB for that virtual address already exists but is not visible ATM the
> breakpoint won't be hit next time an instruction a
On Tue, Nov 26, 2019 at 01:02:29PM +, Dr. David Alan Gilbert wrote:
[..]
> > > > @@ -1950,21 +1948,54 @@ static void lo_setlk(fuse_req_t req, fuse_ino_t
> > > > ino,
> > > >
> > > > if (!plock) {
> > > > saverr = ret;
> > > > + pthread_mutex_unlock(&ino
Make nbd_iter_channel_error errp handler well formed:
rename local_err to errp_in, as it is IN-parameter here (which is
unusual for Error**).
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
v6: fix commit message
add Eric's r-b
block/nbd.c | 10 +-
1 file c
Make kvmppc_hint_smt_possible hint append helper well formed:
rename errp to errp_in, as it is IN-parameter here (which is unusual
for errp), rename function to be kvmppc_error_append_*_hint.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Marc-André Lureau
---
v6: keep kvmppc_ functio
Make error_append_security_model_hint and
error_append_socket_sockfd_hint hint append helpers well formed:
rename errp to errp_in, as it is IN-parameter here (which is unusual
for errp).
Signed-off-by: Vladimir Sementsov-Ogievskiy
Acked-by: Greg Kurz
---
v6: add Greg's a-b
hw/9pfs/9p-local.c
On Wed, Nov 27, 2019 at 11:06 AM Alex Bennée wrote:
> Max Filippov writes:
>
> > When a breakpoint is inserted at location for which there's currently no
> > virtual to physical translation no action is taken on CPU TB cache. If a
> > TB for that virtual address already exists but is not visible
Rename Error ** parameter in check_only_migratable to common errp.
In device_set_realized:
- Move "if (local_err != NULL)" closer to error setters.
- Drop 'Error **local_errp': it doesn't save any LoCs, but it's very
unusual.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric B
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
v6: merge corresponding header change here, so, v6 is merge of
[RFC v5 011/126] block/snapshot: rename Error ** parameter to more common errp
and
[RFC v5 019/126] include/block/snapshot.h: rename Error ** parameter to
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
hw/i386/amd_iommu.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index d55dbf07fc..b1175e52c7 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1533,7 +1533
On Wed, Nov 27, 2019 at 7:48 PM Michael Rolnik wrote:
>
> too late :)
>
There will be opportunities in future versions. Whaaat, did you really
think you would get away with only 37 versions? ;-)
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qga/commands-posix.c | 2 +-
qga/commands-win32.c | 2 +-
qga/commands.c | 12 ++--
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/qga/commands-posix.c b/qga/commands-posix.c
index 1c1a165dae..3bd7b54c08 100644
--- a/
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