On Thu, Oct 24, 2019 at 05:08:59AM -0400, Jagannathan Raman wrote:
I don't know the interrupt code well enough to decide whether it's
necessary to do so much work and tie the protocol to the KVM API. The
main QEMU process already has the KVM API code and the ability to deal
with these things. I
On 11/20/19 3:55 PM, Helge Deller wrote:
> Add the textual representations of some missing target signals.
>
> Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
r~
On Thu, Oct 24, 2019 at 05:09:00AM -0400, Jagannathan Raman wrote:
> +static void set_remote_opts(PCIDevice *dev, QDict *qdict, unsigned int cmd)
> +{
> +QString *qstr;
> +MPQemuMsg msg;
> +const char *str;
> +PCIProxyDev *pdev;
> +
> +pdev = PCI_PROXY_DEV(dev);
> +
> +qstr
On 20.11.19 12:43, Janosch Frank wrote:
If a vcpu is not properly reset it might be better to just end the VM.
Signed-off-by: Janosch Frank
---
target/s390x/kvm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c
index 190400df55..0210b54157 100644
On Thu, Oct 24, 2019 at 05:09:01AM -0400, Jagannathan Raman wrote:
> diff --git a/hw/proxy/qemu-proxy.c b/hw/proxy/qemu-proxy.c
> index 3b84055..fc1c731 100644
> --- a/hw/proxy/qemu-proxy.c
> +++ b/hw/proxy/qemu-proxy.c
> @@ -337,7 +337,8 @@ static void init_proxy(PCIDevice *dev, char *command,
>
On 11/20/19 6:30 PM, Fangrui Song wrote:
> On 2019-11-20, Juan Quintela wrote:
>> Markus Armbruster wrote:
>>> Fangrui Song writes:
>>>
The warning will be enabled by default in clang 10. It is not
available for clang <= 9.
qemu/migration/migration.c:2038:24: error: implicit c
On Thu, 21 Nov 2019 12:32:38 +0100
Janosch Frank wrote:
> On 11/21/19 12:10 PM, Cornelia Huck wrote:
> > On Wed, 20 Nov 2019 06:43:20 -0500
> > Janosch Frank wrote:
> >
> >> Let's move the resets into one function and switch by type, so we can
> >> use fallthroughs for shared reset actions.
On Wed, Nov 13, 2019 at 11:01:07AM -0500, Jag Raman wrote:
>
>
> On 11/11/2019 11:27 AM, Stefan Hajnoczi wrote:
> > On Thu, Oct 24, 2019 at 05:09:11AM -0400, Jagannathan Raman wrote:
> > > +static void broadcast_msg(MPQemuMsg *msg, bool need_reply)
> > > +{
> > > +PCIProxyDev *entry;
> > > +
On 11/21/19 1:14 PM, David Hildenbrand wrote:
> On 20.11.19 12:43, Janosch Frank wrote:
>> If a vcpu is not properly reset it might be better to just end the VM.
>>
>> Signed-off-by: Janosch Frank
>> ---
>> target/s390x/kvm.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/target/
On 21.11.19 13:19, Janosch Frank wrote:
On 11/21/19 1:14 PM, David Hildenbrand wrote:
On 20.11.19 12:43, Janosch Frank wrote:
If a vcpu is not properly reset it might be better to just end the VM.
Signed-off-by: Janosch Frank
---
target/s390x/kvm.c | 2 ++
1 file changed, 2 insertions(+)
On 21.11.19 12:34, Kevin Wolf wrote:
> Am 21.11.2019 um 09:59 hat Max Reitz geschrieben:
>> On 20.11.19 19:44, Kevin Wolf wrote:
>>> When extending the size of an image that has a backing file larger than
>>> its old size, make sure that the backing file data doesn't become
>>> visible in the guest
On Wed, Nov 13, 2019 at 11:14:50AM -0500, Jag Raman wrote:
> On 11/11/2019 11:21 AM, Stefan Hajnoczi wrote:
> > On Thu, Oct 24, 2019 at 05:09:13AM -0400, Jagannathan Raman wrote:
> > > Using a separate communication channel for MMIO helps
> > > with improving Performance
> >
> > Why?
>
> Typical
On Thu, Oct 24, 2019 at 05:08:41AM -0400, Jagannathan Raman wrote:
> Started with the presentation in October 2017 made by Marc-Andre (Red Hat)
> and Konrad Wilk (Oracle) [1], and continued by Jag's BoF at KVM Forum 2018,
> the multi-process project is now a prototype and presented in this patchset
On Wed, 20 Nov 2019 at 10:58, Alex Bennée wrote:
>
> The following changes since commit 39e2821077e6dcf788b7c2a9ef50970ec7995437:
>
> Update version for v4.2.0-rc2 release (2019-11-19 19:34:10 +)
>
> are available in the Git repository at:
>
> https://github.com/stsquad/qemu.git tags/pull-
On Wed, 20 Nov 2019 06:43:22 -0500
Janosch Frank wrote:
> For diag308 subcodes 8 - 10 we have a new ipib of type 5. The ipib
> holds the address and length of the secure execution header, as well
> as a list of guest components.
>
> Each component is a block of memory, for example kernel or init
On Fri, Nov 15, 2019 at 09:05:32AM -0500, G 3 wrote:
> > You can now access the latest QEMU HTML documentation built from
>
> https://wiki.qemu.org/docs/qemu-doc.html
>
>
> This is a welcome start. Could we add version support to the URL?
>
> What I mean is add the version number to the path of
On Tue, Nov 12, 2019 at 12:39:49PM +0100, Thomas Huth wrote:
> On 07/11/2019 16.48, Stefan Hajnoczi wrote:
> > On Thu, Nov 7, 2019 at 10:43 AM Thomas Huth wrote:
> >>
> >> - Original Message -
> >>> From: "Stefan Hajnoczi"
> >>> Sent: Thursday, November 7, 2019 10:11:36 AM
> >>>
> >>> Thi
On 20/11/2019 12.43, Janosch Frank wrote:
> Let's move the resets into one function and switch by type, so we can
> use fallthroughs for shared reset actions.
>
> Signed-off-by: Janosch Frank
> ---
> hw/s390x/s390-virtio-ccw.c | 3 +
> target/s390x/cpu.c | 111 -
On Wed, 20 Nov 2019 06:43:23 -0500
Janosch Frank wrote:
> Let's sync all the protvirt header changes
>
> Signed-off-by: Janosch Frank
> ---
> linux-headers/asm-s390/kvm.h | 3 ++-
> linux-headers/linux/kvm.h| 42
> 2 files changed, 44 insertions(+), 1
21.11.2019 14:39, Kevin Wolf wrote:
> Am 21.11.2019 um 11:30 hat Vladimir Sementsov-Ogievskiy geschrieben:
>> 21.11.2019 13:28, Vladimir Sementsov-Ogievskiy wrote:
>>> 20.11.2019 21:45, Kevin Wolf wrote:
Signed-off-by: Kevin Wolf
>>>
>>> Hmm, allocating 7G will break tests on small disks, for
On 11/21/19 1:53 PM, Thomas Huth wrote:
> On 20/11/2019 12.43, Janosch Frank wrote:
>> Let's move the resets into one function and switch by type, so we can
>> use fallthroughs for shared reset actions.
>>
>> Signed-off-by: Janosch Frank
>> ---
>> hw/s390x/s390-virtio-ccw.c | 3 +
>> target/s39
On 21/11/2019 12.21, David Hildenbrand wrote:
> On 20.11.19 12:43, Janosch Frank wrote:
>> Let's improve readability by:
>> * Using constants for the subcodes
>> * Moving parameter checking into a function
>> * Removing subcode > 6 check as the default case catches that
>>
>> Signed-off-by: Janosch
On 11/21/19 1:59 PM, Cornelia Huck wrote:
> On Wed, 20 Nov 2019 06:43:23 -0500
> Janosch Frank wrote:
>
>> Let's sync all the protvirt header changes
>>
>> Signed-off-by: Janosch Frank
>> ---
>> linux-headers/asm-s390/kvm.h | 3 ++-
>> linux-headers/linux/kvm.h| 42
On Thu, 21 Nov 2019 14:12:21 +0100
Janosch Frank wrote:
> On 11/21/19 1:59 PM, Cornelia Huck wrote:
> > On Wed, 20 Nov 2019 06:43:23 -0500
> > Janosch Frank wrote:
> >
> >> Let's sync all the protvirt header changes
> >>
> >> Signed-off-by: Janosch Frank
> >> ---
> >> linux-headers/asm-s390
On 21/11/2019 14.11, Janosch Frank wrote:
> On 11/21/19 1:53 PM, Thomas Huth wrote:
>> On 20/11/2019 12.43, Janosch Frank wrote:
>>> Let's move the resets into one function and switch by type, so we can
>>> use fallthroughs for shared reset actions.
[...]
>>> +memset(env, 0, offsetof(CPUS39
On 20/11/2019 12.43, Janosch Frank wrote:
> Let's improve readability by:
> * Using constants for the subcodes
> * Moving parameter checking into a function
> * Removing subcode > 6 check as the default case catches that
>
> Signed-off-by: Janosch Frank
> ---
> target/s390x/diag.c | 54 +
This allows using "-cpu Haswell,+vmx", which we did not really want to
support in QEMU but was produced by Libvirt when using the "host-model"
CPU model.
This was produced from the output of scripts/kvm/vmxcap using the following
very ugly Python script:
bits = {
'INS/OUTS instruc
On Thu, 21 Nov 2019 at 01:44, Jean-Hugues Deschênes
wrote:
>
> According to the PushStack() pseudocode in the armv7m RM,
> bit 4 of the LR should be set to NOT(CONTROL.PFCA) when
> an FPU is present. Current implementation is doing it for
> armv8, but not for armv7. This patch makes the existing
>
On Wed, 20 Nov 2019 06:43:24 -0500
Janosch Frank wrote:
> We do not always have the SIE intercept code handy at each place where
> we do emulation. Unfortunately emulation for secure guests often
> differ slightly from normal emulation and we need to make decisions
> based on the protected state
On Tue, Nov 12, 2019 at 02:13:52PM +0300, Denis Plotnikov wrote:
> v3:
> * add property to set in machine type [MST]
> * add min queue size check [Stefan]
> * add avocado based test [Max, Stefan, Eduardo, Cleber]
>
> v2:
> * the standalone patch to make seg_max virtqueue size dependent
>
On Wed 20 Nov 2019 07:44:58 PM CET, Kevin Wolf wrote:
> Add a function that runs qemu-io and logs the output with the
> appropriate filters applied.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Eric Blake
> Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Berto
On Wed 20 Nov 2019 07:44:59 PM CET, Kevin Wolf wrote:
> run_job() accepts a wait parameter for a timeout, but it doesn't
> actually use it. The only thing that is missing is passing it to
> events_wait(), so do that now.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Eric Blake
> Reviewed-by: Vladi
On Wed 20 Nov 2019 07:45:00 PM CET, Kevin Wolf wrote:
> Automatically complete jobs that have a 'ready' state and need an
> explicit job-complete. Without this, run_job() would hang for such
> jobs.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Eric Blake
> Reviewed-by: Vladimir Sementsov-Ogievski
On Wed, 20 Nov 2019 at 15:25, Marc-André Lureau
wrote:
>
> Make SerialState a device (the following patches will introduce IO/MM
> sysbus serial devices)
>
> None of the serial_{,mm}_init() callers actually free the returned
> value (even if they did, it would be quite harmless), so we can change
On Wed, 20 Nov 2019 at 15:28, Marc-André Lureau
wrote:
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/mips/mips_mipssim.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
> index bfafa4d7e9..3cd0e6eb33 100644
> --- a/hw/mips/mips_mipssim.c
On Wed, 20 Nov 2019 at 15:28, Marc-André Lureau
wrote:
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/mips/mips_mipssim.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
> index 3cd0e6eb33..2c2c7f25b2 100644
> --- a/hw/m
On 11/21/19 2:25 PM, Cornelia Huck wrote:
> On Wed, 20 Nov 2019 06:43:24 -0500
> Janosch Frank wrote:
>
>> We do not always have the SIE intercept code handy at each place where
>> we do emulation. Unfortunately emulation for secure guests often
>> differ slightly from normal emulation and we nee
On Sat, Nov 16, 2019 at 03:20:16PM +0400, Marc-André Lureau wrote:
> The property doesn't make much sense for a vhost-user device.
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/virtio/vhost-user-fs.c | 1 -
> include/hw/virtio/vhost-user-fs.h | 1 -
> 2 files changed, 2 deletions(-)
I
On Wed, 20 Nov 2019 at 15:27, Marc-André Lureau
wrote:
>
> Memory mapped serial device is in fact a sysbus device. The following
> patches will make use of sysbus facilities for resource and
> registration. In particular, "serial-mm: use sysbus facilities" will
> move internal serial realization t
On Wed, 20 Nov 2019 at 15:28, Marc-André Lureau
wrote:
>
> Register the memory region with sysbus_init_mmio() and look it up with
> sysbus_mmio_get_region() to avoid accessing internal device fields.
>
> Suggested-by: Peter Maydell
> Signed-off-by: Marc-André Lureau
> ---
> hw/char/serial.c
On Wed, 20 Nov 2019 06:43:26 -0500
Janosch Frank wrote:
> Now that we know the protection state off the cpus, we can start
> handling all diag 308 subcodes in the protected state.
"As we now have access to the protection state of the cpus, we can
implement special handling of diag 308 subcodes f
On Wed, Nov 20, 2019 at 11:48:56AM +, Daniel P. Berrangé wrote:
> On Tue, Nov 19, 2019 at 11:16:26AM +, Stefan Hajnoczi wrote:
> > The virtqueue element returned by vu_queue_pop() is allocated using
> > malloc(3) by virtqueue_alloc_element(). Use the matching free(3)
> > function instead o
On 191107 1221, Jason Wang wrote:
>
> On 2019/7/22 下午9:24, Oleinik, Alexander wrote:
> > Virtual devices should not try to send zero-sized packets. The caller
> > should check the size prior to calling qemu_sendv_packet_async.
> >
> > Signed-off-by: Alexander Oleinik
> > ---
> > v2:
> >* Imp
On Wed, 20 Nov 2019 at 15:30, Marc-André Lureau
wrote:
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/sparc/leon3.c | 6 --
> target/sparc/cpu.h | 1 -
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
> index cac987373e..1a89d44e57 10
On 11/21/19 2:20 PM, Thomas Huth wrote:
> On 20/11/2019 12.43, Janosch Frank wrote:
>> Let's improve readability by:
>> * Using constants for the subcodes
>> * Moving parameter checking into a function
>> * Removing subcode > 6 check as the default case catches that
>>
>> Signed-off-by: Janosch Fra
On Thu, Nov 21, 2019 at 12:52:07PM +0100, Thomas Huth wrote:
> There have been quite a lot of QEMU-related talks at KVM Forum this
> year - let's provide a summary for the people who could not attend.
>
> Signed-off-by: Thomas Huth
> ---
> Note: For some talks it's hard to decide whether they re
do_drive_backup() acquires the AioContext lock of the corresponding
BlockDriverState. This is not a problem when it's called from
qmp_drive_backup(), but drive_backup_prepare() also acquires the lock
before calling it. The same things happens with do_blockdev_backup()
and blockdev_backup_prepare().
Issuing a drive-backup from qmp_drive_backup takes a slightly
different path than when it's issued from a transaction. In the code,
this is manifested as some redundancy between do_drive_backup() and
drive_backup_prepare().
This change unifies both paths, merging do_drive_backup() and
drive_backup
Fix a couple of minor coding style issues in drive_backup_prepare.
Signed-off-by: Sergio Lopez
---
blockdev.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index 8e029e9c01..553e315972 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -3620,7 +3620
qmp_drive_backup now creates and starts a transactions, which implies
that the job will transition to pause and running twice. Fix test 141
to be aware of this change.
Signed-off-by: Sergio Lopez
---
tests/qemu-iotests/141.out | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qemu-iote
On 11/21/19 5:52 AM, Thomas Huth wrote:
There have been quite a lot of QEMU-related talks at KVM Forum this
year - let's provide a summary for the people who could not attend.
Signed-off-by: Thomas Huth
---
Note: For some talks it's hard to decide whether they really fit the
QEMU blog or no
Issuing a blockdev-backup from qmp_blockdev_backup takes a slightly
different path than when it's issued from a transaction. In the code,
this is manifested as some redundancy between do_blockdev_backup() and
blockdev_backup_prepare().
This change unifies both paths, merging do_blockdev_backup() a
On Wed, 20 Nov 2019 at 15:31, Marc-André Lureau
wrote:
>
> Embed the SerialMM sybus device, and re-export its "chardev" property.
> That way, we can get rid of PROP_PTR "chr-state" and better track
> devices relationship.
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/display/sm501.c | 33 +
bdrv_try_set_aio_context() requires that the old context is held, and
the new context is not held. Fix all the occurrences where it's not
done this way.
Suggested-by: Max Reitz
Signed-off-by: Sergio Lopez
---
blockdev.c | 67 ++
1 file changed
On Wed, 20 Nov 2019 06:43:27 -0500
Janosch Frank wrote:
> Secure guests no longer intercept with code 4 for an instruction
> interception. Instead they have codes 104 and 108 for secure
> instruction interception and secure instruction notification
> respectively.
>
> The 104 mirrors the 4, but
On 11/21/19 2:50 PM, Cornelia Huck wrote:
> On Wed, 20 Nov 2019 06:43:26 -0500
> Janosch Frank wrote:
>
>> Now that we know the protection state off the cpus, we can start
>> handling all diag 308 subcodes in the protected state.
>
> "As we now have access to the protection state of the cpus, we
On 11/21/19 2:50 PM, Cornelia Huck wrote:
> On Wed, 20 Nov 2019 06:43:26 -0500
> Janosch Frank wrote:
>
>> run_on_cpu(cs, s390_do_cpu_load_normal, RUN_ON_CPU_NULL);
>> break;
>> case S390_RESET_LOAD_NORMAL: /* Subcode 1*/
>
> missing blank before */ (introduced in a previ
On Wed, Nov 20, 2019 at 07:44:55PM +0100, Kevin Wolf wrote:
> See patch 2 for the description of the bug fixed.
>
> v2:
> - Switched order of bs->total_sectors update and zero write [Vladimir]
> - Fixed coding style [Vladimir]
> - Changed the commit message to contain what was in the cover letter
On Wed, Nov 20, 2019 at 08:36:32PM +0300, ASM wrote:
> I trying solve the problem, with packets stopping (e1000,tap,kvm).
> My studies led to the following:
> 1. From flatview_write_continue() I see, what e1000 writes the number
> "7" to the STAT register.
> 2. The driver from target OS reads STAT
On Wed, Nov 20, 2019 at 01:49:12PM -0300, Eduardo Habkost wrote:
> We have been trying to avoid adding new aliases for CPU model
> versions, but in the case of changes in defaults introduced by
> the TAA mitigation patches, the aliases might help avoid user
> confusion when applying host software u
On Wed, 20 Nov 2019 06:43:28 -0500
Janosch Frank wrote:
> SCLP for a protected guest is done over the SIDAD, so we need to use
> the s390_cpu_virt_mem_* functions to access the SIDAD instead of guest
> memory when reading/writing SCBs.
>
> To not confuse the sclp emulation, we set 0x42000 as the
On Thu, Nov 21, 2019 at 09:58:26AM +0800, Micky Yun Chan wrote:
> diff --git a/docs/interop/vhost-user.json b/docs/interop/vhost-user.json
> index da6aaf51c8..d25c3a957f 100644
> --- a/docs/interop/vhost-user.json
> +++ b/docs/interop/vhost-user.json
> @@ -54,6 +54,37 @@
>]
> }
>
> +##
> +#
On Thu, 21 Nov 2019 15:04:31 +0100
Janosch Frank wrote:
> On 11/21/19 2:50 PM, Cornelia Huck wrote:
> > On Wed, 20 Nov 2019 06:43:26 -0500
> > Janosch Frank wrote:
>
> >
> >> run_on_cpu(cs, s390_do_cpu_load_normal, RUN_ON_CPU_NULL);
> >> break;
> >> case S390_RESET_L
This allows using "-cpu Haswell,+vmx", which we did not really want to
support in QEMU but was produced by Libvirt when using the "host-model"
CPU model.
This was produced from the output of scripts/kvm/vmxcap using the following
very ugly Python script:
bits = {
'INS/OUTS instruc
On 11/21/19 3:17 PM, Cornelia Huck wrote:
> On Thu, 21 Nov 2019 15:04:31 +0100
> Janosch Frank wrote:
>
>> On 11/21/19 2:50 PM, Cornelia Huck wrote:
>>> On Wed, 20 Nov 2019 06:43:26 -0500
>>> Janosch Frank wrote:
>>
>>>
run_on_cpu(cs, s390_do_cpu_load_normal, RUN_ON_CPU_NULL);
On 11/21/19 12:27 PM, David Hildenbrand wrote:
> On 20.11.19 12:43, Janosch Frank wrote:
>> @@ -357,6 +353,35 @@ static void s390_machine_reset(MachineState *machine)
>> run_on_cpu(cs, s390_do_cpu_initial_reset, RUN_ON_CPU_NULL);
>> run_on_cpu(cs, s390_do_cpu_load_normal, RUN_O
On 11/21/19 3:11 PM, Cornelia Huck wrote:
> On Wed, 20 Nov 2019 06:43:28 -0500
> Janosch Frank wrote:
>
>> SCLP for a protected guest is done over the SIDAD, so we need to use
>> the s390_cpu_virt_mem_* functions to access the SIDAD instead of guest
>> memory when reading/writing SCBs.
>>
>> To n
On 21.11.19 15:25, Janosch Frank wrote:
On 11/21/19 12:27 PM, David Hildenbrand wrote:
On 20.11.19 12:43, Janosch Frank wrote:
@@ -357,6 +353,35 @@ static void s390_machine_reset(MachineState *machine)
run_on_cpu(cs, s390_do_cpu_initial_reset, RUN_ON_CPU_NULL);
run_on_cp
On 11/21/19 3:07 PM, Cornelia Huck wrote:
> On Wed, 20 Nov 2019 06:43:27 -0500
> Janosch Frank wrote:
>
>> Secure guests no longer intercept with code 4 for an instruction
>> interception. Instead they have codes 104 and 108 for secure
>> instruction interception and secure instruction notificati
On 21.11.19 15:28, David Hildenbrand wrote:
>> And please trim your emails.
>>
>
> If you use Thunderbird I suggest QuoteCollapse ... because nobody got time
> for that ;)
neat.
On Sun, 10 Nov 2019 13:10:33 PST (-0800), da...@gibson.dropbear.id.au wrote:
On Fri, Nov 08, 2019 at 10:13:16AM -0800, Palmer Dabbelt wrote:
On Fri, 08 Nov 2019 10:04:47 PST (-0800), Peter Maydell wrote:
> On Fri, 8 Nov 2019 at 17:15, Alistair Francis wrote:
> >
> > On Fri, Nov 8, 2019 at 9:05
On 11/21/19 3:31 PM, Christian Borntraeger wrote:
>
>
> On 21.11.19 15:28, David Hildenbrand wrote:
>>> And please trim your emails.
>>>
>>
>> If you use Thunderbird I suggest QuoteCollapse ... because nobody got time
>> for that ;)
>
> neat.
>
Yeah, seems like I'm already too old-school for
Am 21.11.2019 um 13:21 hat Max Reitz geschrieben:
> On 21.11.19 12:34, Kevin Wolf wrote:
> > Am 21.11.2019 um 09:59 hat Max Reitz geschrieben:
> >> On 20.11.19 19:44, Kevin Wolf wrote:
> >>> When extending the size of an image that has a backing file larger than
> >>> its old size, make sure that t
On 20/11/2019 12.43, Janosch Frank wrote:
> For diag308 subcodes 8 - 10 we have a new ipib of type 5. The ipib
> holds the address and length of the secure execution header, as well
> as a list of guest components.
>
> Each component is a block of memory, for example kernel or initrd,
> which need
On 20/11/2019 12.43, Janosch Frank wrote:
> We do not always have the SIE intercept code handy at each place where
> we do emulation. Unfortunately emulation for secure guests often
> differ slightly from normal emulation and we need to make decisions
> based on the protected state of the VCPU.
>
Richard Henderson writes:
> On 11/20/19 6:30 PM, Fangrui Song wrote:
>> On 2019-11-20, Juan Quintela wrote:
>>> Markus Armbruster wrote:
Fangrui Song writes:
[...]
> diff --git a/util/cutils.c b/util/cutils.c
> index fd591cadf0..2b4484c015 100644
> --- a/util/cutils.c
> +++
Am 14.11.2019 um 18:25 hat Alexander Popov geschrieben:
> The commit a718978ed58a from July 2015 introduced the assertion which
> implies that the size of successful DMA transfers handled in ide_dma_cb()
> should be multiple of 512 (the size of a sector). But guest systems can
> initiate DMA transf
Max Reitz writes:
> With this change, it is possible to give default values for struct
> members, as follows:
>
> What you had to do so far:
>
> # @member: Some description, defaults to 42.
> { 'struct': 'Foo',
> 'data': { '*member': 'int' } }
>
> What you can do now:
>
> {
On 20/11/2019 12.43, Janosch Frank wrote:
> Secure guests no longer intercept with code 4 for an instruction
> interception. Instead they have codes 104 and 108 for secure
> instruction interception and secure instruction notification
> respectively.
>
> The 104 mirrors the 4, but the 108 is a not
Max Reitz writes:
> Optional discriminators are fine, as long as there is a default value.
>
> Signed-off-by: Max Reitz
> ---
> scripts/qapi/common.py | 14 --
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/scripts/qapi/common.py b/scripts/qapi/common.py
> index
Markus Armbruster writes:
> Max Reitz writes:
>
>> On 13.09.19 13:49, Max Reitz wrote:
>>> Another gentle ping.
>>
>> And another.
>
> Conflicts with the refactoring merged in commit 69717d0f890. Please
> accept my apologies for the inconvenience caused by the excessive delay.
>
> I'll try to r
On 11/21/19 9:07 AM, Markus Armbruster wrote:
Max Reitz writes:
With this change, it is possible to give default values for struct
members, as follows:
What you had to do so far:
# @member: Some description, defaults to 42.
{ 'struct': 'Foo',
'data': { '*member': 'int' }
On 21.11.19 15:33, Kevin Wolf wrote:
> Am 21.11.2019 um 13:21 hat Max Reitz geschrieben:
>> On 21.11.19 12:34, Kevin Wolf wrote:
>>> Am 21.11.2019 um 09:59 hat Max Reitz geschrieben:
On 20.11.19 19:44, Kevin Wolf wrote:
> When extending the size of an image that has a backing file larger t
Hi Peter,
Can we consider this patch for 4.2?
Thanks,
Edgar
On Fri, Nov 15, 2019 at 04:47:34PM +0100, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Add the CRP as unimplemented thus avoiding bus errors when
> guests access these registers.
>
> Signed-off-by: Edgar E. Iglesias
> -
Philippe Mathieu-Daudé writes:
> ping?
Did this fall through the cracks?
> On 6/26/19 2:20 PM, Philippe Mathieu-Daudé wrote:
>> Another trivial cleanup series.
>>
>> Philippe Mathieu-Daudé (2):
>> MAINTAINERS: Add missing m48t59 files to the PReP section
>> hw/timer/m48t59: Convert debug p
On Thu, 21 Nov 2019 at 15:28, Edgar E. Iglesias
wrote:
>
> Hi Peter,
>
> Can we consider this patch for 4.2?
Sure, it looks pretty safe. I've applied it to my queue
for rc3.
thanks
-- PMM
On Wed, Nov 20, 2019 at 09:05:07AM +1100, David Gibson wrote:
> On Tue, Nov 19, 2019 at 07:49:33AM +0100, Cédric Le Goater wrote:
> > On 19/11/2019 01:52, David Gibson wrote:
> > > On Mon, Nov 18, 2019 at 10:22:22AM +0100, Cédric Le Goater wrote:
> > >> The BMC of the OpenPOWER systems monitors the
Thomas Huth writes:
> There have been quite a lot of QEMU-related talks at KVM Forum this
> year - let's provide a summary for the people who could not attend.
>
> Signed-off-by: Thomas Huth
> ---
> Note: For some talks it's hard to decide whether they really fit the
> QEMU blog or not. I've
On Mon, Nov 18, 2019 at 10:22:22AM +0100, Cédric Le Goater wrote:
> The BMC of the OpenPOWER systems monitors the machine state using
> sensors, controls the power and controls the access to the PNOR flash
> device containing the firmware image required to boot the host.
>
> QEMU models the power
From: Eduardo Habkost
We have been trying to avoid adding new aliases for CPU model
versions, but in the case of changes in defaults introduced by
the TAA mitigation patches, the aliases might help avoid user
confusion when applying host software updates.
Signed-off-by: Eduardo Habkost
Signed-o
The following changes since commit 39e2821077e6dcf788b7c2a9ef50970ec7995437:
Update version for v4.2.0-rc2 release (2019-11-19 19:34:10 +)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 02fa60d10137ed2ef17534718
The MSR_IA32_TSX_CTRL MSR can be used to hide TSX (also known as the
Trusty Side-channel Extension). By virtualizing the MSR, KVM guests
can disable TSX and avoid paying the price of mitigating TSX-based
attacks on microarchitectural side channels.
Reviewed-by: Eduardo Habkost
Signed-off-by: Pao
From: Eduardo Habkost
One of the mitigation methods for TAA[1] is to disable TSX
support on the host system. Linux added a mechanism to disable
TSX globally through the kernel command line, and many Linux
distributions now default to tsx=off. This makes existing CPU
models that have HLE and RTM
This was tonight first accepted and then immediately rejected as it was
surpassed by a security fix.
=> Rebased and uploaded 1:4.0+dfsg-0ubuntu9.2 to eoan-unapproved again.
--
You received this bug notification because you are a member of qemu-
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https://bugs
This allows using "-cpu Haswell,+vmx", which we did not really want to
support in QEMU but was produced by Libvirt when using the "host-model"
CPU model. Without this patch, no VMX feature is _actually_ supported
(only the basic instruction set extensions are) and KVM fails to load
in the guest.
vandersonmr writes:
> This patch is part of Google Summer of Code (GSoC) 2019.
> More about the project can be found in:
> https://wiki.qemu.org/Internships/ProjectIdeas/TCGCodeQuality
>
> The goal of this patch is to add infrastructure to collect
> execution and JIT statistics during the emulati
On 21/11/19 14:59, Eric Blake wrote:
> On 11/21/19 5:52 AM, Thomas Huth wrote:
>> There have been quite a lot of QEMU-related talks at KVM Forum this
>> year - let's provide a summary for the people who could not attend.
>>
>> Signed-off-by: Thomas Huth
>> ---
>> Note: For some talks it's hard t
On 21/11/2019 16:36, Corey Minyard wrote:
> On Mon, Nov 18, 2019 at 10:22:22AM +0100, Cédric Le Goater wrote:
>> The BMC of the OpenPOWER systems monitors the machine state using
>> sensors, controls the power and controls the access to the PNOR flash
>> device containing the firmware image require
On 11/21/19 4:28 PM, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
ping?
Did this fall through the cracks?
Certainly =) Thanks for noticing.
This now need a (trivial) rebase.
I'll respin for 5.0.
On 6/26/19 2:20 PM, Philippe Mathieu-Daudé wrote:
Another trivial cleanup series.
The BMC of the OpenPOWER systems monitors the machine state using
sensors, controls the power and controls the access to the PNOR flash
device containing the firmware image required to boot the host.
QEMU models the power cycle process, access to the sensors and access
to the PNOR device. But, for
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