On Thu, Sep 19, 2019 at 5:34 AM Philippe Mathieu-Daudé
wrote:
>
> On 9/18/19 11:56 PM, Dan Streetman wrote:
> > On Wed, Sep 18, 2019 at 4:34 PM Alex Bennée wrote:
> >>
> >> Dan Streetman writes:
> >>
> >>> From: Dan Streetman
> >>>
> >>> There is currently no default machine type for arm so one
From: Philippe Mathieu-Daudé
We moved all the PIIX3 southbridge code out of hw/pci-host/piix.c,
it now only contains i440FX northbridge code.
Rename it to match the chipset modelled.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 2 +-
hw/i386/Kconfig
This is a refresh of the user-only patch set from March.
I do not attempt to implement any part of a kernel abi wrt mmap
and/or mprotect. Instead, it uses a x-tagged-pages property to
assume that all anonymous pages have tags.
The tests added are disabled by default, but do pass if you have
binu
Hello,
I've been using the LEON3 port of qemu, and am wondering if anyone has
touched the networking setup for such since the thread here:
https://lists.rtems.org/pipermail/users/2014-September/028224.html
On Tue, Oct 15, 2019 at 9:17 AM Joshua Shaffer
wrote:
>
> Hello,
>
> I've been using the
From: Philippe Mathieu-Daudé
The hw/pci-host/piix.c contains a mix of PIIX3 and i440FX chipsets
functions. To be able to split it, we need to export some
declarations first.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 1 +
hw/acpi/pcihp.c | 2 +-
hw/
Signed-off-by: Richard Henderson
---
tests/tcg/aarch64/mte-1.c | 27 +
tests/tcg/aarch64/mte-2.c | 39 +++
tests/tcg/aarch64/Makefile.target | 5
3 files changed, 71 insertions(+)
create mode 100644 tests/tcg/aarch64/mte-1.c
We will move this code, fix its style first.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/piix.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 0b5da5bc94..61f91ff561 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-h
When selecting only the NVDIMM device with "NVDIMM y", the
device is not compiled/linked because it does not select MEM_DEVICE
and hw/mem/Makefile.objs is not included:
$ git grep mem/ hw/Makefile.objs
hw/Makefile.objs:39:devices-dirs-$(CONFIG_MEM_DEVICE) += mem/
Let NVDIMM config select MEM_
The PIIX3 is not tied to the i440FX and can even be used without it.
Move its creation to the machine code (pc_piix.c).
We have now removed the last trace of southbridge code in the i440FX
northbridge.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c| 8 +++-
hw/pci-ho
Control this with x-tagged-pages, which is off by default.
The limitation to non-shared pages is not part of a future kernel API,
but a limitation of linux-user not being able to map virtual pages back
to physical pages.
Signed-off-by: Richard Henderson
---
v2: Add the x-tagged-pages cpu propert
lantianyu1...@gmail.com writes:
> From: Tianyu Lan
>
> Hyper-V direct tlb flush targets KVM on Hyper-V guest.
> Enable direct TLB flush for its guests meaning that TLB
> flush hypercalls are handled by Level 0 hypervisor (Hyper-V)
> bypassing KVM in Level 1. Due to the different ABI for hypercall
This is a refresh of the user-only patch set from March.
I do not attempt to implement any part of a kernel abi wrt mmap
and/or mprotect. Instead, it uses a x-tagged-pages property to
assume that all anonymous pages have tags.
The tests added are disabled by default, but do pass if you have
binu
On Mon, 14 Oct 2019 at 17:05, Peter Maydell wrote:
>
> From: Cédric Le Goater
>
> Signed-off-by: Cédric Le Goater
> Reviewed-by: Joel Stanley
> Message-id: 20190925143248.1-21-...@kaod.org
> Signed-off-by: Peter Maydell
> ---
> include/hw/arm/aspeed.h | 1 +
> hw/arm/aspeed.c | 2
At the same time, remember MAP_SHARED as PAGE_SHARED. When mapping
new pages, make sure that old target-specific page data is removed.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h| 10 --
accel/tcg/translate-all.c | 28
linux-user/mmap.c
Hello,
I've been using the LEON3 port of qemu, and am wondering if anyone has
touched the networking setup for such since the thread here:
https://lists.rtems.org/pipermail/users/2014-September/028224.html
--
Notice: This message is intended solely for use of the individual or entity
to which i
Hi Joshua,
On 10/15/19 3:17 PM, Joshua Shaffer wrote:
Hello,
I've been using the LEON3 port of qemu, and am wondering if anyone has
touched the networking setup for such since the thread here:
https://lists.rtems.org/pipermail/users/2014-September/028224.html
Thanks for sharing this!
Good
On 15/10/2019 18.46, Philippe Mathieu-Daudé wrote:
> When selecting only the NVDIMM device with "NVDIMM y", the
> device is not compiled/linked because it does not select MEM_DEVICE
> and hw/mem/Makefile.objs is not included:
>
> $ git grep mem/ hw/Makefile.objs
> hw/Makefile.objs:39:devices-d
Hi,
Could this patch go through?
If not please let me know so that I can fix.
Thank you!
Dayeol
On Sat, Oct 12, 2019, 11:30 AM Dayeol Lee wrote:
> No it doesn't mean that.
> But the following code will make the size TARGET_PAGE_SIZE - (page offset)
> if the address is not aligned.
>
> pmp_siz
Public bug reported:
The none-machine can not be started unless using "-serial null":
qemu-system-x86_64 -machine none -nographic -monitor stdio
QEMU 3.1.1 monitor - type 'help' for more information
(qemu) qemu-system-x86_64: cannot use stdio by multiple character devices
qemu-system-x86_64: coul
tags/for-upstream' into staging
(2019-10-15 13:25:05 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20191015
for you to fetch changes up to 19845504da1bdee4be7d0fba33da5be9efa4c11b:
hw/misc/bcm2835_mbox: Add trace
Patchew URL: https://patchew.org/QEMU/20191015103900.313928-1-...@irrelevant.dk/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#
Patchew URL: https://patchew.org/QEMU/20191015103900.313928-1-...@irrelevant.dk/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v2 00/20] nvme: support NVMe v1.3d, SGLs and multiple namespaces
Type: series
Message-id: 2019101510
You can start 'none' without "-serial null". Examples:
qemu-system-x86_64 -machine none
qemu-system-x86_64 -machine none -monitor stdio
qemu-system-x86_64 -machine none -nographic
qemu-system-x86_64 -machine none -monitor stdio -display none
Your command line "qemu-system-x86_64 -machine none -no
On 15/10/2019 19:03, Peter Maydell wrote:
> On Mon, 14 Oct 2019 at 17:05, Peter Maydell wrote:
>>
>> From: Cédric Le Goater
>>
>> Signed-off-by: Cédric Le Goater
>> Reviewed-by: Joel Stanley
>> Message-id: 20190925143248.1-21-...@kaod.org
>> Signed-off-by: Peter Maydell
>> ---
>> include/
Tested vs centos7, fedora30, and bionic (with and without
system capstone installed).
Changes for v3:
* Work around the various include directory nonsense.
* Re-add the s390 skipdata callback, as a separate patch.
Changes for v2:
* Drop the installed directory change. This does force a
Capstone assumes any unknown instruction is 2 bytes.
Instead, use the ilen field in the first two bits of
the instruction to stay in sync with the insn stream.
Signed-off-by: Richard Henderson
---
disas.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/
Update to 418d36d695e0. Choose this over the 4.0.1 tag because
master now includes the s390x z13 vector opcodes.
Acked-by: David Hildenbrand
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
Makefile | 1 +
capstone | 2 +-
configure
On Mon, 14 Oct 2019 10:59:57 +0800
Peter Xu wrote:
> On Mon, Aug 19, 2019 at 03:23:16PM -0600, Alex Williamson wrote:
> > On Mon, 29 Jul 2019 15:15:29 -0400
> > "Michael S. Tsirkin" wrote:
> >
> > > On Fri, Jul 26, 2019 at 06:55:27PM -0600, Alex Williamson wrote:
> > > > Please see patch 1/
On Tue, 15 Oct 2019 at 18:43, Cédric Le Goater wrote:
> On 15/10/2019 19:03, Peter Maydell wrote:
> > On Mon, 14 Oct 2019 at 17:05, Peter Maydell
> > wrote:
> > (armhf)pmaydell@mustang-maydell:~/qemu$
> > ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb
> > qemu-system-arm: at most 204
On 03/10/2019 17:58, Vladimir Sementsov-Ogievskiy wrote:
> 02.10.2019 17:22, Andrey Shinkevich wrote:
>> Add a test case to the iotest #030 that checks 'compress' option for a
>> block-stream job.
>>
>> Signed-off-by: Andrey Shinkevich
>> ---
>>tests/qemu-iotests/030 | 49
>> +++
Hi,
Oct 11, 2019, 15:18 by alistai...@gmail.com:
> On Sun, Oct 6, 2019 at 1:32 AM Chris Williams wrote:
>
> Also please use `git format-patch` to format the patch and then `git
> send-email` to send the patch. There is a whole heap of detail here:
> https://wiki.qemu.org/Contribute/SubmitAPatch
Enable s390x, aka SYSZ, in the git submodule build.
Set the capstone parameters for both s390x host and guest.
Signed-off-by: Richard Henderson
---
Makefile | 1 +
disas.c| 3 +++
target/s390x/cpu.c | 4
3 files changed, 8 insertions(+)
diff --git a/Makefile b/Makefil
Allow data compression during block-stream job for backup backing chain.
Signed-off-by: Andrey Shinkevich
---
block/stream.c | 10 --
blockdev.c | 12 +++-
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/block/stream.c b/block/stream.c
index 5562ccb..25f9324 1
QEMU currently supports writing compressed data of the size equal to
one cluster. This patch allows writing QCOW2 compressed data that
exceed one cluster. Now, we split buffered data into separate clusters
and write them compressed using the existing functionality.
To inform the block layer about w
Add a case to the iotest #030 that tests the 'compress' option for a
block-stream job.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/030 | 51 +-
tests/qemu-iotests/030.out | 4 ++--
2 files changed, 52 insertions(+), 3 deletions(-)
dif
Support the data compression during block-stream job over a backup
backing chain implemented in the following patch 'block-stream:
add compress option'.
Signed-off-by: Anton Nefedov
Signed-off-by: Denis V. Lunev
Signed-off-by: Andrey Shinkevich
---
block/io.c | 21 -
Add the test case to the iotest #214 that checks possibility of writing
compressed data of more than one cluster size.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/214 | 35 +++
tests/qemu-iotests/214.out | 15 +++
2 files changed, 50 in
New enhancements for writing compressed data to QCOW2 image.
The preceding patches have been queued in the Max's block branch:
Based-on: <20190916175324.18478-1-vsement...@virtuozzo.com>
v2:
Instead of introducing multiple key options for many drivers, the
'compression' option has been i
mmit 3af78db68176a049e2570822f64604e0692c1447:
>
> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
> (2019-10-15 13:25:05 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu
On 15/10/2019 19.51, Richard Henderson wrote:
> Capstone assumes any unknown instruction is 2 bytes.
> Instead, use the ilen field in the first two bits of
> the instruction to stay in sync with the insn stream.
>
> Signed-off-by: Richard Henderson
> ---
> disas.c | 37 ++
On 15/10/2019 19.51, Richard Henderson wrote:
> Update to 418d36d695e0. Choose this over the 4.0.1 tag because
> master now includes the s390x z13 vector opcodes.
In case you respin, please mention that this (hopefully) also fixes
https://bugs.launchpad.net/qemu/+bug/1826175
Thanks,
Thomas
Peter Maydell writes:
> On Mon, 14 Oct 2019 at 12:38, Alex Bennée wrote:
>>
>> From: "Emilio G. Cota"
>>
>> We don't bother with replicating the fast path (tlb_hit) of the old
>> cpu_ldst helpers as it has no measurable effect on performance. This
>> probably indicates we should consider flat
Peter Maydell writes:
> On Mon, 14 Oct 2019 at 12:38, Alex Bennée wrote:
>>
>> From: "Emilio G. Cota"
>>
>> We don't bother with replicating the fast path (tlb_hit) of the old
>> cpu_ldst helpers as it has no measurable effect on performance. This
>> probably indicates we should consider flat
On Fri, 11 Oct 2019 13:20:05 +0200
Jens Freimann wrote:
> This is implementing the host side of the net_failover concept
> (https://www.kernel.org/doc/html/latest/networking/net_failover.html)
>
> Changes since v2:
> * back out of creating failover pair when it is a non-networking
> vfio-pci d
Richard Henderson writes:
> On 10/14/19 3:49 AM, Alex Bennée wrote:
>> +InsnClassExecCount sparc32_insn_classes[] = {
>> +{ "Call","call", 0xc000, 0x4000, COUNT_CLASS},
>> +{ "Branch ICond","bcc",0xc1c0, 0x0080, COUNT_CLASS},
>> +{ "Bran
On Fri, 11 Oct 2019 13:20:06 +0200
Jens Freimann wrote:
> This adds support for hiding a device to the qbus and qdev APIs. The
> first user of this will be the virtio-net failover feature but the API
> introduced with this patch could be used to implement other features as
> well, for example hi
On 10/15/19 11:46 AM, Thomas Huth wrote:
>> +cap_skipdata_s390x_cb(const uint8_t *code, size_t code_size,
>> + size_t offset, void *user_data)
>> +{
>> +size_t ilen;
>> +
>> +/* See get_ilen() in target/s390x/internal.h. */
>> +switch (code[offset] >> 6) {
>> +
Public bug reported:
I try to passthrough my Intel GPU with this command:
qemu-system-x86_64 -nodefaults -parallel none -k de -rtc base=localtime
-serial unix:/run/qemu/win7-serial.sock,server,nowait -monitor
unix:/run/qemu/win7-monitor.sock,server,nowait -netdev user,id=net0
-device virtio-net-p
Run the core of the test twice, once without iothreads, and again
with, for more coverage of both setups.
Suggested-by: Nir Soffer
Signed-off-by: Eric Blake
---
tests/qemu-iotests/223 | 16 ++-
tests/qemu-iotests/223.out | 85 +-
2 files changed, 97 i
This test has been broken since 3.0. It used TEST_IMG to influence
the name of a file created during _make_test_img, but commit 655ae6bb
changed things so that the wrong file name is being created, which
then caused _launch_qemu to fail. In the meantime, the set of events
issued for the actions o
We generally include relevant HMP input in .out files, by virtue of
the fact that HMP echoes its input. But QMP does not, so we have to
explicitly inject it in the output stream, in order to make it easier
to read .out files to see what behavior is being tested (especially
true where the output fi
[subject line kept for continuity with v1, but now touches much more]
Max suggested that instead of special-casing just 223 to trace QMP
input as well output, that we should instead patch common.qemu to do
it for all tests. That in turn found that test 173 has been broken
since v3.0. Max also su
On 10/15/19 12:09 PM, Alex Bennée wrote:
> How similar are the sparc and sparc64 decodes? Is there a canonical
> table you can point to?
sparc64 is a superset of sparc32.
Appendix A of https://community.oracle.com/docs/DOC-1005258
r~
On Tue, Oct 15, 2019 at 12:02:53PM +0100, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > On Tue, Oct 15, 2019 at 10:22:18AM +0100, Dr. David Alan Gilbert wrote:
> > > * Peter Xu (pet...@redhat.com) wrote:
> > > > Migration is silently broken now with x2apic config like th
Patchew URL:
https://patchew.org/QEMU/20191014115757.51866-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v26 00/21] Add RX archtecture support
Type: series
Message-id: 20191014115757.51866-1-ys...
Hi,
please find attached three random fixes for instruction translation
and one for syscall emulation.
On Fri, Oct 11, 2019 at 6:48 AM Richard Henderson
wrote:
>
> This is an update of the v4 patch from March.
>
> I believe I've fixed the address space issues that Peter noticed.
> If the board m
On Mon, Oct 07, 2019 at 05:31:32PM +0100, Peter Maydell wrote:
> On Sat, 5 Oct 2019 at 22:58, Michael S. Tsirkin wrote:
> >
> > A couple of tweaks to the bios table test weren't
> > reviewed yet but as they are really helpful to
> > the arm tests I'm pushing, and affecting only the
> > test so fai
On Tue, Oct 15, 2019 at 01:03:17PM -0600, Alex Williamson wrote:
> On Fri, 11 Oct 2019 13:20:05 +0200
> Jens Freimann wrote:
>
> > This is implementing the host side of the net_failover concept
> > (https://www.kernel.org/doc/html/latest/networking/net_failover.html)
> >
> > Changes since v2:
>
Alex Bennée writes:
> Peter Maydell writes:
>
>> On Mon, 14 Oct 2019 at 12:38, Alex Bennée wrote:
>>>
>>> From: "Emilio G. Cota"
>>>
>>> We don't bother with replicating the fast path (tlb_hit) of the old
>>> cpu_ldst helpers as it has no measurable effect on performance. This
>>> probably i
From: Igor Mammedov
Commit bc1fb850a3 silently broke device_add test for CPU hotplug which
resulted in test successfully passing though it wasn't actually run.
Fix it by making sure that all non present CPUs reported
by "query-hotpluggable-cpus" are hotplugged instead of making up
and hardcoding
From: Philippe Mathieu-Daudé
The PIIX4/PM is a PCI device within the PIIX4 chipset, it will be reset
when the PCI bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Reviewed-by: Igor Mammedov
Reviewed-by: Li Qiang
Reviewed-by: Michael S. Tsirkin
Signed-of
The following changes since commit 69b81893bc28feb678188fbcdce52eff1609bdad:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191015'
into staging (2019-10-15 18:15:59 +0100)
are available in the Git repository at:
git://github.com/ehabkost/qemu.git tags/ma
From: Tao Xu
Add some comments, clean up comments over 80 chars per line. And there
is an extra line in comment of CPUID_8000_0008_EBX_WBNOINVD, remove
the extra enter and spaces.
Acked-by: Stefano Garzarella
Signed-off-by: Tao Xu
Message-Id: <20190926021055.6970-2-tao3...@intel.com>
[ehabkost
From: Igor Mammedov
Add an API that takes QDict directly, so users could skip steps
of first building json dictionary and converting it back to
QDict in existing qtest_qmp_device_add() and instead use QDict
directly without intermediate conversion.
Signed-off-by: Igor Mammedov
Message-Id: <2019
From: Philippe Mathieu-Daudé
The SiI3112A SATA controller is a PCI device, it will be reset
when the PCI bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191010131527.32513-5-phi.
From: Philippe Mathieu-Daudé
The PIIX4/ISA is a PCI device within the PIIX4 chipset, it will be reset
when the PCI bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191010131527.32
From: Xiaoyao Li
Add new version of Snowridge CPU model that removes MPX feature.
MPX support is being phased out by Intel. GCC has dropped it, Linux kernel
and KVM are also going to do that in the future.
Signed-off-by: Xiaoyao Li
Message-Id: <20191012024748.127135-1-xiaoyao...@intel.com>
Sig
From: Tao Xu
Add MachineClass::auto_enable_numa field. When it is true, a NUMA node
is expected to be created implicitly.
Acked-by: David Gibson
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Reviewed-by: Igor Mammedov
Signed-off-by: Tao Xu
Message-Id: <20190905083238.1799-1-tao3
From: Philippe Mathieu-Daudé
The VIA82C686B IDE controller is a PCI device, it will be reset
when the PCI bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191010131527.32513-6-phi
From: Philippe Mathieu-Daudé
The LM8323 key-scan controller is a I2C device, it will be reset
when the I2C bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191010131527.32513-8-ph
From: Wei Yang
The memory-device list built by memory_device_build_list is ordered by
its address, this means if the tmp range exceed the hinted range, all
the following range will not overlap with it.
And this won't change default pc-dimm mapping and address assignment stay
the same as before t
From: Philippe Mathieu-Daudé
The PIIX/IDE is a PCI device within a PIIX chipset, it will be reset
when the PCI bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191010131527.32513-4-phi...@redhat.com>
Re
From: Wei Yang
We are already at the last condition check.
Signed-off-by: Wei Yang
Reviewed-by: Igor Mammedov
Reviewed-by: David Hildenbrand
Message-Id: <20190730003740.20694-2-richardw.y...@linux.intel.com>
Signed-off-by: Eduardo Habkost
---
hw/mem/memory-device.c | 1 -
1 file changed, 1
From: Philippe Mathieu-Daudé
The VIA VT82C686 Southbridge is a PCI device, it will be reset
when the PCI bus it stands on is reset.
Convert its reset handler into a proper Device reset method.
Reviewed-by: Li Qiang
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20191010131527.32513-7-phi.
From: Tao Xu
Drop the duplicated definition of cpuid AVX512_VBMI macro and rename
it as CPUID_7_0_ECX_AVX512_VBMI. Rename CPUID_7_0_ECX_VBMI2 as
CPUID_7_0_ECX_AVX512_VBMI2.
Acked-by: Stefano Garzarella
Signed-off-by: Tao Xu
Message-Id: <20190926021055.6970-3-tao3...@intel.com>
Reviewed-by: Phi
From: Philippe Mathieu-Daudé
The VM coreinfo device does not sit on a bus, so it won't be
reset automatically. This is why it calls qemu_register_reset().
Add a comment about it, so we don't convert its reset handler
to a DeviceReset method.
Reviewed-by: Marc-André Lureau
Reviewed-by: Li Qiang
KVM has a 80-entry limit at KVM_SET_CPUID2. With the
introduction of CPUID[0x1F], it is now possible to hit this limit
with unusual CPU configurations, e.g.:
$ ./x86_64-softmmu/qemu-system-x86_64 \
-smp 1,dies=2,maxcpus=2 \
-cpu EPYC,check=off,enforce=off \
-machine accel=kvm
qemu
From: Bingsong Si
without kvm commit 412a3c41, CPUID(EAX=0xd,ECX=0).EBX always equal to 0 even
through guest update xcr0, this will crash legacy guest(e.g., CentOS 6).
Below is the call trace on the guest.
[0.00] kernel BUG at mm/bootmem.c:469!
[0.00] invalid opcode: [#1] SM
On 10/15/19 1:39 PM, Evgenii Stepanov wrote:
> Hi,
>
> please find attached three random fixes for instruction translation
> and one for syscall emulation.
Thanks for the patches.
> @@ -2763,7 +2763,8 @@ static void disas_ldst_pair
> return;
> }
>
> -offset <<= size;
> +/
Patchew URL:
https://patchew.org/QEMU/20191015140140.34748-1-zhengxia...@huawei.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN
Patchew URL: https://patchew.org/QEMU/20191015142729.18123-1-mre...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v2 00/21] iotests: Allow ./check -o data_file
Type: series
Message-id: 20191015142729.18123-1-mre...@
On Tue, Oct 15, 2019 at 02:45:15PM +0300, Yuval Shaia wrote:
>On Sun, Oct 13, 2019 at 10:11:45AM +0800, Wei Yang wrote:
>> There are three page size in qemu:
>>
>> real host page size
>> host page size
>> target page size
>>
>> All of them have dedicate variable to represent. For the last t
Signed-off-by: Wei Yang
CC: David Gibson
---
scripts/checkpatch.pl | 6 ++
1 file changed, 6 insertions(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index aa9a354a0e..4b360ed310 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2915,6 +2915,12 @@ sub proces
On Sun, Oct 13, 2019 at 08:28:41PM +1100, David Gibson wrote:
>On Sun, Oct 13, 2019 at 10:11:45AM +0800, Wei Yang wrote:
>> There are three page size in qemu:
>>
>> real host page size
>> host page size
>> target page size
>>
>> All of them have dedicate variable to represent. For the last
On Fri, 11 Oct 2019 13:20:07 +0200
Jens Freimann wrote:
> Only the guest unplug request was triggered. This is needed for
> the failover feature. In case of a failed migration we need to
> plug the device back to the guest.
>
> Signed-off-by: Jens Freimann
> ---
> hw/pci/pci.c | 2 ++
>
On Fri, 11 Oct 2019 13:20:15 +0200
Jens Freimann wrote:
> As usual block all vfio-pci devices from being migrated, but make an
> exception for failover primary devices. This is achieved by setting
> unmigratable to 0 but also add a migration blocker for all vfio-pci
> devices except failover prim
v2:
- use uint32_t rather than int64_t [Juan]
- one more patch (patch 4) to check dup SaveStateEntry [Dave]
- one more patch to define a macro (patch 1) to simplify patch 2
Please review, thanks.
Peter Xu (4):
migration: Define VMSTATE_INSTANCE_ID_ANY
migration: Change SaveStateEntry.instance
Define the new macro VMSTATE_INSTANCE_ID_ANY for callers who wants to
auto-generate the vmstate instance ID. Previously it was hard coded
as -1 instead of this macro. It helps to change this default value in
the follow up patches. No functional change.
Signed-off-by: Peter Xu
---
hw/arm/stell
It was always used as 32bit, so define it as used to be clear.
Instead of using -1 as the auto-gen magic value, we switch to
UINT32_MAX. We also make sure that we don't auto-gen this value to
avoid overflowed instance IDs without being noticed.
Suggested-by: Juan Quintela
Signed-off-by: Peter Xu
Migration is silently broken now with x2apic config like this:
-smp 200,maxcpus=288,sockets=2,cores=72,threads=2 \
-device intel-iommu,intremap=on,eim=on
After migration, the guest kernel could hang at anything, due to
x2apic bit not migrated correctly in IA32_APIC_BASE on some vcpus, s
Before finally register one SaveStateEntry, we detect for duplicated
entries. This could be helpful to notify us asap instead of get
silent migration failures which could be hard to diagnose.
For example, this patch will generate a message like this (if without
previous fixes on x2apic) as long a
On Wed, Oct 16, 2019 at 10:29:32AM +0800, Peter Xu wrote:
> Migration is silently broken now with x2apic config like this:
>
> -smp 200,maxcpus=288,sockets=2,cores=72,threads=2 \
> -device intel-iommu,intremap=on,eim=on
>
> After migration, the guest kernel could hang at anything, due t
On Tue, Sep 17, 2019 at 08:31:40PM -0300, Eduardo Habkost wrote:
> On Mon, Jul 01, 2019 at 07:25:27PM -0300, Eduardo Habkost wrote:
> > On Mon, Jun 10, 2019 at 01:58:50PM +0100, Peter Maydell wrote:
[...]
> > > The configure check also spits out deprecation warnings for
> > > the NetBSD/FreeBSD/Ope
On 2019/10/15 23:08, Peter Maydell wrote:
> On Tue, 15 Oct 2019 at 15:02, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Add APEI/GHES detailed design document
>>
>> Signed-off-by: Dongjiu Geng
>> Signed-off-by: Xiang Zheng
>> ---
>> docs/specs/acpi_hest_ghes.rst | 94
>> +++
Patchew URL: https://patchew.org/QEMU/20191015162705.28087-1-phi...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH 00/32] hw/i386/pc: Split PIIX3 southbridge from i440FX
northbridge
Type: series
Message-id: 20191015
Patchew URL:
https://patchew.org/QEMU/1571163625-642312-1-git-send-email-andrey.shinkev...@virtuozzo.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=
Patchew URL:
https://patchew.org/QEMU/1571163625-642312-1-git-send-email-andrey.shinkev...@virtuozzo.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
On 16/10/2019 05.00, Eduardo Habkost wrote:
> On Tue, Sep 17, 2019 at 08:31:40PM -0300, Eduardo Habkost wrote:
>> On Mon, Jul 01, 2019 at 07:25:27PM -0300, Eduardo Habkost wrote:
>>> On Mon, Jun 10, 2019 at 01:58:50PM +0100, Peter Maydell wrote:
> [...]
The configure check also spits out depre
On Tue, 10/15 12:38, Klaus Jensen wrote:
> Hi,
>
> (Quick note to Fam): most of this series is irrelevant to you as the
> maintainer of the nvme block driver, but patch "nvme: add support for
> scatter gather lists" touches block/nvme.c due to changes in the shared
> NvmeCmd struct.
Yeah, that pa
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