[PATCH 3/4] xics: Rename misleading ics_simple_*() functions

2019-09-23 Thread David Gibson
There are a number of ics_simple_*() functions that aren't actually specific to TYPE_XICS_SIMPLE at all, and are equally valid on TYPE_XICS_BASE. Rename them to ics_*() accordingly. Signed-off-by: David Gibson --- hw/intc/trace-events | 6 +++--- hw/intc/xics.c| 29 ++-

[PATCH] target/riscv: Bugfix reserved bits in PTE for RV64

2019-09-23 Thread guoren
From: Guo Ren Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we need to ignore them. They can not be a part of ppn. 1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture 4.4 Sv39: Page-Based 39-bit Virtual-Memory System 4.5 Sv48: Page-Based 48-bit

Re: [PATCH] target/riscv: Bugfix reserved bits in PTE for RV64

2019-09-23 Thread Alistair Francis
On Mon, Sep 23, 2019 at 10:01 PM wrote: > > From: Guo Ren > > Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we > need to ignore them. They can not be a part of ppn. > > 1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture >4.4 Sv39: Page-Based 39-bi

[PATCH 2/4] xics: Merge reset and realize hooks

2019-09-23 Thread David Gibson
Currently TYPE_XICS_BASE and TYPE_XICS_SIMPLE have their own reset and realize methods, using the standard technique for having the subtype call the supertype's methods before doing its own thing. But TYPE_XICS_SIMPLE is the only subtype of TYPE_XICS_BASE ever instantiated, so there's no point hav

[PATCH 4/4] xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes

2019-09-23 Thread David Gibson
TYPE_ICS_SIMPLE is the only subtype of TYPE_ICS_BASE that's ever instantiated, and the only one we're ever likely to want. The existence of different classes is just a hang over from when we (misguidedly) had separate subtypes for the KVM and non-KVM version of the device. So, collapse the two cl

Re: [PATCH 0/4] xics: Eliminate unnecessary class

2019-09-23 Thread Cédric Le Goater
On 24/09/2019 06:59, David Gibson wrote: > The XICS interrupt controller device used to have separate subtypes > for the KVM and non-KVM variant of the device. That was a bad idea, > because it leaked information that should be entirely host-side > implementation specific to the kinda-sorta guest

Re: [PATCH 1/4] xics: Eliminate 'reject', 'resend' and 'eoi' class hooks

2019-09-23 Thread Cédric Le Goater
On 24/09/2019 06:59, David Gibson wrote: > Currently ics_reject(), ics_resend() and ics_eoi() indirect through > class methods. But there's only one implementation of each method, > the one in TYPE_ICS_SIMPLE. TYPE_ICS_BASE has no implementation, but > it's never instantiated, and has no other su

Re: [PATCH 2/4] xics: Merge reset and realize hooks

2019-09-23 Thread Cédric Le Goater
On 24/09/2019 06:59, David Gibson wrote: > Currently TYPE_XICS_BASE and TYPE_XICS_SIMPLE have their own reset and > realize methods, using the standard technique for having the subtype > call the supertype's methods before doing its own thing. > > But TYPE_XICS_SIMPLE is the only subtype of TYPE_X

Re: [PATCH 3/4] xics: Rename misleading ics_simple_*() functions

2019-09-23 Thread Cédric Le Goater
On 24/09/2019 06:59, David Gibson wrote: > There are a number of ics_simple_*() functions that aren't actually > specific to TYPE_XICS_SIMPLE at all, and are equally valid on > TYPE_XICS_BASE. Rename them to ics_*() accordingly. > > Signed-off-by: David Gibson Reviewed-by: Cédric Le Goater C

Re: [PATCH 4/4] xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes

2019-09-23 Thread Cédric Le Goater
On 24/09/2019 06:59, David Gibson wrote: > TYPE_ICS_SIMPLE is the only subtype of TYPE_ICS_BASE that's ever > instantiated, and the only one we're ever likely to want. The > existence of different classes is just a hang over from when we > (misguidedly) had separate subtypes for the KVM and non-KV

[Bug 1842774] Re: Enhanced Hardware Support - Finalize Naming

2019-09-23 Thread Thomas Huth
Patch a0e2251132995b9 is a kernel patch, thus this is certainly not something we need to track in the upstream QEMU bugtracker. ** No longer affects: qemu -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bug

[Bug 1842916] Re: [18.04 FEAT] Enhanced Hardware Support - Finalize Naming

2019-09-23 Thread Thomas Huth
*** This bug is a duplicate of bug 1842774 *** https://bugs.launchpad.net/bugs/1842774 ** No longer affects: qemu -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1842916 Title: [18.04 FEAT] Enha

[Bug 1824704] Re: -k tr not working after v20171217! turkish keyboard dont working

2019-09-23 Thread Thomas Huth
Can you find out which commit broke the keyboard for you? (By using "git bisect" for example) ** Information type changed from Private Security to Public -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs

Re: [Bug 1824704] Re: -k tr not working after v20171217! turkish keyboard dont working

2019-09-23 Thread mustafa
24 Eylül 2019 Salı tarihinde Thomas Huth <1824...@bugs.launchpad.net> yazdı: > Can you find out which commit broke the keyboard for you? (By using "git > bisect" for example) > > ** Information type changed from Private Security to Public > > -- > You received this bug notification because you are

[PULL 00/16] Audio 20190924 patches

2019-09-23 Thread Gerd Hoffmann
The following changes since commit 4300b7c2cd9f3f273804e8cca325842ccb93b1ad: Merge remote-tracking branch 'remotes/cleber/tags/python-next-pull-request' into staging (2019-09-20 17:28:43 +0100) are available in the Git repository at: git://git.kraxel.org/qemu tags/audio-20190924-pull-reques

[PULL 01/16] audio: fix buffer-length typo in documentation

2019-09-23 Thread Gerd Hoffmann
From: Stefan Hajnoczi Fixes: f0b3d811529 ("audio: -audiodev command line option: documentation") Signed-off-by: Stefan Hajnoczi Message-Id: <20190918095335.7646-2-stefa...@redhat.com> Signed-off-by: Gerd Hoffmann --- qemu-options.hx | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) di

[PULL 07/16] noaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 10eebdd2e1529c2bd403ef98dd9d346c6d4ca3d1.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/noaudio.c | 39 +++ 1 file changed, 15 insertions(+), 24 deletions(-) diff

[PULL 02/16] audio: fix ALSA period-length typo in documentation

2019-09-23 Thread Gerd Hoffmann
From: Stefan Hajnoczi Fixes: f0b3d811529 ("audio: -audiodev command line option: documentation") Signed-off-by: Stefan Hajnoczi Message-Id: <20190918095335.7646-4-stefa...@redhat.com> Signed-off-by: Gerd Hoffmann --- qemu-options.hx | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) di

[PULL 03/16] audio: api for mixeng code free backends

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán This will make it possible to skip mixeng with audio playback and recording, allowing us to free ourselves from the limitations of the current mixeng (stereo, int64 samples only). In this case, HW and SW voices will be essentially the same, for every SW voice we will create

[PULL 04/16] alsaaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: ab9768e73dfe7b7305bd6a51629846e0d77622a5.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/alsaaudio.c | 308 +- 1 file changed, 83 insertions(+), 225 deletion

[PULL 14/16] audio: unify input and output mixeng buffer management

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Usage notes: hw->samples became hw->{mix,conv}_buf->size, except before initialization (audio_pcm_hw_alloc_resources_*), hw->samples gives the initial size of the STSampleBuffer. The next commit tries to fix this inconsistency. Signed-off-by: Kővágó, Zoltán Message-id: a7

[PULL 05/16] coreaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 586a1e66de5cbc6c5234f9ae556d24befb6afada.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/coreaudio.c | 130 -- 1 file changed, 69 insertions(+), 61 deletions

[PULL 12/16] wavaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: eede77aeb9c17b379948b0b6d2ac10f45d74fa62.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/wavaudio.c | 54 1 file changed, 9 insertions(+), 45 deletions(

[PULL 06/16] dsoundaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 2ca925ab551ea832c930fc2db213a9e73d8dab7f.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/dsound_template.h | 47 +++--- audio/dsoundaudio.c | 329 ++-- 2 files

[PULL 10/16] sdlaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: ac1722a03fb1b530c2081f46585ce7fa80ebef6c.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/sdlaudio.c | 87 +++- 1 file changed, 42 insertions(+), 45 deletions

[PULL 13/16] audio: remove remains of the old backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 497decab6d0f0fb9529bea63ec7ce0bd7b553038.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/audio_int.h | 7 --- audio/audio.c | 42 ++ 2 files changed, 6

[PULL 11/16] spiceaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 4d3356df9ccbffee2f710b93d456443c81e3f011.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/spiceaudio.c | 116 - 1 file changed, 42 insertions(+), 74 deletions

[PULL 15/16] audio: common rate control code for timer based outputs

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán This commit removes the ad-hoc rate-limiting code from noaudio and wavaudio, and replaces them with a (slightly modified) code from spiceaudio. This way multiple write calls (for example when the circular buffer wraps around) do not cause problems. Signed-off-by: Kővágó, Zo

[PULL 09/16] paaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 21fe8f2cf949039c8c40a0352590c593b104917d.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- configure| 5 - audio/audio_pt_int.h | 22 --- audio/audio_pt_int.c | 173 audio/p

[PULL 08/16] ossaudio: port to the new audio backend api

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán Signed-off-by: Kővágó, Zoltán Message-id: 22ab335146acd8099779583edcf6ed46de836bd6.1568927990.git.dirty.ice...@gmail.com Signed-off-by: Gerd Hoffmann --- audio/ossaudio.c | 288 +-- 1 file changed, 104 insertions(+), 184 deletio

[PULL 16/16] audio: split ctl_* functions into enable_* and volume_*

2019-09-23 Thread Gerd Hoffmann
From: Kővágó, Zoltán This way we no longer need vararg functions, improving compile time error detection. Also now it's possible to check actually what commands are supported, without needing to manually update ctl_caps. Signed-off-by: Kővágó, Zoltán Message-id: 2b08b3773569c5be055d0a0fb2f29f

[PULL 1/5] pc-bios/s390-ccw: Do not pre-initialize empty array

2019-09-23 Thread Christian Borntraeger
From: Thomas Huth Since commit 339686a358b11a231aa5b6d1424e7a1460d7f277 ("pc-bios/s390-ccw: zero out bss section"), we are clearing now the BSS in start.S, so there is no need to pre-initialize the loadparm_str array with zeroes anymore. Reviewed-by: Cornelia Huck Signed-off-by: Thomas Huth --

[PULL 0/5] s390x update

2019-09-23 Thread Christian Borntraeger
ository at: git://github.com/borntraeger/qemu.git tags/s390x-20190923 for you to fetch changes up to 7505deca0bfa859136ec6419dbafc504f22fcac2: s390x/cpumodel: Add the z15 name to the description of gen15a (2019-09-23 09:1

[PULL 2/5] pc-bios/s390-ccw/net: fix a possible memory leak in get_uuid()

2019-09-23 Thread Christian Borntraeger
From: Yifan Luo There is a possible memory leak in get_uuid(). Should free allocated mem before return NULL. Signed-off-by: Yifan Luo Message-Id: <02cf01d55267$86cf2850$946d78f0$@cmss.chinamobile.com> Reviewed-by: Thomas Huth Reviewed-by: Cornelia Huck Signed-off-by: Thomas Huth --- pc-bios

[PULL 5/5] s390x/cpumodel: Add the z15 name to the description of gen15a

2019-09-23 Thread Christian Borntraeger
We now know that gen15a is called z15. Reviewed-by: David Hildenbrand Signed-off-by: Christian Borntraeger --- target/s390x/cpu_models.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 1d16d7d5e794..009afc38b92d 100

[PULL 4/5] s390x/kvm: Officially require at least kernel 3.15

2019-09-23 Thread Christian Borntraeger
From: Thomas Huth Since QEMU v2.10, the KVM acceleration does not work on older kernels anymore since the code accidentally requires the KVM_CAP_DEVICE_CTRL capability now - it should have been optional instead. Instead of fixing the bug, we asked in the ChangeLog of QEMU 2.11 - 3.0 that people s

[PULL 3/5] pc-bios/s390-ccw: Rebuild the s390-netboot.img firmware image

2019-09-23 Thread Christian Borntraeger
From: Thomas Huth The new image now contains the "pc-bios/s390-ccw/net: fix a possible memory leak in get_uuid()" patch. Signed-off-by: Thomas Huth --- pc-bios/s390-netboot.img | Bin 67232 -> 67232 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/pc-bios/s390-netboot.img b/

Re: [PATCH v3 1/2] vfio: Turn the container error into an Error handle

2019-09-23 Thread Peter Xu
On Mon, Sep 23, 2019 at 08:55:51AM +0200, Eric Auger wrote: > The container error integer field is currently used to store > the first error potentially encountered during any > vfio_listener_region_add() call. However this fails to propagate > detailed error messages up to the vfio_connect_contain

Re: [PATCH v3 2/2] memory: allow memory_region_register_iommu_notifier() to fail

2019-09-23 Thread Peter Xu
On Mon, Sep 23, 2019 at 08:55:52AM +0200, Eric Auger wrote: > Currently, when a notifier is attempted to be registered and its > flags are not supported (especially the MAP one) by the IOMMU MR, > we generally abruptly exit in the IOMMU code. The failure could be > handled more nicely in the caller

Re: [PATCH v3 1/2] target/i386: clean up comments over 80 chars per line

2019-09-23 Thread Stefano Garzarella
On Mon, Sep 23, 2019 at 02:30:40PM +0800, Tao Xu wrote: > Add some comments, clean up comments over 80 chars per line. And there > is an extra line in comment of CPUID_8000_0008_EBX_WBNOINVD, remove > the extra enter and spaces. > > Signed-off-by: Tao Xu > --- > target/i386/cpu.h | 164 +

[PULL 01/30] s390x/tcg: Reset exception_index to -1 instead of 0

2019-09-23 Thread David Hildenbrand
We use the marker "-1" for "no exception". s390_cpu_do_interrupt() might get confused by that. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/s390x/mem_helper.c b/targ

[PULL 05/30] s390x/tcg: MVC: Increment the length once

2019-09-23 Thread David Hildenbrand
Let's increment the length once. While at it, cleanup the comment. The memset() example is given as a programming note in the PoP, so drop the description. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 20 1 file changed, 1

[PULL 06/30] s390x/tcg: MVC: Use is_destructive_overlap()

2019-09-23 Thread David Hildenbrand
Let's use the new helper, that also detects destructive overlaps when wrapping. We'll make the remaining code (e.g., fast_memmove()) aware of wrapping later. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 2 +- 1 file changed, 1 insertion(+), 1

[PULL 00/30] s390x/tcg update

2019-09-23 Thread David Hildenbrand
Hi Peter, here is the updated tcg subset of the s390x update (including one more test). The following changes since commit 4300b7c2cd9f3f273804e8cca325842ccb93b1ad: Merge remote-tracking branch 'remotes/cleber/tags/python-next-pull-request' into staging (2019-09-20 17:28:43 +0100) are availa

[PULL 09/30] s390x/tcg: MVCLU/MVCLE: Process max 4k bytes at a time

2019-09-23 Thread David Hildenbrand
Let's stay within single pages. ... and indicate cc=3 in case there is work remaining. Keep unicode padding simple. While reworking, properly wrap the addresses. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 54 ++--

[PULL 07/30] s390x/tcg: MVPG: Check for specification exceptions

2019-09-23 Thread David Hildenbrand
Perform the checks documented in the PoP. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index c31cf49593..7dfa848744 100644 --- a/targ

[PULL 04/30] s390x/tcg: MVCL: Process max 4k bytes at a time

2019-09-23 Thread David Hildenbrand
Process max 4k bytes at a time, writing back registers between the accesses. The instruction is interruptible. "For operands longer than 2K bytes, access exceptions are not recognized for locations more than 2K bytes beyond the current location being processed." Note that on z/Architect

[PULL 02/30] s390x/tcg: MVCL: Zero out unused bits of address

2019-09-23 Thread David Hildenbrand
We have to zero out unused bits in 24 and 31-bit addressing mode. Provide a new helper. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/target/s390x/mem_hel

[PULL 08/30] s390x/tcg: MVPG: Properly wrap the addresses

2019-09-23 Thread David Hildenbrand
We have to mask of any unused bits. While at it, document what exactly is missing. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s39

[PULL 11/30] s390x/tcg: MVCOS: Lengths are 32 bit in 24/31-bit mode

2019-09-23 Thread David Hildenbrand
Triggered by a review comment from Richard, also MVCOS has a 32-bit length in 24/31-bit addressing mode. Add a new helper. Rename wrap_length() to wrap_length31(). Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 14 +++--- 1 file changed,

[PULL 12/30] s390x/tcg: MVCS/MVCP: Properly wrap the length

2019-09-23 Thread David Hildenbrand
... and don't perform any move in case the length is zero. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 320e9ee65c..41d7336a1a 1

[PULL 03/30] s390x/tcg: MVCL: Detect destructive overlaps

2019-09-23 Thread David Hildenbrand
We'll have to zero-out unused bit positions, so make sure to write the addresses back. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/target/s390x/mem_helper.c

[PULL 25/30] s390x/tcg: MVN: Fault-safe handling

2019-09-23 Thread David Hildenbrand
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c i

[PULL 18/30] s390x/tcg: MVCS/MVCP: Use access_memmove()

2019-09-23 Thread David Hildenbrand
As we are moving between address spaces, we can use access_memmove() without checking for destructive overlaps (especially of real storage locations): "Each storage operand is processed left to right. The storage-operand-consistency rules are the same as for MOVE (MVC), except that when

[PULL 20/30] s390x/tcg: MVCLU: Fault-safe handling

2019-09-23 Thread David Hildenbrand
The last remaining bit is padding with two bytes. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index aed53a37da..271

[PULL 10/30] s390x/tcg: MVCS/MVCP: Check for special operation exceptions

2019-09-23 Thread David Hildenbrand
Let's perform the documented checks. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 12 1 file changed, 12 insertions(+) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 86238e0163..20e1ac0ea9 100644 --- a/ta

[PULL 21/30] s390x/tcg: OC: Fault-safe handling

2019-09-23 Thread David Hildenbrand
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c i

[PULL 13/30] s390x/tcg: MVST: Check for specification exceptions

2019-09-23 Thread David Hildenbrand
Bit position 32-55 of general register 0 must be zero. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 41d7336a1a..ec27be174b 100644 -

Re: [PATCH v3 00/20] Move rom and notdirty handling to cputlb

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Ok! Third time is the charm, because this time it works. Yeay :) I don't wanna know how hard it was to debug that... > > New to v3: > > * Covert io_mem_rom with a new TLB_ROM bit. > > * This in turn means that there are no longer any special R

[PULL 30/30] tests/tcg: target/s390x: Test MVC

2019-09-23 Thread David Hildenbrand
Let's add a test that especially verifies that no data will be touched in case we cross page boundaries and one page access triggers a fault. Before the fault-safe handling fixes, the test failes with: TESTmvc on s390x data modified during a fault make[2]: *** [../Makefile.target

[PULL 22/30] s390x/tcg: XC: Fault-safe handling

2019-09-23 Thread David Hildenbrand
We can process a maximum of 256 bytes, crossing two pages. While at it, increment the length once. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/target/s390x/m

[PULL 14/30] s390x/tcg: MVST: Fix storing back the addresses to registers

2019-09-23 Thread David Hildenbrand
24 and 31-bit address space handling is wrong when it comes to storing back the addresses to the register. While at it, read gprs 0 implicitly. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 2 +- target/s390x/insn-data.def | 2 +- target/s39

illegal hardware instruction during MIPS-I ELF linux user emulation

2019-09-23 Thread Libo Zhou
Hi all, I have an binary file generated by a cross compiler. The 'file' command says $ file test test: ELF 32-bit LSB LSB executable, MIPS, MIPS-I version 1 (SYSV), statically linked, with debug_info, not stripped. When I executed it with $./qemu-mipsel test qemu: uncaught target signal 4 (Ill

[PULL 23/30] s390x/tcg: NC: Fault-safe handling

2019-09-23 Thread David Hildenbrand
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c i

[PULL 15/30] s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLY

2019-09-23 Thread David Hildenbrand
Although we basically ignore the index all the time for CONFIG_USER_ONLY, let's simply skip all the checks and always return MMU_USER_IDX in cpu_mmu_index() and get_mem_index(). Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 4 target/s390x/t

Re: [PATCH v3 01/20] exec: Use TARGET_PAGE_BITS_MIN for TLB flags

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > These bits do not need to vary with the actual page size > used by the guest. > > Reviewed-by: Paolo Bonzini > Signed-off-by: Richard Henderson > --- > include/exec/cpu-all.h | 16 ++-- > 1 file changed, 10 insertions(+), 6 deletions(-)

[PULL 24/30] s390x/tcg: MVCIN: Fault-safe handling

2019-09-23 Thread David Hildenbrand
We can process a maximum of 256 bytes, crossing two pages. Calculate the accessed range upfront - src is accessed right-to-left. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-)

[PULL 16/30] s390x/tcg: Fault-safe memset

2019-09-23 Thread David Hildenbrand
Replace fast_memset() by access_memset(), that first tries to probe access to all affected pages (maximum is two). We'll use the same mechanism for other types of accesses soon. Only in very rare cases (especially TLB_NOTDIRTY), we'll have to fallback to ld/st helpers. Try to speed up that case as

Re: [PATCH v3 05/20] exec: Promote TARGET_PAGE_MASK to target_long

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > There are some uint64_t uses that expect TARGET_PAGE_MASK to > extend for a 32-bit, so this must continue to be a signed type. > Define based on TARGET_PAGE_BITS not TARGET_PAGE_SIZE; this > will make a following patch more clear. > > This should not h

[PULL 17/30] s390x/tcg: Fault-safe memmove

2019-09-23 Thread David Hildenbrand
Replace fast_memmove() variants by access_memmove() variants, that first try to probe access to all affected pages (maximum is two pages). Introduce access_get_byte()/access_set_byte(). We might be able to speed up memmove in special cases even further (do single-byte access, use memmove() for rem

[PULL 27/30] s390x/tcg: MVST: Fault-safe handling

2019-09-23 Thread David Hildenbrand
Access at most single pages and document why. Using the access helpers might over-indicate watchpoints within the same page, I guess we can live with that. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 24 +--- 1 file changed

Re: [PATCH v3 06/20] exec: Tidy TARGET_PAGE_ALIGN

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Use TARGET_PAGE_MASK twice instead of TARGET_PAGE_SIZE once. > This is functionally identical, but will help a following patch. > > Reviewed-by: Paolo Bonzini > Signed-off-by: Richard Henderson > --- > include/exec/cpu-all.h | 3 ++- > 1 file change

[PULL 28/30] s390x/tcg: MVO: Fault-safe handling

2019-09-23 Thread David Hildenbrand
Each operand can have a maximum length of 16. Make sure to prepare all reads/writes before writing. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 27 +++ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/tar

[PULL 19/30] s390x/tcg: MVC: Fault-safe handling on destructive overlaps

2019-09-23 Thread David Hildenbrand
The last remaining bit for MVC is handling destructive overlaps in a fault-safe way. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/me

[PULL 29/30] tests/tcg: target/s390x: Test MVO

2019-09-23 Thread David Hildenbrand
Let's add the simple test based on the example from the PoP. Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: David Hildenbrand --- tests/tcg/s390x/Makefile.target | 1 + tests/tcg/s390x/mvo.c | 25 + 2 files changed, 26 insertions(+) c

Re: [PATCH v3 2/2] target/i386: drop the duplicated definition of cpuid AVX512_VBMI marco

2019-09-23 Thread Stefano Garzarella
On Mon, Sep 23, 2019 at 02:30:41PM +0800, Tao Xu wrote: > Drop the duplicated definition of cpuid AVX512_VBMI marco and rename it > as CPUID_7_0_ECX_AVX512_VBMI. > > Signed-off-by: Tao Xu > --- > target/i386/cpu.c | 4 ++-- > target/i386/cpu.h | 3 +-- > target/i386/hvf/x86_c

[PATCH qemu] ppc/kvm: Skip writing DPDES back when in run time state

2019-09-23 Thread Alexey Kardashevskiy
On POWER8 systems the Directed Privileged Door-bell Exception State register (DPDES) stores doorbell pending status, one bit per a thread of a core, set by "msgsndp" instruction. The register is shared among threads of the same core and KVM on POWER9 emulates it in a similar way (POWER9 does not ha

Re: [PATCH v6 0/8] Add Qemu to SeaBIOS LCHS interface

2019-09-23 Thread Sam Eiderman via
Gentle ping On Wed, Sep 11, 2019 at 5:36 PM Sam Eiderman wrote: > > Gentle ping > > On Tue, Aug 27, 2019, 11:24 Sam Eiderman wrote: >> >> v1: >> >> Non-standard logical geometries break under QEMU. >> >> A virtual disk which contains an operating system which depends on >> logical geometries (co

[PULL 26/30] s390x/tcg: MVZ: Fault-safe handling

2019-09-23 Thread David Hildenbrand
We can process a maximum of 256 bytes, crossing two pages. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c i

Re: [PATCH v3 02/20] exec: Split out variable page size support to exec-vary.c

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > The next patch will play a trick with "const" that will > confuse the compiler about the uses of target_page_bits > within exec.c. Moving everything to a new file prevents > this confusion. > > No functional change so far. > > Reviewed-by: Philippe M

Re: [PATCH] hw/arm/boot: Use the IEC binary prefix definitions

2019-09-23 Thread Stefano Garzarella
On Sat, Sep 21, 2019 at 12:34:04PM +0200, Philippe Mathieu-Daudé wrote: > IEC binary prefixes ease code review: the unit is explicit. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/boot.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/hw/arm/boot.c b/

Re: [PATCH 0/4] Make it possible to compile with CONFIG_ARM_V7M=n

2019-09-23 Thread Thomas Huth
On 23/09/2019 10.37, Philippe Mathieu-Daudé wrote: > Hi Thomas, > > On 9/21/19 5:04 PM, Thomas Huth wrote: >> We've got CONFIG_ARM_V7M, but it currently can't be disabled. >> Here are some patches that should allow to disable the switch >> (if the corresponding boards are disabled, too). > > What

Re: [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Add a function parameter to perform the actual load/store to ram. > With optimization, this results in identical code. > > Signed-off-by: Richard Henderson > --- > accel/tcg/cputlb.c | 159 +++-- > 1 file chang

Re: [PATCH v3 10/20] cputlb: Introduce TLB_BSWAP

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Handle bswap on ram directly in load/store_helper. This fixes a > bug with the previous implementation in that one cannot use the > I/O path for RAM. > > Fixes: a26fc6f5152b47f1 > Signed-off-by: Richard Henderson > --- > include/exec/cpu-all.h | 4

Re: [PATCH v3 20/20] cputlb: Pass retaddr to tb_check_watchpoint

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Fixes the previous TLB_WATCHPOINT patches because we are currently > failing to set cpu->mem_io_pc with the call to cpu_check_watchpoint. > Pass down the retaddr directly because it's readily available. > > Fixes: 50b107c5d61 > Signed-off-by: Richard H

Re: [PATCH v3 2/2] target/i386: drop the duplicated definition of cpuid AVX512_VBMI marco

2019-09-23 Thread Tao Xu
On 9/23/2019 4:08 PM, Stefano Garzarella wrote: On Mon, Sep 23, 2019 at 02:30:41PM +0800, Tao Xu wrote: Drop the duplicated definition of cpuid AVX512_VBMI marco and rename it as CPUID_7_0_ECX_AVX512_VBMI. Signed-off-by: Tao Xu --- target/i386/cpu.c | 4 ++-- target/i386/cpu.h

Re: [PATCH v3 07/20] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > This eliminates a set of runtime shifts. It turns out that we > require TARGET_PAGE_MASK more often than TARGET_PAGE_SIZE, so > redefine TARGET_PAGE_SIZE based on TARGET_PAGE_MASK instead of > the other way around. > > Reviewed-by: Paolo Bonzini > Si

Re: [PATCH 0/4] Make it possible to compile with CONFIG_ARM_V7M=n

2019-09-23 Thread Philippe Mathieu-Daudé
Hi Thomas, On 9/21/19 5:04 PM, Thomas Huth wrote: > We've got CONFIG_ARM_V7M, but it currently can't be disabled. > Here are some patches that should allow to disable the switch > (if the corresponding boards are disabled, too). What about the ARMv4/v5/v6/v7r?

Re: [PATCH v3 12/20] cputlb: Move ROM handling from I/O path to TLB path

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > It does not require going through the whole I/O path > in order to discard a write. > > Signed-off-by: Richard Henderson > --- > include/exec/cpu-all.h| 5 - > include/exec/cpu-common.h | 1 - > accel/tcg/cputlb.c| 35 ++

Re: [PATCH v3 17/20] cputlb: Remove cpu->mem_io_vaddr

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > With the merge of notdirty handling into store_helper, > the last user of cpu->mem_io_vaddr was removed. > > Signed-off-by: Richard Henderson > --- > include/hw/core/cpu.h | 2 -- > accel/tcg/cputlb.c| 2 -- > hw/core/cpu.c | 1 - > 3 fil

Re: [PATCH v3 13/20] cputlb: Move NOTDIRTY handling from I/O path to TLB path

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Pages that we want to track for NOTDIRTY are RAM. We do not > really need to go through the I/O path to handle them. > > Signed-off-by: Richard Henderson > --- > include/exec/cpu-common.h | 2 -- > accel/tcg/cputlb.c| 26 +--

Re: [PATCH v3 18/20] cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > All callers pass false to this argument. Remove it and pass the > constant on to tb_invalidate_phys_page_range__locked. > > Signed-off-by: Richard Henderson > --- > accel/tcg/translate-all.h | 3 +-- > accel/tcg/translate-all.c | 6 ++ > exec.c

Re: [PATCH] hw/arm/boot: Use the IEC binary prefix definitions

2019-09-23 Thread Philippe Mathieu-Daudé
On 9/23/19 10:29 AM, Stefano Garzarella wrote: > On Sat, Sep 21, 2019 at 12:34:04PM +0200, Philippe Mathieu-Daudé wrote: >> IEC binary prefixes ease code review: the unit is explicit. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> hw/arm/boot.c | 8 >> 1 file changed, 4 insertions

Re: [PATCH v1 6/6] riscv/virt: Jump to pflash if specified

2019-09-23 Thread Philippe Mathieu-Daudé
On 9/20/19 7:15 AM, Bin Meng wrote: > On Fri, Sep 20, 2019 at 6:35 AM Alistair Francis > wrote: >> >> If the user supplied pflash to QEMU then change the reset code to jump >> to the pflash base address instead of the DRAM base address. >> >> Signed-off-by: Alistair Francis >> --- >> hw/riscv/vi

Re: [PATCH] hw/arm/boot: Use the IEC binary prefix definitions

2019-09-23 Thread Stefano Garzarella
On Mon, Sep 23, 2019 at 10:43:12AM +0200, Philippe Mathieu-Daudé wrote: > On 9/23/19 10:29 AM, Stefano Garzarella wrote: > > On Sat, Sep 21, 2019 at 12:34:04PM +0200, Philippe Mathieu-Daudé wrote: > >> IEC binary prefixes ease code review: the unit is explicit. > >> > >> Signed-off-by: Philippe Mat

Re: [PATCH v3 19/20] cputlb: Pass retaddr to tb_invalidate_phys_page_fast

2019-09-23 Thread David Hildenbrand
On 22.09.19 05:54, Richard Henderson wrote: > Rather than rely on cpu->mem_io_pc, pass retaddr down directly. > > Within tb_invalidate_phys_page_range__locked, the is_cpu_write_access > parameter is non-zero exactly when retaddr would be non-zero, so that > is a simple replacement. > > Recognize

Re: [PATCH 0/4] Make it possible to compile with CONFIG_ARM_V7M=n

2019-09-23 Thread Philippe Mathieu-Daudé
On 9/23/19 10:50 AM, Thomas Huth wrote: > On 23/09/2019 10.37, Philippe Mathieu-Daudé wrote: >> Hi Thomas, >> >> On 9/21/19 5:04 PM, Thomas Huth wrote: >>> We've got CONFIG_ARM_V7M, but it currently can't be disabled. >>> Here are some patches that should allow to disable the switch >>> (if the cor

Re: [PATCH v3 11/20] exec: Adjust notdirty tracing

2019-09-23 Thread Philippe Mathieu-Daudé
On 9/22/19 5:54 AM, Richard Henderson wrote: > The memory_region_tb_read tracepoint is unreachable, since notdirty > is supposed to apply only to writes. The memory_region_tb_write > tracepoint is mis-named, because notdirty is not only used for TB > invalidation. It is also used for e.g. VGA RAM

Re: [PATCH v3 08/20] cputlb: Disable __always_inline__ without optimization

2019-09-23 Thread Philippe Mathieu-Daudé
On 9/22/19 5:54 AM, Richard Henderson wrote: > This forced inlining can result in missing symbols, > which makes a debugging build harder to follow. > > Reviewed-by: David Hildenbrand > Reported-by: Peter Maydell > Signed-off-by: Richard Henderson > --- > include/qemu/compiler.h | 11 +

Re: [Qemu-devel] [RFC] contrib: add vhost-user-sim

2019-09-23 Thread Stefan Hajnoczi
On Tue, Sep 17, 2019 at 02:26:44PM +0200, Johannes Berg wrote: > +static int unix_sock_new(const char *unix_fn) > +{ > +int sock; > +struct sockaddr_un un; > +size_t len; > + > +g_assert(unix_fn); > + > +sock = socket(AF_UNIX, SOCK_STREAM, 0); > +if (sock <= 0) { > +

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