We have to mask of any unused bits. While at it, document what exactly is
missing.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s39
Let's add the simple test based on the example from the PoP.
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: David Hildenbrand
---
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/mvo.c | 25 +
2 files changed, 26 insertions(+)
c
Replace fast_memset() by access_memset(), that first tries to probe
access to all affected pages (maximum is two). We'll use the same
mechanism for other types of accesses soon.
Only in very rare cases (especially TLB_NOTDIRTY), we'll have to
fallback to ld/st helpers. Try to speed up that case as
Let's stay within single pages.
... and indicate cc=3 in case there is work remaining. Keep unicode
padding simple.
While reworking, properly wrap the addresses.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 54 ++--
On 9/18/19 7:35 AM, Alex Bennée wrote:
>
> John Snow writes:
>
>> We spelled it debian-9-mxe, but the image is debian9-mxe.
>>
>> Signed-off-by: John Snow
>
> I'll merge this fix with the other typo fix while I'm at it. Thanks.
>
ACK
thanks!
24 and 31-bit address space handling is wrong when it comes to storing
back the addresses to the register.
While at it, read gprs 0 implicitly.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 +-
target/s390x/insn-data.def | 2 +-
target/s39
We can process a maximum of 256 bytes, crossing two pages. While at it,
increment the length once.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/target/s390x/m
As we are moving between address spaces, we can use access_memmove()
without checking for destructive overlaps (especially of real storage
locations):
"Each storage operand is processed left to right. The
storage-operand-consistency rules are the same as
for MOVE (MVC), except that when
Although we basically ignore the index all the time for CONFIG_USER_ONLY,
let's simply skip all the checks and always return MMU_USER_IDX in
cpu_mmu_index() and get_mem_index().
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/cpu.h | 4
target/s390x/t
This adds two new tests that re-use the memory test to check basic
record replay functionality is still working. We have to define our
own runners rather than using the default pattern as we want to change
the test name but re-use the memory binary.
We declare the test binaries as PHONY as they do
12.09.2019 16:56, Max Reitz wrote:
> Hi,
>
> The fix (patch 1) is pretty straightforward; patch 2 (which I need for
> the test) may not be.
>
> The biggest problem with patch 2 is that you can use it to uncover where
> our permission handling is broken. For example, devising the test case
> (pat
Replace fast_memmove() variants by access_memmove() variants, that
first try to probe access to all affected pages (maximum is two pages).
Introduce access_get_byte()/access_set_byte(). We might be able to speed
up memmove in special cases even further (do single-byte access, use
memmove() for rem
The last remaining bit for MVC is handling destructive overlaps in a
fault-safe way.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/me
From: Bin Meng
This adds a helper routine for finding firmware. It is currently
used only for "-bios default" case.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/boot.c | 22 +++---
include/hw/riscv/boot.h | 1 +
2 f
The last remaining bit is padding with two bytes.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index abb9d4d70c..853
We can process a maximum of 256 bytes, crossing two pages.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
i
Hello,
The QEMU PowerNV machine emulates a baremetal OpenPOWER system and
acts as an hypervisor (L0). Supporting emulation of KVM to run guests
(L1) requires a few more extensions, among which guest support for the
XIVE interrupt controller on POWER9 processor.
The following changes add new per-C
We can process a maximum of 256 bytes, crossing two pages.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
i
We can process a maximum of 256 bytes, crossing two pages.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
i
Each XIVE Router model, sPAPR and PowerNV, now implements the 'match_nvt'
handler of the XivePresenter QOM interface. This is simply moving code
and taking into account the new API.
To be noted that the xive_router_get_tctx() helper is not used anymore
when doing CAM matching and will be removed l
We can process a maximum of 256 bytes, crossing two pages.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
i
On 9/18/19 3:21 PM, Stefan Hajnoczi wrote:
> From: Philippe Mathieu-Daudé
>
> While the tracing framework does not forbid trailing newline in
> events format string, using them lead to confuse output.
> It is the responsibility of the backend to properly end an event
> line.
>
> Some of our form
We will use it to resend missed interrupts when a vCPU context is
pushed a HW thread.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive.h | 1 +
hw/intc/xive.c| 15 +++
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/include/hw/ppc/xive.h b/include/hw/p
Access at most single pages and document why. Using the access helpers
might over-indicate watchpoints within the same page, I guess we can
live with that.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 24 +---
1 file changed
pnv_xive_vst_size() tries to compute the size of a VSD table from the
information given by FW. The number of entries of the table are
deduced from the result and the MMIO regions of the ESBs and the ENDS
are also resized with the computed value.
But for indirect tables, the result is incorrect. An
Hi Peter,
On 9/17/19 3:45 PM, Peter Maydell wrote:
On Tue, 17 Sep 2019 at 14:06, Konopik, Andreas wrote:
Using gdb and valgrind I found out that:
- 'gen_mtcr()' and 'gen_mfcr()' access uninitialized values, i.e.
CSFRs,
which leads to the Segfault
- The uninitialised values were created by stac
Each operand can have a maximum length of 16. Make sure to prepare all
reads/writes before writing.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/tar
When PC_TCTXT_CHIPID_OVERRIDE is configured, the PC_TCTXT_CHIPID field
overrides the hardwired chip ID in the Powerbus operations and for CAM
compares. This is typically used in the one block-per-chip configuration
to associate a unique block id number to each IC of the system.
Simplify the model
The CAM line matching on the PowerNV machine now scans all chips of
the system and all CPUs of a chip to find a dispatched NVT in the
thread contexts.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 32
1 file changed, 32 insertions(+)
diff --git a/hw/ppc/pnv
When doing CAM line compares, fetch the block id from the interrupt
controller which can have set the PC_TCTXT_CHIPID field.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive.h | 2 +-
hw/intc/pnv_xive.c| 6 ++
hw/intc/spapr_xive.c | 6 ++
hw/intc/xive.c| 21 +++
12.09.2019 16:56, Max Reitz wrote:
> Sometimes it is useful to be able to add a node to the block graph that
> takes or unshare a certain set of permissions for debugging purposes.
> This patch adds this capability to blkdebug.
>
> (Note that you cannot make blkdebug release or share permissions t
As there is now easy way to loop on the CPUs belonging to a chip, add
a helper to filter out external CPUs.
Signed-off-by: Cédric Le Goater
---
hw/intc/pnv_xive.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
i
12.09.2019 16:56, Max Reitz wrote:
> Callers can use this new parameter to expect failure during the
> completion process.
>
> Signed-off-by: Max Reitz
Reviewed-by: Vladimir Sementsov-Ogievskiy
--
Best regards,
Vladimir
The CAM line matching sequence in the pseries machine does not change
much apart from the use of the new QOM interfaces. There is an extra
indirection because of the sPAPR IRQ backend of the machine. Only the
XIVE backend implements the new 'match_nvt' handler.
Signed-off-by: Cédric Le Goater
---
When the XIVE IVRE sub-engine (XiveRouter) looks for a Notification
Virtual Target (NVT) to notify, it broadcasts a message on the
PowerBUS to find an XIVE IVPE sub-engine (Presenter) with the NVT
dispatched on one of its HW threads, and then forwards the
notification if any response was received.
and use this helper to exclude CPUs which were not enabled by the XIVE
controller.
Signed-off-by: Cédric Le Goater
---
hw/intc/pnv_xive.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index e1c15b6b5b71..5c97ccda1cad 100644
--- a/hw/int
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive.h | 2 --
hw/intc/pnv_xive.c| 13 -
hw/intc/spapr_xive.c | 8
hw/intc/xive.c| 7 ---
4 files changed, 30 deletions(-)
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 9d9cd88dd17e..f3
and replace the cpu_physical_memory_write() by a address_space_stq_be().
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv_psi.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index 88ba8e7b9b0a..3b0f4b02f9bf 100644
--- a/hw/
The TIMA operations are performed on behalf of the XIVE IVPE sub-engine
(Presenter) on the thread interrupt context registers. The current
operations the model supports are simple and do not require access to
the controller but more complex operations will need access to the
controller NVT table an
The XiveFabric QOM interface should be implemented by the machine. It
acts as the PowerBUS interface between the interrupt controller and
the system. On HW, the XIVE sub-engine is responsible for the
communication with the other chip is the Common Queue (CQ) bridge
unit.
This interface offers a 'm
On 12.09.2019 11:46, Denis Plotnikov wrote:
> ping!
>
> On 05.09.2019 12:31, Denis Plotnikov wrote:
>> v6:
>> * fixed zstd compressed length storing/loading [Eric]
>> * fixed wording, spec section placement [Eric]
>>
>> v5:
>> * type changed for compression_type at BDRVQcow2State [Kevin]
>> * fixed
We try to loop on the full table skipping empty indirect pages which
are not necessarily allocated. This is useful to dump the contexts of
the KVM vCPUs.
Signed-off-by: Cédric Le Goater
---
hw/intc/pnv_xive.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/h
The TIMA MMIO space is shared among the chips. To identify the chip
from which the access is being done, the PowerBUS uses a 'chip' field
in the load/store messages. QEMU does not model these messages,
instead, we extract the chip id from the CPU PIR and do a lookup at
the machine level to fetch th
Now that the machines have handlers implementing the XiveFabric and
XivePresenter interfaces, remove xive_presenter_match() and make use
of the 'match_nvt' handler of the machine.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c | 48 +---
1 file cha
12.09.2019 16:56, Max Reitz wrote:
> Signed-off-by: Max Reitz
> ---
> tests/qemu-iotests/041 | 44 ++
> tests/qemu-iotests/041.out | 4 ++--
> 2 files changed, 46 insertions(+), 2 deletions(-)
>
> diff --git a/tests/qemu-iotests/041 b/tests/qemu-iotest
To better support testing record/replay we should output something
that would otherwise be variable had it not been pegged to icount.
[AJB: needs a bit of work to nicely work across architectures although
most have some sort of counter].
Signed-off-by: Alex Bennée
Cc: Pavel Dovgalyuk
---
tests
This also removes the need of the get_tctx() XiveRouter handler in the
core XIVE framework.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive.h | 1 -
hw/intc/pnv_xive.c| 35 ++-
hw/intc/spapr_xive.c | 33 +++--
hw/intc/xive
On 18/09/2019 09:29, Max Reitz wrote:
> On 17.09.19 16:25, Andrey Shinkevich wrote:
>>
>>
>> On 17/09/2019 12:20, Max Reitz wrote:
>>> null-aio may not be whitelisted. Skip all test cases that require it.
>>>
>>> (And skip the whole test if null-co is not whitelisted.)
>> This solution has been
The NVT space is 19 bits wide, giving a maximum of 512K per chip. When
dispatched on a HW thread, the NVT identifier of a vCPU is pushed/stored
in the CAM line (word2) of the thread interrupt context.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive.h | 5 -
include/hw/ppc/xive_
On 9/18/19 12:44 PM, Vladimir Sementsov-Ogievskiy wrote:
> 18.09.2019 13:30, Vladimir Sementsov-Ogievskiy wrote:
>> 18.09.2019 1:29, John Snow wrote:
>>>
>>>
>>> On 9/16/19 10:56 AM, Vladimir Sementsov-Ogievskiy wrote:
12.09.2019 3:16, John Snow wrote:
> Like script_main, but doesn't re
When an interrupt can not be presented to a vCPU, the XIVE presenter
updates the Interrupt Pending Buffer of the XIVE NVT if backlog is
activated in the END.
Later, when the same vCPU is dispatched, its context is pushed in the
thread context registers and the VO bit is set in the CAM line word to
The OS CAM line has a special encoding exploited by the HW. Provide a
helper routine to hide the details to the TIMA command handlers. This
also clarifies the endian ness of different variables : 'qw1w2' is
big-endian and 'cam' is native.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c | 35 +
Patchew URL: https://patchew.org/QEMU/20190918084834.9729-1-amore...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
expor
This is to track the configuration of the base END index of the vCPU
and the Interrupt Pending Buffer. The NVT IPB is updated when an
interrupt can not be presented to a vCPU.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/pnv_xive.c | 22
A context should be 'valid' when pulled from the thread interrupt
context registers.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index cdc4ea8b0e51..07b7c3586c12 100644
--- a/hw/intc/xive.c
+++ b/hw/i
It turns out that forcing python2 for running the edk2 "build" utility is
neither necessary nor sufficient.
Forcing python2 is not sufficient for two reasons:
- QEMU is moving away from python2, with python2 nearing EOL,
- according to my most recent testing, the lacking dependency information
On 9/18/19 10:52 AM, Vladimir Sementsov-Ogievskiy wrote:
> 18.09.2019 2:45, John Snow wrote:
>> We can turn logging on/off globally instead of per-function.
>>
>> Remove use_log from run_job, and use python logging to turn on
>> diffable output when we run through a script entry point.
>>
>> iot
When dumping the END and NVT tables, the error logging is too noisy.
Signed-off-by: Cédric Le Goater
---
hw/intc/pnv_xive.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index 8fa78e1c6cd9..4c1fa024cdf5 100644
--- a/hw/intc/pnv_x
The trigger definition is used for triggers both for HW source
interrupts, PHB, PSI, as well as for rerouting interrupts between
Interrupt Controller.
HW source controllers set bit0 of word0 to ‘0’ as they provide EAS
information (EAS block + EAS index) in the 8 byte data and not END
information,
This pull request is not for master !
Hi Cornelia,
the following changes since commit f8c3db33a5e863291182f8862ddf81618a7c6194:
target/sparc: Switch to do_transaction_failed() hook (2019-09-17 12:01:00
+0100)
are available in the Git repository at:
https://gitlab.com/huth/qemu.git tags/s
On Wed, 18 Sep 2019 16:42:14 +0200
Christian Borntraeger wrote:
> We now know that gen15a is called z15.
>
> Signed-off-by: Christian Borntraeger
> ---
> target/s390x/cpu_models.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/s390x/cpu_models.c b/target/s390x
On 9/18/19 8:02 AM, Vladimir Sementsov-Ogievskiy wrote:
> Hi all!
>
> Here is a proposal (three of them, actually) of auto propagation for
> local_err, to not call error_propagate on every exit point, when we
> deal with local_err.
>
> It also may help make Greg's series[1] about error_append_hin
18.09.2019 13:30, Vladimir Sementsov-Ogievskiy wrote:
> 18.09.2019 1:29, John Snow wrote:
>>
>>
>> On 9/16/19 10:56 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> 12.09.2019 3:16, John Snow wrote:
Like script_main, but doesn't require a single point of entry.
Replace all existing initializat
18.09.2019 20:10, Eric Blake wrote:
> On 9/18/19 8:02 AM, Vladimir Sementsov-Ogievskiy wrote:
>> Hi all!
>>
>> Here is a proposal (three of them, actually) of auto propagation for
>> local_err, to not call error_propagate on every exit point, when we
>> deal with local_err.
>>
>> It also may help m
This forced inlining can result in missing symbols,
which makes a debugging build harder to follow.
Reported-by: Peter Maydell
Signed-off-by: Richard Henderson
---
include/qemu/compiler.h | 11 +++
accel/tcg/cputlb.c | 4 ++--
2 files changed, 13 insertions(+), 2 deletions(-)
dif
RFC because it *still* doesn't work, just like v1.
However this time the changes are extremely minimal, and now
I really *really* don't understand why they don't work, because
as far as I can tell the new locking is *identical* with the
current i/o path.
In particular, the actual access happens b
The memory_region_tb_read tracepoint is unreachable, since notdirty
is supposed to apply only to writes. The memory_region_tb_write
tracepoint is mis-named, because notdirty is not only used for TB
invalidation. It is also used for e.g. VGA RAM updates and migration.
Replace memory_region_tb_wri
Add a function parameter to perform the actual load/store to ram.
With optimization, this results in identical code.
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 159 +++--
1 file changed, 83 insertions(+), 76 deletions(-)
diff --git a/accel/
On 9/18/19 5:26 AM, Cornelia Huck wrote:
> On Tue, 17 Sep 2019 18:36:20 +0200
> Greg Kurz wrote:
>
>> On Tue, 17 Sep 2019 13:24:12 +0200
>> Cornelia Huck wrote:
>>
>>> On Tue, 17 Sep 2019 12:21:34 +0200
>>> Greg Kurz wrote:
>>>
Ensure that hints are added even if errp is &error_fatal or
Pages that we want to track for NOTDIRTY are RAM. We do not
really need to go through the I/O path to handle them.
Signed-off-by: Richard Henderson
---
include/exec/cpu-common.h | 1 -
accel/tcg/cputlb.c| 23 ++---
exec.c| 54 +++-
Handle bswap on ram directly in load/store_helper. This fixes a
bug with the previous implementation in that one cannot use the
I/O path for RAM.
Fixes: a26fc6f5152b47f1
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 2 +
accel/tcg/cputlb.c | 105 +--
On 9/18/19 12:46 PM, Vladimir Sementsov-Ogievskiy wrote:
>>> +/*
>>> + * Third variant:
>>> + * Pros:
>>> + * - simpler movement for functions which don't have local_err yet
>>> + * the only thing to do is to call one macro at function start.
>>> + * This extremely simplifies Gre
On 9/17/19 5:20 AM, Max Reitz wrote:
skip_if_unsupported() should use the stronger variant case_skip(),
because this allows it to be used even with setUp() (in a meaningful
way).
In the process, make it explicit what we expect the first argument of
the func_wrapper to be (namely something der
On 9/18/19 1:05 PM, Eric Blake wrote:
>>> #define MAKE_ERRP_SAFE() \
>>> g_auto(ErrorPropagationStruct) (__auto_errp_prop) = {.errp = errp}; \
>>> errp = &__auto_errp_prop.local_err
>>>
I tried to see if this could be done with just a single declaration
line, as in:
typedef struct ErrorPropagato
On 9/17/19 5:20 AM, Max Reitz wrote:
null-aio may not be whitelisted. Skip all test cases that require it.
(And skip the whole test if null-co is not whitelisted.)
Signed-off-by: Max Reitz
Sorry for the goose chase on v(n-1).
I feel like maybe there's a nicer way to do this, but I can't
On 9/17/19 5:20 AM, Max Reitz wrote:
null-aio may not be whitelisted. Skip all test cases that require it.
Signed-off-by: Max Reitz
Reviewed-by: John Snow
---
tests/qemu-iotests/136 | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/tests/qemu-iotest
On 9/18/19 9:05 AM, Thomas Huth wrote:
On 18/09/2019 00.29, John Snow wrote:
On 9/16/19 10:56 AM, Vladimir Sementsov-Ogievskiy wrote:
[...]
Finally do we support something except linux for iotests?
for bash tests _supported_os also used only with "Linux" in 87 tests..
The iotests in the
On 9/12/19 9:56 AM, Max Reitz wrote:
Signed-off-by: Max Reitz
---
tests/qemu-iotests/041 | 44 ++
tests/qemu-iotests/041.out | 4 ++--
2 files changed, 46 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/041 b/tests/qemu-iotests/041
i
On 9/18/19 4:55 AM, Kevin Wolf wrote:
Running iotests is not required to build QEMU, so we can have stricter
version requirements for Python here and can make use of new features
and drop compatibility code earlier.
This makes qemu-iotests skip all Python tests if a Python version before
3.5
On 9/17/19 12:07 PM, Vladimir Sementsov-Ogievskiy wrote:
Of course, QEMU_ALIGN_UP is a typo, it should be QEMU_ALIGN_DOWN, as we
are trying to find aligned size which satisfy both source and target.
Also, don't ignore too small max_transfer. In this case seems safer to
disable copy_range.
Fix
On 9/17/19 12:07 PM, Vladimir Sementsov-Ogievskiy wrote:
We shouldn't try to copy bytes beyond EOF. Fix it.
Fixes: 9ded4a0114968e
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
block/backup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/bloc
On 9/13/19 9:36 AM, Maxim Levitsky wrote:
> Signed-off-by: Maxim Levitsky
It'd still be nice to have a commit message...
> ---
Or here, what changed from V1.
> block/nvme.c | 72 +++-
> block/trace-events | 1 +
> include/block/nvme.h | 19
On 9/13/19 9:36 AM, Maxim Levitsky wrote:
> Signed-off-by: Maxim Levitsky
Same comments as 1/2; but not worth holding anything up. We'll find out
from users if there are problems, but I wish we had a nicer way to test it.
Reviewed-by: John Snow
> ---
> block/nvme.c | 83 +
On 9/10/19 9:23 AM, John Snow wrote:
>
>
> On 9/10/19 4:19 AM, Stefan Hajnoczi wrote:
>> On Wed, Aug 21, 2019 at 04:01:52PM -0400, John Snow wrote:
>>>
>>>
>>> On 8/21/19 10:41 AM, Vladimir Sementsov-Ogievskiy wrote:
09.08.2019 23:13, John Snow wrote:
> Backup jobs may yield prior to
Dan Streetman writes:
> From: Dan Streetman
>
> There is currently no default machine type for arm so one must be specified
> with --machine. This sets the 'virt' machine type as default.
We should really have a FAQ entry for why we don't have a default for
ARM. In short unlike PC's every AR
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> Make the filter truncation (passing it through to bs->file) a
> first-class citizen and handle it exactly as if it was the filter
> driver's native implementation of .bdrv_co_truncate().
>
> I do not see a reason not to, it makes the code a bit
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> No other filter driver has a .bdrv_co_truncate() implementation, and
> there is no need to because the general block layer code can handle it
> just as well.
>
> Signed-off-by: Max Reitz
> ---
> block/copy-on-read.c | 8
> 1 file cha
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> When truncating a format node, the @exact parameter is generally handled
> simply by virtue of the format storing the new size in the image
> metadata. Such formats do not need to pass on the parameter to their
> file nodes.
>
> There are exce
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> There is no reason why the format drivers need to truncate the protocol
> node when formatting it. When using the old .bdrv_co_create_ops()
> interface, the file will be created with no size option anyway, which
> generally gives it a size of 0
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> This reverts commit 5279b30392da7a3248b320c75f20c61e3a95863c.
>
> We no longer need this check because exact=true forces the block driver
> to give the image the exact size requested by the user.
Looks very good to me.
Reviewed-by: Maxim Levi
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> We have two drivers (iscsi and file-posix) that (in some cases) return
> success from their .bdrv_co_truncate() implementation if the block
> device is larger than the requested offset, but cannot be shrunk. Some
> callers do not want that beha
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> We have two protocol drivers that return success when trying to shrink a
> block device even though they cannot shrink it. This behavior is now
> only allowed with exact=false, so they should return an error with
> exact=true.
>
> Signed-off-b
On Wed, 2019-09-18 at 11:51 +0200, Max Reitz wrote:
> This is a change in behavior, so all instances need a good
> justification. The comments added here should explain my reasoning.
>
> qed already had a comment that suggests it always expected
> bdrv_truncate()/blk_truncate() to behave as if ex
On Wed, Sep 18, 2019 at 4:34 PM Alex Bennée wrote:
>
>
> Dan Streetman writes:
>
> > From: Dan Streetman
> >
> > There is currently no default machine type for arm so one must be specified
> > with --machine. This sets the 'virt' machine type as default.
>
> We should really have a FAQ entry fo
When it was based on docker8 which uses python-minimal, it needed this.
It no longer does.
Goodbye, python2.7.
Signed-off-by: John Snow
---
tests/docker/dockerfiles/debian9-mxe.docker | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tests/docker/dockerfiles/debian9-mxe.dock
Hi, I'm having a regular trainwreck here w/ the Docker test suite and I
have a few questions;
1. Which tests should I expect to work by default? for instance,
make-debug doesn't but I think that might be normal. Is that the only one?
2. Should all tests work for all targets?
3. Which images can
On 9/18/19 1:11 PM, Laszlo Ersek wrote:
> It turns out that forcing python2 for running the edk2 "build" utility is
> neither necessary nor sufficient.
>
> Forcing python2 is not sufficient for two reasons:
>
> - QEMU is moving away from python2, with python2 nearing EOL,
>
Thank you :)
> -
On 9/16/19 10:19 AM, Vladimir Sementsov-Ogievskiy wrote:
> Add bs field to BdrvDirtyBitmap structure. Drop BlockDriverState
> parameter from bitmap APIs where possible.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
I've thought about doing this before, but couldn't figure out if it was
wort
This series adds a framework for coverage-guided fuzzing of
virtual-devices. Fuzzing targets are based on qtest and can make use of
the libqos abstractions.
Build instructions in docs/devel/fuzzing.txt
V3:
* Rebased onto v4.1.0+
* Add the fuzzer as a new build-target type in the build-system
*
The names i2c_send and i2c_recv collide with functions defined in
hw/i2c/core.c. This causes an error when linking against libqos and
softmmu simultaneously (for example when using qtest inproc). Rename the
libqos functions to avoid this.
Signed-off-by: Alexander Oleinik
---
tests/libqos/i2c-imx
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